 In this course, we first started by looking at semiconductor materials and their properties. We started with intrinsic semiconductors and then moved on to extrinsic semiconductors. We then looked at devices, looked at a variety of devices. The last part of this course or the last section of this course, we are going to focus on semiconductor manufacturing. So when we looked at devices, we started with simple PN junctions, we then went on to transistors and we also looked at a variety of optoelectronic devices like LEDs, lasers, solar cells and so on. So there are wide variety of materials that are used especially in the case of optoelectronic devices where you have hetero structures, a wide variety of materials based on gallium arsenide is used. But the dominant material in the semiconductor industry is silicon. One reason for that is the natural abundance of silicon, it is one of the most widely available materials on earth, it is usually found in the form of SiO2 or quads. Another reason is that the electronic properties of silicon can be precisely controlled by addition of dopants. So when we talk about electronic properties mostly the resistance can be controlled by adding a small amount of donors or impurity or donors or acceptors as we have seen before. So most of what we do will be with focus with respect to silicon. I will also talk briefly about other materials especially gallium arsenide but the dominant material being silicon that will be the focus when we talk about semiconductor manufacturing. Let us look briefly at the history of device manufacturing. The first electronic device and I write electronic within quotes was the vacuum tube. This was invented towards the end of the 19th century and the beginning of the 20th century. So the triode which is one form of vacuum tube was invented by Lee de Forest in 1906. So the vacuum tube consists of an evacuated glass tube, there are usually two electrodes one acts as the anode and the other acts as the cathode. So let me just draw a schematic of the device. So the evacuated glass tube one of the electrode acts as the cathode which is your source of electrons then you have an anode. The cathode has a negative potential the anode has a positive potential this is connected to your outside circuit. So this type of device configuration where you have two electrodes the cathode let me mark the anode as well is called a diode. So by applying a current to the cathode typically the cathode material is heated. So it is thermionic emission electrons are generated and these electrons are accelerated towards the anode and that gives you the current. You can add another electrode to the system to form the triode. So once again you have the evacuated glass tube there is a cathode which is negative there is an anode that is positive and there is a third electrode that is the grid. So grid, anode and cathode. So in this particular configuration the current between the anode and cathode can be modified by application of a potential to the grid. So the grid can be either positive or negative with respect to the cathode and that would modify the current within this triode system. So vacuum tubes perform essentially two functions they can be used for switching or they can be used for amplification. So in some sense the performance is very similar to what we expect from your transistors. So the vacuum tube itself is a highly inefficient process. They are bulky because they all have evacuated glass tubes. Also it is very hard to maintain the vacuum in these tubes. So they are highly inefficient but the vacuum tubes are the forerunners of the modern transistors. So they were used to build the first computer which was called the NEAC. So the NEAC stands for Electronic Numeric Integrator and Capacitor. So this was built in 1947. It was mainly made up of vacuum tubes plus some resistors and capacitors. So the NEAC was capable of numerical calculations but because it was built out of vacuum tubes it was huge and bulky. The computer would occupy a large room and would also require a tremendous amount of power in order to run it. To reduce the size of these devices we need to replace these vacuum tubes with solid state devices. So the first solid state device or the first solid state transistor was built in Bell Labs in 1947. So this was an electrical amplifier that was actually made using germanium. So germanium was the material that was used and if you remember germanium has a smaller band gap than silicon so that the intrinsic carrier concentration is higher. So it was an electrical amplifier based out of germanium. So here the germanium actually replaces the vacuum tube, the amplifier acts as a transistor and replaces the vacuum tube which is bulky and inefficient. There were three scientists involved in this John Bardeen, Walter Bratton and William Shockley. They won the Nobel Prize in 1956 for the invention of the transistor. So using the solid state technology a variety of devices were built. So you can think about transistors which act as your triodes, you can also build diodes which are nothing but your p-n junctions. You can build capacitors or you can build resistors. So initially these devices were all built as discrete devices. So they were built as discrete devices which were then connected by wires. So they were all built as discrete devices and electrical connections were made in order to build the final device. So the first integrated circuit happened when these different components were made on the same wafer. So in the case of the integrated circuit short form is just IC. So in 1959 Jack Kilby from Texas Instruments built the first integrated circuit. So he built the first integrated circuit and again germanium was the material that was used. In the case of the Kilby circuit he combined transistors, diodes and capacitors and for resistors he used the natural resistivity of the germanium substrate. So there were total of 5 components to this but these were still connected by wires. But the modern integrated circuit as we know it based upon silicon was developed by Robert Noyce who is one of the founders of Intel. At that time he was working at Fat Child Camera. So he had a different design where he built the first integrated circuit using silicon. So the advantage of using silicon apart from the abundance in this particular case was that silicon forms a naturally occurring oxide SiO2 and this SiO2 on the wafer surface can be used as an insulating layer for forming MOSFETs. You have seen that before when we looked at MOSFETs that there was a dielectric layer that separates the gate from the channel. So this dielectric layer can be easily formed on silicon using SiO2. Robert Noyce also used evaporated aluminum for forming the electrical connections as opposed to using a wire connection so that your circuit can be thought of as truly integrated. All the components are made out of a single wafer. So this kind of an integrated circuit is called a monolithic IC and the term monolithic is because they are all made from the same wafer. So the initial integrated circuits that were formed had only a few components. So the first one had only five components and later the number of components are usually of tens or hundreds but over time the number of components in a given wafer or in a given chip has increased and at the same time the size of the devices have also decreased. So two kinds of improvements have taken place in terms of IC design. So over time when we look at ICs the number of transistors has increased while at the same time the size of the transistors have decreased. I will call it a device dimension nothing but the size of the transistors. So the improvements in the IC design can be broadly classified into two types. So the first one is a process improvement in which case you are fabricating the same device and the same structure but with smaller dimensions. So this is analogous to sort of taking a chip and then shrinking all the dimensions so that the overall size is smaller. The other kind of improvement is your structure improvement where you have new device designs so this could be a design in terms of the structure or this could be design in terms of a new material that is being used in order to give greater performance. We have a new design so whenever we talk about integrated circuits we usually characterize them by the size of the components and also the number of components. So we always talk about the size of the components. This is usually called a feature size and the number of components. So this in turn is related to your device density. So earlier the feature size was usually of the order of micrometers. Now the size is around the order of nanometers. So feature size in the IC circuit usually refers to the smallest dimension in the device. So usually this is taken as the distance between two gates when you are thinking about transistors that are fabricated in a wafer. So typical feature size now is around tens of nanometers. So this started from around tens of micrometers or hundreds of micrometers in 1960s. So along with the reduction in feature size the number of components within your chip has also increased. So when we talk about integrated circuits a famous law that always comes to mind is Moore's law. So this was proposed by Gordon Moore who is again one of the co-founders of Intel in 1965. So Moore's law states that the number of transistors states that the number of transistors on a chip will roughly double every 2 years. The original law had 18 months but the doubling time is roughly 2 years. The number of transistors doubles in roughly 2 years. So this was proposed by Gordon Moore in 1965 when the IC industry was just starting up and remarkably Moore's law has held for the past 50 years. If you look at the number of transistors per centimeter square, so let me plot the number of transistors per unit area, so per centimeter square versus time. So this on the y axis it is a log scale to the 3, 10 to the 6. Let me just expand the scale a bit, 10 to the 8 starting from 1970, 80. So if you plot the number of transistors versus time, it is a pretty much a straight line. So start somewhere around 10 to the 3 or 1000 transistors per wafer or per chip and it is almost been linear. So corresponding to the increase in the number of transistors, the size of the device have also decreased. Pointing feature size has also come down. So we usually refer to the number of transistors on a chip as integration. So there have been different levels of integration starting from the 1970s on to today. So the first one is called small scale integration, it is called SSI. So the number of components is usually around 2 to 50, so just tens of components per chip. So these components could be transistors, could be diodes, resistors, capacitors and so on. Then we had medium scale integration, it is called MSI. So now you have a few thousand components and note that as the number of components increase the feature size will also reduce. Then you have large scale integration which is LSI. So from LSI you can go to very large scale integration. So VLSI is 10 to the 5 to 10 to the 6 and after that you have ultra large scale integration where the number of transistors is greater than 10 to the 6. Currently if you look at any of the chips made by Intel, the number of transistors would be above 10 to the 6, it will be close to 10 to the 7 or 10 to the 8. So you are already way beyond the ultra large scale integration limit. So let us look at some examples of chips made by Intel and also the component size and the number of transistors. So I am using Intel as an example just to show the evolution of the industry but whatever is true for Intel is also true for other semiconductor manufacturers. So we look at the first chip which is 4004, the year of manufacture is 1971. We usually define something called a clock speed which tells you the frequency of operation of the device. Clock speed is around 100 kilohertz. The number of transistors is 2300 and the technology is called 10 micrometer technology. So 10 micrometers refers to the feature size that may not be the exact feature size but it gives you an order of magnitude of the size of the components. So let us jump close to 10 years, we will look at 8086, this is from 1978. The clock speed is 5 megahertz. So already by shrinking your component size you increase the clock speed. The number of transistors is increased, it is now close to 30,000. So 10 orders of magnitude increase. The technology is 3 micrometers. So you have reduced the size of the components. Let us jump another 10 years. So you look at 486, this is 1989. Clock speed is 25 megahertz. The number of transistors is 10 to the 6. So if you started with a medium scale integration then you went to a large scale integration and already you are at your ultra large scale integration and the technology is 1 micrometer. Then in 2000 you have the Pentium 4. I am not listing all the chips but only a few of them to give you a representative idea. Clock speed is 1.5 gigahertz. The number of transistors is around 10 to the 7. Your feature size is around 180 nanometers. Xeon which came 7 years later in 2007, it is greater than 3 gigahertz. The number of transistors is doubled and your feature size is 45 nanometers. So if you look at 45 nanometers and beyond from there your feature size shrunk to 32 nanometers and then 22 nanometers. In this case you no longer have planar transistors but something called FinFETs or Trigate transistors and the future plans are 14 nanometers and 11 nanometers. So the feature size that started somewhere of the order of micrometers has shrunk nearly 3 orders of magnitude in the last 40 years or last 50 years. To give you features there are few tens of nanometers. So corresponding to this reduction in size you also have a large increase in the density of the transistors. So along with reduction of feature size the underlying size of the wafers has also increased. So chips are manufactured on wafers. Each wafer can have many hundreds or thousands now even millions of these transistors. By increasing the size of the wafers you can make more and more transistors on a single wafer so that the overall cost comes down. So if you look at the size of the wafers themselves the size of the wafers has increased. So in 1970 typically 50 millimeter wafers were used. So this refers to the diameter of the wafer then in 1980 you had 100 millimeter then the transition was to 150 millimeters in 2000 the transition was again from 150 to 300 if you want to write this these are called 12 inch wafers. So 12 inch wafers are what is currently being used in the industry right now and then the expected transition is from 12 inch to 18 inch wafers or 450 millimeters. So the advantage of increasing the wafer size is that the larger the wafers more the number of chips that can be packed into it which means the cost per chip will come down. So increasing wafer size will lower the cost the drawback is that as we increase the size of the wafers new equipment has to be manufactured in order to handle the large size. This process is called retooling the fab so that when you change the size of the wafer the entire fab has to be retooled in order to use the larger size wafers with reducing feature size controlling the defects in the wafers is also very critical. For example if you have a defect particle so this could be a typical dust particle it usually has a size around say 1 micrometer if the feature size is 10 micrometers as we saw in the earliest IC a 1 micrometer dust particle is okay but with reducing feature size so if your feature size is of the order of nanometers a 1 micrometer particle can essentially destroy the device. So with reducing feature size defect control is very critical or becomes very important. So typical semiconductor manufacturing is carried out in a clean room where the contaminants are maintained in very strict control. So later we look at the different classifications of clean rooms. The clean rooms are classified based upon the size of the smallest of the largest dust particle that is available or found in them so with increasing or with decreasing feature size maintaining the environment in semiconductor manufacturing becomes very critical. So manufacturing is done in a clean room. The manufacturing complexity also goes up as the feature size is reduced. So if you think about transistors so we can fabricate a lot of transistors on a chip but these transistors have to be connected to one another and they also have to be connected to the external circuit. So the electrical connections are made and these are called interconnects. So as the size of the device goes down or the size of the individual transistors goes down the complexity of the interconnects increases. So usually interconnects are done in layers. So later when we look at IC device manufacturing we will see some example of how interconnect works but interconnect is usually done in layers and as the size reduces the number of layers increases. So if you look at the latest Intel technology which is the 22 or the 28 nanometer technology it requires approximately 11 levels of interconnects. As I mentioned earlier these interconnects not only connect the individual transistors but they connect different parts of the chip to each other and ultimately they connect the chip to the outside world. So we deduce the size of the components, the complexity of the interconnects go up. So how we manufacture all of these on a single wafer again becomes critical so that the complexity of the process increases. We also have new materials that are constantly being used. So for example one of the first reasons for using silicon was that in the case of silicon there is a naturally growing oxide which is your silicon dioxide that can act as the insulator or the dielectric in your MOSFET. So in this case the capacitance of the dielectric layer again you have seen this before is nothing but epsilon 0, epsilon 0 r A over T where A is the relative permittivity of your device, A is the area and T is the thickness. So as the device dimension scale the thickness also reduces but if the oxide layer is very thin then your electrons can basically tunnel through the oxide layer and destroy the channel. So this is one of the reasons why you have a transition made from oxide insulators to high k dielectrics so that you increase the value of epsilon r. So you increase epsilon r so that you can have a high capacitance with a comparably thick dielectric layer so that tunneling can be prevented. So we not only have advances in the reduction in feature size but we also have to look at advances in terms of the materials that are used in your IC device. You can also have advances in the case of the device design itself. For example if you look at the architecture of your transistor the original architecture is planar. So in this case you had a source and a drain and a gate region that defines your channel but now as the size of the devices reduce once again a planar architecture leads to a reduction in the signal to noise ratio so that there is a large amount of reverse saturation current. So one way to prevent that is to change the architecture so an example of that is your tri gate architecture. So in this particular case you have a silicon substrate but it is manufactured in such a way so that there is a silicon fin that protrudes out so there is the oxide layer which acts as your dielectric material and the gate is wrapped around the silicon fin. So instead of having a planar technology you have a three dimensional technology. The advantage is that in the case of a planar technology there is one interface between the gate and the silicon but in the case of a tri gate technology you have three interfaces. So this leads to a wider channel and thus improving the current in your transistor. So this reduces the leakage current in the device and correspondingly also reduces power consumption. This becomes very critical when you are looking at devices for example ships for mobile phones or rather tablets where power consumption is very critical. So in that case you have process improvements in order to help make your devices better. So when we look at IC manufacturing there are broadly five stages we can classify. So if you look at IC manufacturing so the first step is to get the silicon material out. So we want sand which is your starting material and we want to get silicon from it. The first step is material preparation. So converting sand to polycrystalline silicon I will just write it as polySi but polycrystalline silicon is not what we use in the fab. For using in the fab we need single crystal silicon wafers. So the next step is converting the polycrystalline silicon to single crystal. So crystal growth, wafer preparation so you are converting the poly silicon into your silicon wafer. So these two processes take place outside the fab so that they act as the input to whatever IC fabrication happens in the fab. So the input to your fab is a bare silicon wafer. So next step which is the critical step that happens in the fab is making the IC circuit within the fab and also sorting. So sorting means once the circuits are made testing the devices and separating the good and the bad ones. So this happens in the fab. Once sorting is done the individual chips from the wafer so a given wafer can have hundreds of chips. So the individual chips are separated and then they are packaged and after packaging a final electrical test is done and then the chips are ready for use. So in the next few classes we will look at all of these stages. So in the next class we will first start with how we have SiO2 as your starting ore and from there how we go to your silicon wafer. Then we look at the various processes that take place in the fab and also look at some of the issues and challenges that happens in the case of silicon manufacturing.