 So, we have discussed silicon-based FETs including the metal source chain structures and SOE structures, FinFET and all that. Now, we take a look at non-silicon materials like germanium compound semiconductors and see how what is the status of that, what were the problems faced by everyone and how most of it has been sorted out we will see. The question immediately comes why do we need to take a look at other materials other than silicon. We have already seen when we while discussing the MOSFET that Id sat, rain saturation current is channel width, sea oxide per unit area, VGS minus with threshold into injection velocity and you go to the nano scale ultimately to the emitting factor is this, smaller w then channel length smaller this is the limiting factor. So, if you want to have higher drain current which is required for driving in the capacitive loads which are present in integrated circuits you need to have force you increase the sea oxide by reducing the thickness of the oxide, but there is a limit to that and you switch out high k dielectric to overcome that limit. Now injection velocity we saw that it depends upon thermal velocity and low field mobility and the electric field at the source end of the junction, source end of the channel 0 plus. So, mobility is the one which if you keep it as high as possible you will have injection velocity equal to thermal velocity you can have ballistic transport practically. So, the entire aim is to improve the injection velocity by increasing the mobility. We have seen how to do that by reducing the doping and by using a SOI etcetera. Now if you go over to the material which basically has a higher mobility that is the alternative. So, that is why one takes a look into other materials what are the other materials silicon all pervasive it is the one which is rolling the wheel as a technology today because of its availability as you hear often it is the second best available material on the surface of that crust. So, that is available. So, that is the cheapest material for suitable it is very good semiconductor material with band gap 1.1 low intrinsic area concentration and melting point is 1400 degree centigrade. So, you can use it for implantation annealing etcetera at temperature like 900000 or even 1500000. Those merits have made people take a look at more and more into silicon, but now one the limit you are hitting towards the limit somewhere around 1980s people started looking at other material like which can give as good performance as 0.1 micron silicon by changing the over the material in gallium arsenide. Gallium arsenide can give as good performance as silicon having 1.1 micron, when the gallium arsenide channel length is 0.5 microns or of that order. So, we do not have to go down in technology they thought we can choose gallium arsenide merit band gap is higher than that of silicon very good because of that intrinsic area concentration very low. You can go to higher band gap means you can even use it for higher temperatures. So, that means for higher powers high speed because of the high electron mobility all those things are there. So, everything is meritorious two problems were encountered there. N channel MOSFET if you want to make fantastic mobility about 6 times that of electron mobility in silicon, but whole mobility even less than that of silicon. If I want to go to CMOS FET, gallium arsenide is not the material because whole mobility is low, but still if you are depending upon N channel devices like you know hetero junction bipolar transistors or high electron mobility transistors using electron you can go in for that. People are still looking into that that way. Now MOSFET with gallium arsenide there are lot of efforts spent on gallium arsenide during 1980s even going into 1990s because it does not have a good native oxide. See the best thing is that happened to silicon is it band gap is good you can go to 125 degree centigrade it has native oxide thermally oxidized it you can excellent oxide which is chemically stable means what is meaning of chemically stable it does not get attacked by most of the chemicals except Hf. We can put it in aqua asia HCl HnO3 nothing happens. Gallium arsenide native oxide is not so stable plus it will have gallium oxide and arsenic oxide between the two because it is a compound semiconductor vapor pressure of gallium is different from that of arsenic. Arsenic has got high vapor pressure even though mating point is quite good 1, 2, 3, 8 less than silicon but it is quite good. But if you go to higher temperatures you lose arsenic because arsenic vapor pressure is high compared to the gallium vapor pressure. So, that was probably gallium arsenide material itself and oxide arsenic trioxide vapor pressure is one atmosphere even at 400 degree centigrade. So, if you heat it to 400 degree centigrade you lose all that arsenic trioxide. So, it will be gallium trioxide which is not a good oxide. So, these are the problem that was faced there. So, what they thought was what was tried out is one thing is in the absence of native oxide you have got surface fascination problems tangling bonds high interface state density. So, fascination problems were there we will come back to this later. So, fascination problem is one thing dielectric what will use dielectric deposited dielectric high k dielectric you can use. So, now you can see that high k dielectric technology and fascination etcetera was growing with gallium arsenide. Simultaneously the silicon people came back thinking if I cannot go to thin oxide like 1 nanometer or below why not I go to high k dielectric. So, after all the capacitance per unit area is epsilon oxide divided by t oxide. Now, I am able not able to reduce the t oxide to increase the capacitance, but I can increase the epsilon oxide by using high k that was idea. So, it is sort of borrowed from here when people are struggling with gallium arsenide silicon technology people had because they have invested so much money on that they came back with the idea that is go to high k dielectric. Now, so lot of effort has gone in gallium oxide network at its hem to HBT etcetera has happened, MOSFET not much success because not because of MOSFET because CMOS cannot be done CMOS integrated IC cannot have in the case of gallium arsenide. Now, at this stage the mobility electron mobility is higher here whole mobility is low. At this point thought came back to the original material on which the transistor was invented germanium 1947 when the transistor was invented by shockwave, Bardin and Brattain that was germanium. And effort was towards making MOSFET with germanium, but while doing that effort on MOSFET fabrication of germanium accidentally they landed up in bipolar transistor. I am not going to history of that, but that is the history. So, the original devices were all bipolar BJT if you are about germanium 1950's 1960's if you look at the industries all the germanium transistor BJT's were there MOSFET was not there really. Only when the MOSFET came up in silicon germanium was thrown away because it does not have a native oxide. You may ask does it not have native oxide yes germanium dioxide is there, but germanium dioxide is very unstable it can even get washed away with water. Chemically unstable heat it to about 500 600 degree centigrade. You lose germanium oxide it gets converted to germanium GEO2 become GEO all that we will see and lot of defects to defects states create in the interface as well as in the oxide. So, native oxide out of question. So, now borrow from silicon silicon also you are not using native oxide you are using deposited oxide why not use deposited oxide germanium. So, here again you have the similar problem that you had is gallium arsenide surface preparation surface states to be satisfied passivation and also deposited dielectric. What dielectric will use what technique will use for preparation those were the things that were that are to be dealt with in germanium. Now, let us take it look at the germanium by itself band gap is low bad news that is one of the reasons why germanium got to the back yard. So, 0.66 electron volts that limits its temperature of operation high temperatures. So, if you are not worried about that you may still choose that, but if you can increase the band gaps by some how by germanium by quantization you overcome that problem that band gap can be increased if you very thin layers of material energy band gap can increase. So, that can go now other problem when you think things off is melting point 934. If you reduce all your processing temperature to 500 600 degree centigrade you do not have to worry about that. In a way germanium has tremendous advantages to use metal semi cut metal gate MOSFET when you use metal gate you are not doing that N plus poly doping etcetera and high temperature process is not there metal gate can be done at low temperature. Source drain you can use as metal semi metal source drain contact short key, but again you have to look into the problems which are there for creating the omic low barrier height contacts. P channel MOSFET with the germanium therefore is not an issue because platinum fill side makes very low barrier with this germanium. So, P channel can be made and we also seen if you do passivation with sulfur you can reduce the barrier height for electrons also. So, both N channel P channel can be done with germanium what about mobility 3900 centimeter square centimeter square per volt second electrons almost three times that of silicon may not be as good as gallium arsenide, but it is not a compound semiconductor it is elemental semiconductor you have to deal with only one element in gallium arsenide you have to deal with both gallium and arsenic. So, that way electron mobility is quite good look at the whole mobility 450 silicon 400 gallium arsenide for whole mobility centimeter square per volt second 1000 and almost almost 4 times that of silicon. So, that is the key this is what attracted germanium that is what germanium has come back in this millennium. It has come back because of its high mobility and ability to make omic contacts or the low barrier height contacts to the channel ability to deposit high k dielectric ability to passivate probably those are things key issues to be seen. So, intrinsic air concentration is high you can see that if you make a junction will have leakage unless you are able to increase the band gap. Now, once you have low band gap like 0.66 electron volts the cut off wavelength for optical absorption is 1.89 microns 1.24 divided this is h nu energy is h into nu and nu is velocity by lambda. So, substitute all that you get cut off wavelength that is if the wavelength is shorter than that energy is greater than 0.66 electron volts. So, wavelength is less than 1.89 micrometer all will be absorbed. Today, if you look at the inserted detectors they are all germanium, because you can see very long wavelengths can be absorbed by that germanium detectors are used because of that silicon cut off wavelength is 1.24 by 1.1 that is about 1.1 electron micrometer. So, beyond 1.1 micrometer it would not absorb. Gallium arsenide cut off wavelength is 1.24 by 0.8 1.43 that is about 0.8 micrometer. So, no it is not suitable for those wavelengths. So, optical you can have optical devices if you want to have along with the germanium, germanium is very good, because it broadens absorption wavelength of the spectrum better optonic for auto electronic integration. This looking at a plus side of the germanium challenges, germanium melting point lower than lower 934 degree centigrade. Therefore, metal gate electrodes are used for germanium MOSFET that is not an issue. Conventional poly gate electrodes need high temperature and dopant activation we do not need to do that for germanium. So, we are using metal gate problem water soluble germanium dioxide typically present in upper surface of germanium containing material causes gate direct taking stability, chemically not stable. So, any chemical processing you do it goes off. It is essential to have a surface which is free from germanium oxide because that creates lot of defects. Stoichiometric is germanium dioxide that is unstable. So, it is converted to germanium oxide by reaction with germanium. So, you will have germanium oxide there. So, it is it is required to remove that all these. That is a problem I am not looking to you can use high k dielectric not out. There is no native oxide that is there is no native oxide go to high k dielectric, but surface preparation. Most challenging thing is germanium surface preparation and interface control. Same as what you had with gallium arsenide, same as what you have with the silicon high k dielectric, but there at least you can say I can go a very thin layer of native oxide. I can satisfy that and then I put the high k dielectric in silicon. You cannot do that in germanium and gallium arsenide. Then you just to show this one of those paper oldest paper which I saw thickness. If I have germanium dioxide deposited on that by sputtering technique and if I anneal it at 600 degree centigrade in nitrogen forget about solubility not water. If you anneal it the thickness comes down. Germanium dioxide reacts with germanium to release germanium oxide. So, the germanium oxide is volatile. It comes through the germanium dioxide. So, you see that the thickness of this germanium dioxide keeps on reducing indicating that it has got converted to germanium oxide which has been lost. When that happens the presence of germanium dioxide and very highly defective germanium dioxide present there presence of along with presence of germanium oxide gives rise to very high values of interface density. So, what people have concluded is no good to have germanium dioxide remove that completely. Exactly same conditions was arrived at in gallium arsenide. No good to have native oxide remove that native oxide completely before you do any chemical treatment. So, that is the problem of the interface. Now, leakage if the band gap is low if you make a channel if you make a MOSFET with silicon you saw when you make you dope the channel heavily. You are not going for a show etcetera you make that heavy doped channel. So, that means, the drain is N plus channel is also heavily doped. So, the energy band diagram between the channel region and the drain region will be like this. This is the P type region plus here minus here energy band diagram bends here. Look at this diagram you may say I have got 0.66 electron volts of the energy band gap, but when it bends it bends parallelly the gap between the conduction band and balance band if you go vertically is 0.66, but since this barrier width is very small if you go from here to here that width is very small. So, you may have vertical band gap 0.66 electron volts, but horizontally that thickness is very small. So, the distance between the balance band and the conduction band here will be very small. There are enough states available in the conduction band of N type material. There are enough electrons available in the balance band they can tunnel through that. So, when you apply reverse bias of the order of about 10 to power 6 volts per centimeter which very easily can reach in the drain voltage of couple of volts when the dope minerals are that high you will have tunneling here. So, from that point of view silicon you do not have that much of problem because band gap is wider. So, this gap between these two is not as low as in silicon. So, inability to operate at temperatures higher is one problem higher than 75 degree centigrade because band gap is low junction leakage band to band tunneling B T B T you will hear the jargon used B T B T problem that is band to band tunneling problem for balance band to conduction band tunneling problem. So, that is there. So, that is present here all these lead to high J band to band is which is proportional to that is a formula for this it is inversely proportional to E G square root less the band gap more will be the current less the band gap that gap is reduced. This is what is one of the problems that is encountered. Then, large leakage current due to band B T B T can overcome the can be overcome by the quantization effects in ultra thin pellets that is the solution. So, the band gap increases and the band to band tunneling B T B T goes down. This general physics you know that if you reduce the thickness there will be transfer of carriers from one valley to other valley and the band gap becomes higher. So, you would not be having that problem instead of 0.66 if it goes even to 0.7 you have overcome the problem because it is root of E G. So, this is one of the result which was reported in the transferred units with this is back in 2007. This we got through Professor Saraswath who had come over here who gave a talk he was his slide. So, to say where if you make gallium arsenide thickness very very thin you have the band gap we have the B T B T current gets reduced drastically same with germinium if you make thinner and thinner from 10 nanometer to about 2 3 nanometer if you go down whatever current which was about 10 to power minus 4 amperes per micrometer width of the channel goes down to about 10 to power minus 8 several orders of magnitude it can be reduced because band gap is E G is reduced. So, this is what makes it this is a favorable condition for germinium that means if you have to if you want to use germinium better use it in Berythian films. So, it is better suited for things devices like SOI, but you cannot call it as SOI it is no longer silicon on insulator what is it then G O I germinium on insulator it may not be oxides on insulator. So, people talk of G O I there. So, such devices are the ones which are you have get a pointer to do in this application of germinium. So, with all the positive attitude one has moved forward take a look at what happens. So, positive things are all there if you suitable the handled to take care of the interface state density and also take care of improve in the band gap ok. Challenges related to the surface state density. If you take the free surface of Geremers night this is the conduction band and this is the valence band E V and E C. Gap is 0.6 is electron volts and the neutral level is somewhere here I given as 0.09 or so some says of the round off saying 0.1, 0.1 electron volts is neutral level. Suppose the doping in the if it is a P type material and if the doping is adjusted such that the Fermi level is coinciding with this level actually one can calculate and show that if the doping is 10 to the power of 17 acceptors in germinium Fermi level is coincided with the neutral level. This is neutral level charge neutral level C N L is charge neutral level. So, they used to call it as neutral level earlier I have been using that terminology. Now, people call this C N L you do not have time to say neutral level C N L charge neutral level. So, if it matches with that you know that this charge Fermi level coincided with that net charge is 0. All the acceptors are not occupied charge is 0 all the donors in surface are occupied charge is 0. Now, what is plotted here C is the acceptor densities that is starting from conduction bandage that is the way the density of state C is D I T high near the conduction band lower lower somewhere it is lower and it is becoming practically 0 because it is compensated by this dotted lines here they are the donors. So, normally we assume in the analysis D I T same all through the magnitude is same 10 to the power 12 10 to the power 12 10 to the power 12 this may be 10 to the power 14 10 to the power 13 10 to the power of 5 times 10 to the power 12 10 to the power 12 5 times 10 to the power 12 very small same way donors 10 to the power of 13 12 11 like that. So, it is varying across the band gap in silicon also it is like that you usually plot a some u shaped density of distribution it is not really u it will be some arbitrary shape like this minimum barrier, but it is true that at the neutral level both of them cancel each other at 0 they match above the acceptors. So, this is the situation I will go back to this after this is if we will see this later on this is actually one of those paper which very famous paper for germanium we also gave the Schottky barrier height in that in the previous when we discussed Schottky barrier and showed that neutral level is somewhere there 2007 6 because once germanium become popular people started looking to that. So, we have seen that if the roping level is 10 to the power 17 charge density is so if I take a p type semiconductor and do not apply any voltage to the gate permeable is there. If I apply plus voltage to minus voltage to the gate accumulation that is almost there itself. So, capacitance in the accumulation region will not be affected by the interface states. There are no interface states they are all neutral where permeable is coinciding if it is doping is 10 to the power 17, but if the doping is other than that supposing if the doping is higher then you will have some acceptors coming into picture here. And if the doping is lower you will have the other effects we will just take this let us say you have a material like that you have no problem in accumulation, but what happens see I just put v d c plus v a c where the way you measure the capacitance is bias it with a particular d c super impose a c you measure the current actually the a c current that is how you measure the capacitance at a given bias how much is the a c current that is flowing through the thing that is the idea. So, you sweep the d c and measure that a c current flowing through that sweep it very slowly that that the semiconductor has enough time to come into equilibrium with the applied voltage. So, you sweep it very slowly you sweep very fast you will see the results will be different. So, this is the accumulation now if I apply plus voltage to that ideally what will be what if the interface state density were 0 you would have got it like that capacitance it will deplete it will invert and you have got this high frequency capacitance like that, but the moment you apply plus voltage go from 0 to plus voltage v g is v d plus v a c a c is for measurement what happens to that plus will begin to deplete. The moment it depletes you can see in the bulk formula is still aligned with respect to neutral level it is distance between the formula level and the balance band the energy distance is same the neutral region, but in the surface it has got depleted formula level is flat if it has depleted it has become less p type that means the energy distance between the formula level and the balance band has increased. So, energy band has bent down here now the neutral level is described with respect to the balance band edge. So, on the here it is ok the bulk, but on the surface the neutral level is a 0.1 electron above the balance band. So, all the donor levels are occupied there is no problem, but because the formula level is above the neutral level here now in the surface all these levels are exposed that is these acceptor levels are below the formula level. That means as the energy band diagram bends keeps on bending when you increase the plus voltage more and more acceptors get you know they are below the balance band more and more electrons occupying this acceptor level. So, all the levels here will be occupied by electrons and they are taken from it either from the depletion layer partly partly from the plus voltage that you apply. Combined effect is the plus voltage that you apply to the gate has got two types of negative charges one coming from depletion layer other one coming from the interface state. So, if the interface states were not there for a given voltage that is I am here for a given voltage the depletion layer which would have been let us say w is not and you would have got a particular capacitance. Now, for the same gate voltage because the band bending takes place not only the negative charges are supplied from this depletion layer negative charges are supplied from the interface state also. So, the depletion layer with the let us say there are 100 electrons are required in the absence of interface state in 3 all the 100 come from depletion layer. When the interface state with density is there let us say half of it comes from interface half of it from depletion layer that means same 100 electrons are supplied by the combined effect of interface state and the depletion layer. So, less depletion layer width lesser depletion layer width is sufficient because part of the charge comes from interface state that means capacitance will be higher. So, for the same voltage plus 100 charges are at the gate I am just giving an example 50 from interface 50 from depletion layer. So, depletion layer width usually require 100 all the 100 will come from depletion layer. Now, depletion layer is required supply only half of it. So, depletion layer width will be half of that if the depletion layer width is half of it capacitance will be higher. So, the capacitance does not go down all the way down you will not have inversion, but you will have flat region here you will not have inversion. If the interface state in 3 is are able to respond to high frequencies usually those interface state in 3 is may not respond to low frequencies, but they will respond to high frequencies. So, what happens now is whatever capacitance is there after that depletion layer width guidance sufficient amount of charge comes from the interface state in 3 because that is high. So, almost everything the there is no more widening of depletion layer width. So, the capacitance will be C oxide in series is the depletion layer width which was which has occurred at this point. It is not inverse to inverted at for inverting the voltage of must be equal to twice 5 it is not twice 5 there is no inversion layer, but it looks to you when you measure it at high frequency it looks to you that capacitance is flattened. But if you take the C oxide by C inversion you can get the depletion derivative from there you will see that the depletion layer width is much smaller than the corresponding to twice 5. So, one of the indications of high interface state density is this thing. Now, if you keep changing the frequency you will have the frequency dependence of the capacitance will come into picture. So, this is called pseudo inversion that is pseudo inversion it looks as if that is inverted because it is saturating, but there is no inversion. So, you make a MOSFET with that what will happen nothing no current all that when you change the gate voltage the fellow with the response is the interface state channel there is no charge. So, MOSFET will not work this is exactly the similar thing that shock layer etcetera how absolute when I tried to make MOSFET on germanium by depositing oxide they did not deposit oxide they put a mica sheet on germanium they did not have time to our patients to see how to go about let us put a tality on the top of that put a metal apply voltage see whether the capacitance changes nothing put a contact on source and drain no current that is time at which they came up with the theory of interface states Bardin was a group member came up with the theory for which he got the novel price along with the Bardin-Bradin. Bardin of course got another novel price later on in 1960 for high tc high temperature superconductor he was one of those persons who got two novel prices. So, this is the problem so you are unless you remove the interface state densities you have no chance with n channel MOSFET. Let us see where you have chance for p channel MOSFET where we are looking for p channel devices because you have got very low bar heat there take n type semiconductor if it is w p channel it will be n channel w p channel also p channel MOSFET substrate will be n type what will happen look at that here Fermi level is much above that. So, this is the neutral level 0.1 volt above the balance band I have shown it magnified these are all the acceptors. So, all these acceptors above the neutral level which are below the Fermi level are occupied by electrons that means if it is n type that has taken this free surface no metal there they are taken away from this semiconductor tonars. So, there is a deep pressure there now the interface state density can be so high that was 13 of that order then what will happen band bending will be so much that it will be inverted already. So, even before putting the metal it is inverted you grow put some high k dielectric there nothing happens interface states are there put a metal on the thing it is inverted even at 0 bias it is inverted. So, ideally you would get this characteristic for p MOS plus voltage accumulation negative voltage depletion and immersion. So, even without applying you will have because of that too much of depletion it will be inverted people have observed this thing. So, if I have to come out of depletion and go to accumulation what will you have to do apply large plus voltage all those minus charges which are there it can be taken care of by applying plus voltage. So, that charges or this depletion layer it comes out of depletion layer. So, plus the apply you will have the you know now what happens free surface plus charges that electrons come from here. Now, you divert that electric entire field line from this direction to that direction. See electrons have got the non-electricity here leaving behind plus charges electric field plus minus in that direction I put an oxide and apply plus charge the plus voltage to the gate plus minus will come here. So, these donors which are donated electrons they do not have to donate it comes plus charge comes from the gate. So, depletion it comes out of depletion you can it is a chance for you to go to accumulation till you may not get actual accumulation that will again give you pseudo accumulation that is you will not be able to come out completely through the depletion layer. These are like in fact those who worked on Gallemars-Nein had seen exactly similar effects are seen in Germany. N type germanium E f is located as upper half of the band gap Q A t is negative and large channel will be inverted even at V G equal to 0 germanium P channel MOSFET will not turn off unless V DC is made positive. Even there the capacitance is lower indicates what it is not true accumulation there is still some depletion layer. See when you apply plus voltage to gate what happens here is it is able to bring it out of inversion, but it is not still able to bring it into accumulation. So, there will be oxide in series with the depletion layer. So, you will have that capacitance there lower than that of you have turned off the device alright, but you do not get the oxide capacitance this again will be frequency dependent. Now, let us take a look at what are the things that you can do people have played games, enjoyed making various types of things. First thing is a what did get dielectric will use not G E O. So, they thought let us see I just go through quickly about what we will have tried because that is interesting. In fact, when you go through that sometimes you also see there is something available for you to think as a thought process when you want to do some research. That is why I am going through that germanium oxide nitride they found that is a good dielectric. High quality germanium oxide nitride can be found on germanium by nitradiation of thermally grown germanium oxide. How do nitradiation do? What you do is rapid thermal oxidation oxidize germanium do not allow that to operate do not allow that to react with germanium 500 600 degree centigrade in few seconds rapid thermal processing oxidation followed by that rapid thermal nitradiation. So, you must have a system where you can have oxygen and also ammonia pass ammonia through that 600 60 degree centigrade you have got gallium oxide then gallium oxide nitride O X and Y that is quite stable. High quality thin gallium oxide nitride serves as stable interlayer for integration of novel high K dielectric. You can do that put high K dielectric there that is what was the thought. So, what is high K dielectric that you use? So, you do not only not what want to have that interface with gallium oxide nitride follow it up with high K dielectric same thing that use for silicon half name oxide or any other oxide lanthanum, metrium all those things, but half name oxide zirconium oxide they are the ones people have been using mostly you will see that for high K dielectric use for germanium also is half name oxide. One thing people have got their hands on with the silicon high K dielectric they can do that. So, let us see how things have happened with the ammonium with the gallium oxide nitride and high K dielectric, but there is one more thing that people want to think of let us say without that can you do without that germanium oxide nitride can you do a surface preparation and put half name oxide. There are two things here one is interface passivation other one is high K dielectric. How do you do you use germanium, germanium oxide nitride then high K dielectric or give some preparation that is essential to a surface free of all the germanium oxide before you put high K dielectric. Conventional solution is H f that is not good enough in the germanium you can see that what they have done is in one of the approaches germanium oxide has been resolved see what you want is do do not want germanium oxide then G o 2. So, what they did was you know this is to tell you how much work has gone into this in the past 10 years or 10 to 12 years has germanium nitrate oxide is present put it in a high back tube heat it remove it and then deposit high K dielectric that is one approach to some degree of success with the atomic layer deposition they deposit the high K dielectric like apneum oxide did not get much success that partly I think and also it did not accept because of the cost involved in all these things people were looking other alternatives we did not really catch up with people. Practical solution is based on nitradiation what touching you do do nitradiation with the ammonia then deposit high K dielectric that is what I have mentioned earlier R T P. So, now let us see how it is. So, these are the results you can see how horrible the C V cap C is almost flat C V characteristic of germanium apneum oxide aluminum one case germanium cleaned only with H F that clean with H F other approach would be of course, put in the high back tube remove all the oxide etcetera remove the oxide deposit apneum oxide by whatever technique atomic layer deposition and then put aluminum C V is flat that means there is no it is still problematic other approach was germanium wet means H F treatment wet treatment cleaned treated with one minute with ammonia. So, one is only give H F treatment then the half term oxide did not budge other approach is H F dip remove the oxide because you do not want the oxide then R T P vapid thermal processing at 650 degree centigrade with ammonia that whatever little oxide is there it gives germanium oxide nitride then put the high deposit apneum oxide that gave some C V that means what we are telling is you have germanium oxynitride by R T P then deposit apneum oxide you get some at least response to the DC. I am sure that people had overjoyed by seeing this, but there is lot of it is still did not give the expected values of C V telling that still there are some problems issues in this they did not make MOSFET on this only C V you see most of things are on C V, but MOSFET have been made now then what next Sulfur people came up with Sulfur passivation. So, here what is done is again you have prepared the surface degrees all that IPA and all those things done two approaches one approach A and B clean in first you clean with sulfuric acid H 2 O and then accept it that is suppose to give a clean surface like what you do in silicon, but sulfuric acid it will remove some surface also and then whatever little oxide there hopefully it has gone in H F. They did not do that oxygen oxidation in one approach A after this vapor cleaning they immersed it in 50 percent ammonium sulphide 70 to 80 degree centigrade that is sulfur passivation which I discussed in the last presentation. Sulfur passivation sulfur attaches on to germanium it passivates those diamond mods it at least shifts the neutral region. So, it is a passivant suppose to be. So, you do that in another approach then that RTP approach. So, we are comparing now one is that nitradiation with ammonia other one is in sulfur with the chemical treatment. Sulfur treatment that is very simple do that chemical treatment, sulfur treatment put the for depositions half name oxide see always I K they have choose half name oxide. So, they have got the C B with hysteresis and everything, but you got the this high frequency and low frequency low frequency also was had hysteresis there telling that there are still some interface state. Tensities are there they estimated the interface state density one with sulfur other one is ammonia they found sulfur was better. There are different methods used one is conductance method other one is high frequency low frequency method. The sulfur passivated gave about 2.4 into 10 to power 12 centimeter square per electron volt that is the minimum that they got. Whereas ammonia treated nitradiated one gave slightly higher telling both of them are good or both of them are bad not good enough. Now came the interesting results at this point all these were only the C B and this was in 2006 again at the time people are doing the chemical things. Then came in 2008 we are coming closer 2008 Stanford University Sarsotroop they published a paper excellent interface state density down to down to about 10 to power of 11 or something like that. I have noted somewhere here D A T 10 to power of 3 10 to power 11 what they did was it is very interesting see what you have to worry is the native oxide was the one people were worrying. But what they have shown is native oxide by itself as G O 2 is ok do not allow that G O 2 to react with germanium to release germanium oxide if G O 2 and G O the non stoichiometric G O is dangerous that gives rise to high state interface state density that gives rise to defects in the G O 2. So, prevent heating to high temperature and when you do that oxidation of germanium you have to go to higher temperatures at the P you do still you are going to high temperatures there will be some incomplete oxidation. So, what they did this is a very novel idea O zone O 3 O 2 is oxygen O zone O 3 I think it is available they use O zone for the non stoichiometric more oxidation they did the oxidation as different temperatures 200 degrees 350, 400, 450 very short time they did the oxidation and then this ensures that relatively complete oxidation of germanium takes place you have got G O 2. So, on the top of that germanium G O 2 they deposited in one case low temperature oxide it is S O O 2 C V D 130 degree centigrade low temperature oxide you can do that is there is a process which you can do at 300 degree centigrade silicon dioxide not plasma it is a low temperature of low pressure plasma can damage the interface so they did that. So, all these samples through and which were grown at 200, 350, 400, 450 they did low temperature oxide. Now, first they made the study is a low temperature oxide S O O 2 itself and they saw do it at 250 degrees and 200 degree centigrade the D I T across the band gap from the valence bandage right up to the mid gap. Let me not worry about what method they have used they are all the same. So, they got interface state density at the valence bandage always it is high we have to worry about near the mid gap that was 10 to the power 12 1.5 times 10 to the power 12 at mid gap at 200 that shows that the oxidation was not complete they did that 350 degree centigrade deposited the low temperature oxide S O O 2 made then they put the platinum as the metal gate that is the most C V. So, they got to 350 degree centigrade that graph this is the one interface state density fell down drastically below 10 to the power 12 telling that oxidation is taking more oxidation is taking place it is the direction to go they went to 400 degree centigrade even down it went it went down to almost like 3 into 10 to the power 11 more ambitious over 50 they went the interface state density went up. What could be the reason the germanium dioxide started reacting with this germanium releasing germanium oxide interface state density went up. So, as it went on increasing the oxidation temperature 200, 350, 400 it went on improving but when went to 450 the interface state density started going up. So, what they did was let us we stick to 400 degree centigrade that gives me a better interface. So, instead of depositing S O O 2 atomic layer deposition at 130 degree centigrade this is a very slow process as you have seen it in our laboratory you can use some precursors layer by layer you can deposit aluminum oxide aluminum oxide you can put I am sorry half-num oxide is not a little bit you can put but half-num oxide. Recently in 2012 they have reported the aluminum oxide also we will see that later. So, today we will just see half-num oxide thing they therefore, see then it is the further became better. So, that high-key dielectric we do not know what happened there interface state density went down further. So, this is the interface state density mid gap close to the conduction band close to mid gap mid gap here this is close to 10 to power 11 mid gap is somewhere here 0.66 0.3 this is the mid gap here but 450 was higher. So, conduction band is always you see balance band if you go closer it is gets up as you see it is always like a U curve that is when you go towards the conduction band the D A T goes up balance bandage it goes up but we have to worry what is in the middle because when you go to inversion etcetera it is near that point. So, so long as you are able to reduce the mid interface state density lower value to reduce the interface state density around the mid gap you are in business. So, conduction bandage they showed this that is high but even that comes down quite a bit telling that all the entire band gap the interface state density has got reduced by this process when you do the oxidation at 400 degree centigrade deposit by atomic layer deposition. In fact, whole thing is because this process is even done at lower temperature this is done at 300 degree centigrade absolutely no chance of reaction of gallium dioxide with the silicon germanium. So, you get excellent interface state density there right through the band conduction band to mid gap all the way it is very low. So, I will just go into one more thing here this is the one that has been done in 2009 here they did not do that the ozone probably they did not have the ozone. So, they did not do that this is the any national institute of Singapore people from transfer to Singapore we come back closer. So, what they did was H F treatment they did usual thermally grown 2 nanometers of oxides 400 because they this is that result from transfer to give a clue that 400 seems to be all right but may not be full oxidation because you are not using ozone you get G O 2 2 nanometers that oxide you grow and then deposit 4.5 nanometer of haptium oxide layer by atomic layer deposition same but they did 300 degree using some other curser. So, they did the haptium oxide deposition then after that see they did not use it as it is they used a metal tantalum nitrate metal that is all immaterial that is the one that they have chosen from our production concentration etcetera. So, they did that metal deposition but before that they did some other treatment like chlorine. So, the key thing that it was I will not go through that today I will take it up next lecture but the key thing that it was they did the thermal oxidation and they did the haptium oxide deposition at 300 degree centigrade they incorporated fluorine into interface by using in the C F 4 plasma that fluorine did some passivation of those and dissatisfied interface state and then they did the metallization then they did the forming gas annealing which gave some hydrogen. So, they got very good results I will discuss that in my next presentation to sum up the key thing to do here is the interface state treatment proper and proper high-key dielectric you can get good MOS capacitors here which are where we can make the MOSFETs that MOSFET aspects we will discuss with some more results of this type in the next presentation.