 Let us continue with our discussion on series resistance non-uniform doping and small geometry effects. We recapitulate that the threshold voltage for uniform doping and long channel the expression is given by VT is equal to VT0 plus gamma into square root of phi t minus VBS minus square root of phi t. Now here VT0 is flat band voltage plus gamma into square root phi t. This phi t is so called twice phi f plus 6 VT plus phi t. Now let us go to VT for vertical non-uniform doping and long channel and recapitulate what we did. So what we said is that if you have a non-uniform doping as shown there then the formula for threshold voltage in this case would be as follows where the term gamma has been replaced by K1 which is a higher body effect parameter because the doping here has increased. But in addition you also have a term that is proportional to VBS and that tends to decrease the threshold voltage as your VBS is increased. So you have an increase because of this but this increase is tempered by the additional term. This equation was developed intuitively using a box type implanted doping profile that is we approximated the non-uniform doping by this box and we explained how you can get this equation. And then we said that by adjusting K1 and K2 you can fit the actual non-uniform doping profile situation also. Now here is an assignment for you. Explain with a simple calculation how a PMOSFET of a CMOS technology with VT is equal to minus 0.4 volts turns out to be a buried channel device for N plus poly gate but a surface channel device for P plus poly gate okay. So SC stands for surface channel and BC stands for buried channel. Now let me give you a hint as to how you can go about doing this problem. Since it is a P type MOSFET your substrate doping is N type. Now what will happen if you have N plus poly gate and what will happen if you have a P plus poly gate? So let us write the expression for threshold voltage okay without the body effect parameters. So VT or VT0 is flat band voltage plus gamma square root phi t plus phi t. Now this is for an N channel device. For a P channel device what will happen is this positive signs will be replaced by negative signs and what is the flat band voltage? So the flat band voltage is phi ms minus qf by C ox. Now it is this phi ms term that is going to change depending on whether your gate is N plus poly or P plus poly. Let us see what is phi ms for N plus poly and what is phi ms for P plus poly. Now for that we can draw a band diagram. So the gate with N plus poly this is EC EV, Fermi level will be aligned with the conduction band edge and the substrate is N type. So let us say this is your Fermi level above the intrinsic level. So your phi ms is now given by this small value right this difference because the Fermi level in the gate is at the conduction band edge and what will be the polarity of phi ms? So if you put your E naught this is your q times phi m and this is your q times phi s. So phi ms is phi m minus phi s it will be small negative number okay. So let us write that here. So N plus poly phi ms small negative number okay. Now let us look at the situation for P plus poly. For P plus poly your Fermi level will be aligned with the valence band edge okay and so your phi m is now this much okay. Now what is your phi ms? So P plus poly phi ms is large positive number okay. Now as a result your flat band voltage for P plus poly the flat band voltage for P plus poly would be more positive than the flat band voltage for N plus poly. Now what does it mean? If I show this on a scale like this if this is your minus 0.4 volts threshold voltage required for P plus poly your threshold voltage will tend to be positive and for N plus poly it would tend to be negative than minus 0.4 volts right. So now let us see how will you shift your threshold voltage to minus 0.4 volts. If you have P plus poly you will have to shift the threshold voltage to more negative value to get minus 0.4 okay. Now how will you get more negative threshold? So let us look at your gate and substrate. So this is your gate and this is your N type substrate for P plus for P type MOSFET. Now if you want to change the threshold voltage to more negative value then you should put positive charge in the substrate and how to get positive charge in the substrate by ionized donors right ionized donors. So what does it mean? You will have to increase the doping near the surface okay. Now if you do that the kind of device that you will get will be surface channel because the only way you can create a P type channel in an N type substrate is by inverting the N type region. So that is why in this case you get a surface channel device okay. On the other hand let us see what will happen for N plus poly. N plus poly you want to shift your threshold voltage to more positive value to get minus 0.4 volts. Now in that case I should put here a negative charge. Now how do you put a negative charge in an N type substrate? So the way you can do it is you will have to introduce boron right. So you will have to put a P type region there clearly showing that now you have a PN junction here and this is the so-called buried channel okay. So your conduction will happen through this P type region. When P type region is ionized you have ionized acceptors and they give rise to negative charge and it is this negative charge that is going to require you to apply more positive voltage to the gate to reach threshold and that is how you can shift this threshold voltage to more positive value okay. So that is explanation. You can work this out with calculations. Now let us go on to the new topic of today and that is VT for vertical and lateral non-informed doping and long channel. So we are now adding lateral non-informed doping okay. How do you add that? Now let us write the expression for vertical non-informed doping first okay. Now here is a lateral non-informed doping. These are the halo implants. What will be the threshold voltage when you add these? So here is a box type approximation to the situation where the halo implants are regarded as uniformly doped but with a higher doping NH than doping NA within this region okay. Now what would be the effect of these extra dopants? Evidently if you increase the doping this is an end channel MOSFET. So if increase the substrate doping your threshold voltage will tend to increase. Now we want to find out how much is the increase because of this lateral doping. Let me give you the result first and then show how it is obtained. So the additional term that comes about because of this lateral non-informed doping is given here. Now how is this term obtained? This term is derived empirically and models the fact that lateral non-informed doping effect is stronger at lower VBS. So it is seen from measurements that this lateral non-informed doping effect the threshold voltage at low VBS. In other words we can say it affects the VT0 okay. So what we want to do is we want to find out what is the new VT0 because of these additional dopants. So let us say VT0 is given by flat band voltage plus gamma or let us use K1 because you have a non-informed doping already and then the gamma change to K1. So that is I am saying you have a vertical non-informed doping. So K1 into square root phi T plus phi T. Now when you add the lateral non-informed doping let us say your threshold voltage become VT0 dash and that is flat band voltage plus K1 prime square root phi T plus phi T. We will assume that this phi T is not affected okay by the lateral non-informed doping. So from these two we can write that VT0 prime is equal to VT0 plus K dash minus K into square root phi T. And if I write my K dash as K into a factor F okay so where F is more than 1 why is it more than 1 because the presence of lateral non-informed doping will overall increase the doping in the substrate right. So it will increase the body effect parameter. So F is more than 1 then this term becomes K into F minus 1 okay. So let me write it that way. So this will change to F so this is K into F minus 1 okay. So all that I need to do now is to find this F okay. Now you can see you compare this expression with the expression given here that K is K1 here okay and the F here is this parameter okay. Now we will shortly show that this parameter is obtained by substituting for N as follows. So N is equal to 2 into NH minus NA by NA. Now how do you get this? Well it is very simple what you do is you distribute this extra dopant all over this length to get an average increment in doping. Let us see so what is the new doping when these extra terms are averaged. So you can write that doping as NH minus NA into LX that gives you this area here and similarly you have the another area here which is equal. So I multiply this by 2. So this is the extra dopant charge because of these two rectangles. Now already I have an NA doping over this length L so I add plus NA into L. So this is the total dopant charge here area under this curve that I distribute evenly over L so I divide by L okay. Now if I want to see what is the increase as compared to the previous case without these rectangles the previous doping was NA okay all over. So I divide by NA to get the increase okay the factor that represents the increase. So this is my factor that represents the increase. Now you can easily see that this is equal to this NA L cancels with this thing so you will get one here and this part okay will become N. So the whole thing can be written as N into LX by L because 2 into NH minus NA by NA is N that is what is given here and this is 1 so plus 1 okay. So this is how you get this quantity now but you have a square root here okay. So what we had written in the previous slide let me rewrite here we said that VT naught prime is equal to VT naught plus F minus 1 into K square root phi T. So the F is actually square root of this quantity. Now why are we getting a square root? Now the reason is very simple that when you look at how the doping appears in the threshold voltage formula for example how does it appear in the K? So here the K is actually K1 right. So you know that K1 is nothing but square root 2 Q epsilon SNA by COS. In other words the K1 is proportional to square root of the doping okay and that is why the factor F that will come here will be proportional to the square root of this excess doping factor okay and that is how you get this square root term here. So what do you gather from this? You can clearly see that as your L decreases this quantity will gone increasing and this quantity will increase and your threshold voltage will tend to increase. If you keep this lateral dopant charge constant and reduce L your threshold voltage will tend to increase. So in fact this has been observed that when you reduce the channel length and you have lateral doping threshold voltage increases and this has been referred to as reverse short channel effect okay. Ultimately however threshold voltage will fall for reasons of a short channel effect right that we are going to see now. Let us look at threshold voltage including the effect of non-informed doping and small geometry. To include the small geometry effects we add a term delta VT here. Now as we will see this delta VT will have 3 components 2 of which are as follows. So one component depends on the channel length L another component depends on the channel width W and there is a third component which depends on the VDS okay. Now let me acquaint you with the terminology that is normally used. Change in threshold voltage channel length is referred to as short channel effect. Change in threshold voltage with respect to channel width is referred to as narrow width effect and change in threshold voltage with respect to VDS is referred to as drain induced barrier lowering. We will see why the term drain induced barrier lowering is used to represent the effect of VDS on threshold voltage and this quantity represents reverse short channel effect because short channel effect involves decrease in threshold voltage as your channel length is reduced and here you are getting an increase in threshold voltage right because L is in the denominator when you reduce L that is why this is called reverse short channel effect. Now we shall look at these effects one by one. Let me just acquaint you with the fact that delta VT L is going to be negative that is threshold voltage will decrease when you decrease your channel length okay and delta VT W is going to be positive threshold voltage will increase when you decrease your channel width and delta VT as a function of VDS would be negative again it is somewhat like the short channel effect. Your threshold voltage will decrease as you increase your VDS. We are representing the various effects graphically so that we get a good intuition behind these effects. So here is the reverse short channel effect you can see that this axis is channel length L because the labeling there is too small let me write this so this is L in microns. Here this is about 10 microns and this is here 1 micron okay and this one is 0.1 micron and the y axis is threshold voltage in millivolts so you can see that this is 200 and this is 300 okay and this is 350 you can see how much increases there okay it is of the order of about less than 50 millivolts okay but thereafter you see a fall this is the short channel effect that short channel effect is represented here decrease in VT as your L is decreased. This is the decrease in VT with VDS you can see that what we are plotting here is threshold voltage as a function of VDS if you have a long channel device threshold voltage does not change much with VDS but as you decrease your channel length threshold voltage starts decreasing with VDS more and more this decrease in VT with VDS can also be shown on this graph so here we have shown the VT versus L for two values of VDS okay so when your VDS is more the threshold voltage will fall more as you decrease your channel length. Now there is another effect which we will just mention but not discuss in detail that is reduced body effect so what you find is threshold voltage increases with body bias we have called this as body effect. Let us say this is the kind of increase you have a long channel device now when you decrease your channel length you find that threshold voltage is not increasing that much okay with VDS now this can also be understood with the help of charge sharing approach that we are going to discuss to explain the short channel effect narrow width effect drain induced barrier lowering and so on right so I will leave it to you as an exercise to show this using the same charge sharing concept okay let us look at the short channel effect decrease in threshold voltage for reduced L here is the charge sharing concept to explain this phenomenon you can see that this is the picture of depletion layer in a short channel device as compared to the picture in a long channel device meaning supposing I have to exclude this source and drain regions my depletion region would look something like this but when I bring in the source and drain regions then what is happening is part of the depletion region is being controlled by these junctions so let us say this source and this is drain you can see here this part is controlled by drain whereas if source and drain were not there these parts would have got controlled by the gate as it is here so which is the area under gate control here now this is the region under gate control okay so you can see that because of the presence of source and drain and because the channel is short a significant part of the depletion charge under the gate is controlled by source and drain and the charge under gate control is reducing therefore you can link the change in threshold voltage to the decrease in gate control charge okay that is what is written here so delta VTL is equal to minus of delta QL by C ox we are putting a minus sign because the gate control charge is reducing because of source and drain so delta QL for us will be magnitude of the charges that are going out of gate control okay these two to derive the equation let us introduce some symbols channel length L and depletion width in a plane MOS capacitor right that is YD now let us expand this region that is what is done here this is the n plus drain and this is your edge of the depletion region now here you have a plane junction and therefore a depletion width will correspond to YD the same depletion width will be here because this region is also a plane right the depletion edge here is plane however in this curved region there will be field crowding right your field lines will be more in the curved region recall from the school days that at a sharp corner you have a high electric field and that is why lightning can be you know absorbed at such corners so this field crowding let me illustrate this here so what we are saying is field lines will go like this so you can see that while the separation between field lines at the depletion edge here is more at the junction here in a small region you have a large number of field line this is field crowding and therefore the field is more so if the field is more what will happen is the following now you need to drop the same potential where I move like this across a depression layer or whether I move like this if I want to drop the same potential but field here is more than this evidently the distance over which the field will exist will be less okay and that is why the curve region has less depletion layer and now this is your plane depletion edge which intersects the curve depletion edge at this point now we use an intuitive approach where we assume that if I draw a line from this corner of the junction to this corner where the plane depletion edge meets the curve depletion edge then I can assume that this portion of the charge would have been under gate control is now going under drain control so this is a so-called reduction in gate control charge at the drain end you have a similar gate controlled charge reduction at the source end by the same amount that is why this charge has been represented as delta ql by 2 because delta ql is the total reduction in gate control charge now let us use some coordinate geometry to find out this delta ql by 2 let us represent the depletion width on the surface in this curve region right as excel this excel is less than yd due to junction curvature effect so whatever we said just now I have put it in the slide excel is less than yd because for a given yd the curve junction has higher junction field due to field crowding and hence higher potential drop than the plane junction therefore for a given potential drop the depletion width excel in the curve junction is less than yd okay now simple geometry this is a triangle okay and therefore area of this triangle is half of the height into the base so half of yd into xc but then we have two such triangles because one triangle at the source end also therefore total area corresponding to this is yd into xc so that is what is written here so qna yd into xc this is the area and qna is the charge but you have to take the volume because n is per unit volume so w is into the slide so w is in this direction so you want to get the volume this is like this okay so this is the charge that is shown here in the 3d view and similar charge at the source end so overall it will become this rectangular parallel pipe at volume so inside this the charge per unit volume is qna and this is xc this is yd so qna xc into yd into w that is what you get here but you are dividing it by wl because your c aux is also per unit area so charge divided by area so you get charge per unit area so w gets cancelled and this becomes qna yd into xc by l where yd is given by a square root of 2 epsilon s into phi t minus vbs by qna because you may have a bulk source bias how to get xc to get xc note this source we have discussed in our device processing that when you create a junction by implantation the lateral extent of the implantation is less than the vertical extent okay because this implantation happens through a window here that is why this length is a times xj where a is less than 1 so you can now see that this curved edge is like an ellipse and you can use the formula for the ellipse to get the value of xc the formula for the ellipse can be written as x by alpha square plus y by beta square equal to 1 that is describing this ellipse so y is in this direction x is in this direction and what is alpha xl plus axj that is this minor axis okay and beta is a yd plus xj that is this yd plus xj is the major axis okay now what is xc xc is x at y equal to yd that means that would be so this would be your x okay so x at y equal to yd y is yd this is what it is so this is the point minus this value and that is nothing but axj that is what is written here x at y equal to yd minus axj now what is x at y equal to yd that can be written as xl plus axj into square root of 1 minus yd by yd plus xj whole square now this is straightforward you are writing it using this okay so use you are solving for this actually so you have x by alpha is equal to 1 minus y by beta square square root now this y is yd and beta is yd plus xj that is what is written here okay so this quantity is this and what is alpha alpha is xl plus axj that is what is written here okay so this is how you get this formula now if your junction is circular your formula would be somewhat simpler and this xc okay this whole thing can be written in a simple form as xj into square root 1 plus 2 yd by xj minus 1 why because circular junctions xl will be equal to yd okay and a will be equal to 1 go back to this so xl okay so this quantity will be same as this quantity if the junction is circular and a would be 1 that is this will be xj and this also will be xj that is circle so when you substitute this in this formula okay then this formula will reduce to this I leave it to you to show this is straightforward now if your junction is plain that is if yd is much less than xj okay what this means is your junction depth is very high but your depletion width is small compared to that it is like a limiting case okay the depletion width is very small this is yd in that case your xc will be equal to yd itself so you can see that here yd is much less than xj you can approximate this 1 plus this quantity as with the square root as 1 plus yd by xj then 1 will get subtracted and xj xj will cancel now if you on the other hand have a cylindrical junction of depth xj instead of a plain junction there is a standard formula available derived in some research paper that xl by xj is given by 0.063 plus 0.801 into yd by xj minus 0.011 into yd by xj square where yd is the plain junction depletion width and xl is the curve junction depletion width so you could use this formula as well where will you use this formula so you can use this formula here for xl to get this xc so let us write the results now so plain junctions delta vtl can be written as minus of delta ql by cox which is minus of qna yd square by cox l okay because your xc is becoming yd so you recall that your delta ql was qna yd into xc by l so qna yd into xc by l but xc is becoming yd itself if it is a plain junction okay and so this is becoming yd square now yd we know a square root of 2 epsilon s into 5t minus vbs by qnd so yd square you have written here and sorry denominator is na not nd and this qna and the qna in the denominator of yd square will cancel so that is what is happening here cox is epsilon ox by tox okay so that is how you end up getting this formula showing that your threshold voltage as a function of l is simply given by this simple formula okay it is inversely proportional to l now in real junctions you can continue to use this with a fitting parameter or adjusting parameter beta 1 okay and beta 1 you can adjust to fit the measured data so this way you can get a simple form of expression in which parameters can be extracted experimentally now the expression we have derived can also be used to get reduction in threshold voltage with vds in fact it did contain the effect of vbs let us see how plain junctions let us take the simple plain junction case now we know that square root of vt plus sorry square root of 5t plus vdb you can write as so this is approximately equal to vdb is nothing but vds minus vbs okay now if your vds is small then I can write this using binomial theorem approximately as square root of 5t minus vbs I take this out into 1 plus vds by 2 by 5t minus vbs this straight forward so you can see here so this quantity I can write as 5t minus vbs plus vds by 5t minus vbs okay so quantity in the square root I can write like this so when I want to take a square root I will take like this and then if I want to remove the square root for this I can put the square root here I can divide it by 2 that is what is coming up here now I am going to use this approximation to get the reduction threshold voltage with vds here is how we go about doing it now we write delta ql by c ox in this way where you have yds as well as yds plus ydd because ydd is little bit more than yds why is this so because you have applied a vds and as a result your drain depletion width has increased somewhat so this is what it is this is ydd and this is yds and so you have lost some charge here and you have lost some charge here and so you have to take both these charges now when I take this charge I will get yds square as we had discussed earlier and that is why this yds into this yds gives you yds square on the other hand when I want to take this charge I will have to use ydd into yds why because you see this quantity here is approximately ydd because this is ydd but this quantity is approximately yds okay this depletion width is approximately equal to this depletion width so that is why you have yds into ydd here so when I sum these two up I will get this expression now I am going to use this approximation to write an expression for this now I will leave it to you as an exercise to show this okay because it is straightforward I will give you what is yds and what is ydd so yds is square root 2 epsilon s phi t minus vbs by q na and ydd is the same thing except that here you will have minus vbd by q na this minus vbd you can change to plus vdb and similarly this minus vbs you can change to plus vsb now square root phi t plus vdb is given by this formula you can use this so this will enable you to write the formula this formula in terms of this and then you substitute those things here and you can easily show that this is what you will get now this is your result for a real case okay now before we go to the real case now if I want to separate out from here this formula the variation with respect to vds then I just take this part alone because this multiplied by this was the variation because of short channel effect okay so I am separating out the effect of vds now for real junctions you can introduce an adjustable parameter beta 2 okay to fit measure data for nonzero vbs and you can get this expression now let us look at the decrease in threshold voltage with vds from another point of view namely the drain induced barrier lowering okay what exactly is it now this concept can be well understood with the help of numerical calculations of the surface potential as a function of x in a MOSFET okay so this is the so called channel in which your potential is varying something like this first look at the solid lines they correspond to vds equal to 0 for different channel lengths so this end is the drain and this end is the source and this is nothing but the built in voltage between the source and the substrate or drain and the substrate okay the built in voltage of this this is what is written here as phi bi and we are plotting the potential along this surface okay from this end to this end this is channel length your depletion region is something like this so when you plot your surface potential you know this is how it will look for vds equal to 0 this for a long channel device it goes like this why is the potential less in the channel as compared to the junction here well that is the reason for that is very simple you look at this picture here in this region you have field like this okay and potential drop if I take substrate as a common reference then with reference to substrate your potential here is built in potential okay at this point this is the phi bi but when I move in like this because I am moving in the direction of this field which is lateral my potential is falling however when I come here the potential becomes constant because the field is now vertical so if I move in this direction the potential won't change potential will change so long as I am going in the direction of the field right but if I am going perpendicular direction of field it won't so once I come out of this region controlled by source field will be vertical potential doesn't change so that is what is happening here so potential decreases then becomes constant then again increases when you come here because you are moving against this field here from the drain that is what you get now you reduce your channel length okay this is what will happen this is what is the picture okay now let us look at the picture if I apply a vds right that means I am applying a positive voltage to this this is grounded and substrate is also grounded then what happens the potential at this end has been raised up that is what is shown here okay this is 0.5 micron channel length vds equal to 1.5 volts you can see here that this 2.5 volts is 1 so this difference is 1.5 volt and built in potential is about 1 volt okay when you reduce the channel length your potential variation will look something like this now when you reduce the channel length very much when you come to 0.2 microns what you find here and this numerical calculation is that the minimum potential here has risen a little bit as compared to the minimum potential for the long channel case okay so increase in potential what does it imply if you convert the potential to carrier concentration increase in potential minimum potential means increase in electron concentration here okay because potential is related to carrier concentration right by Boltzmann relation and increase in electron concentration means what your current is going to increase which means your threshold voltage has reduced because now for a higher vds you are getting slightly more current okay then you would have anticipated earlier please note this increase in current is not because of increase in vds but because of increase in carrier concentration because of vds that is why this amounts to reduction in threshold voltage. Now this is referred to as barrier lowering because what we have seen here is conventional surface potential which is for a positive charge if you convert this to a negative potential because of electrons then conduction bandage so if I want to show the conduction bandage so this same potential variation will appear as follows like this this is conduction band variation so rise in minimum potential here would be equivalent to fall fall in potential so for long channel device your potential may be like this and for short channel device so this much is the fall so in other words this is the barrier height and that barrier height has reduced okay that is why it is called barrier lowering. Drain induced barrier lowering because it has been induced by voltage at the drain. Now let us show the various short channel effects on IDVDS curve channeling modulation will be seen somewhere here drain induced barrier lowering will be seen for somewhat higher drain source voltage and then you have what is called substrate controlled body effect region right here change in threshold voltage because of increase in your VDS okay so this substrate controlled body effect I will leave it to you do a Google search to understand what is this effect okay and I will move on to some of the other effects namely increase in threshold voltage with reduction in channel width let us look at it in a low cost device local oxidation now you recall we have discussed various methods of isolating MOSFETs one of them is low cost and another method is shallow trench isolation that is STI okay so for that the picture may be different so first let us look at it for the case of low cost why the threshold voltage increases when you decrease your channel width we are using the charge sharing concept here now this is a 3D view this is a depletion region actual depletion region you can see that there are corners here extra depletion charge as compared to the approximation where you assume the depletion charge to be restricted below the gate okay the same thing is shown here as a side view so you can see that because of this fringing field here you have extra charges so the gate is controlling more charge than you thought right based on your idealization if the gate has to control more charge definitely the threshold voltage will increase now this is a picture in a low cost so this was the picture in a simple device where oxide thickness was same now in a low cost your oxide thickness increases in the isolation region okay so all that is going to happen is your increase in threshold voltage will be a little less that is all as compared to this because you can see here this charge has somewhat reduced as compared to this because of this increase in oxide thickness and fringing field has reduced so the effect is shown here threshold voltage increase when you decrease your width W as against this for shallow trench isolation the threshold voltage actually falls when you reduce your W the reason is shown here so shallow trench isolation picture is as follows where the depletion region is controlled by gate no doubt but there is an extra fringing field from the side to control the same amount of charge okay this extra is field is coming because of the presence of this insulators which is isolating the device from another device in other words this extra fringing field can be translated to higher capacitance so you have a higher effective gate capacitance controlling the same charge and since the capacitance comes in a denominator in an expression for threshold voltage it will decrease the threshold voltage so that is what this is so for shallow trench isolated device threshold voltage decreases when you decrease W now let us look at some sort of an expression for threshold voltage increase with fall in W in low cost we write the formula delta V T is equal to delta Q W by C ox where delta Q W is this excess charge now a simple formula for the excess charge would be if you assume some quarter circular corners Q NA into pi by 4 into YD square right into L multiplied by 2 divided by W L so how do you get this formula very simple this quarter is pi YD square by 4 if you assume YD to be the depletion width and this to be circular so pi YD square by 4 is this quarter now you have another quarter here so that is why I am multiplying it by 2 that is the 2 coming here okay and then you have to take the volume so you go in this direction you get W right I am sorry in this case this is L because this is W so that is how you get this L to take the volume right so this is something like this so this is L and this is YD so the volume is pi D square by 4 into L and you take both sides you get this and you are dividing it by W L because your charge should be considered per unit area because capacitance is also per unit area now that formula therefore reduces to this where as we have written out already in the previous slides YD square depends on pi T minus VBS okay and the Q and A term has got cancelled with the Q and A term of the YD square come in the denominator so all that you do is for low cost use the same formula but put a correction factor beta 3 which is less than 1 because the amount of charge here is less as compared to this case so this is therefore your formula for narrow width effect finally let us look at the shallow range isolation case fall in VT for lower W now in this case we can write the delta VTW as QB that is the bulk charge that is controlled that is here by a higher capacitance right so here what we are doing is we are adding the fringing capacitance from the side now how do you add that capacitance now your C ox is the gate capacitance per unit area therefore you are multiplying C ox by W L to get the capacitance okay in farads so that you can add the fringing capacitance now you are putting a 2 here because the fringing capacitance come from this side as well as from this side okay and then you are dividing this whole thing by W L again to get capacitance per unit area because your QB is also per unit area that W L goes up because it is coming in the denominator of this term it goes up now that is your actual potential drop okay because of QB by effective C ox now you subtract the QB by C ox which would have been the potential drop right in the oxide if your capacitance did not have the fringing effect okay so this difference gives you the difference in VT or delta VT so rewrite the same thing in this form which you are approximating here because fringing capacitance is small okay so this term is small compared to 1 so 1 by 1 plus x is 1 minus x so 1 1 cancels and minus x becomes plus x so you are left with 2 CF by C ox W L okay now I am going to pull out the fringing capacitance formula without deriving it from literature now this given by 2 into epsilon ox into L by pi into logarithm of T Fox T Fox is this this is field oxide thickness of field oxide whereas T ox is thickness of gate oxide that is this so T Fox by T ox plus square root of T Fox by T ox square minus 1 okay now though we are not deriving this formula let us at least become comfortable with its form you can see here that if T ox and T Fox become equal in other words I go on reducing this T Fox okay so that it becomes equal to T ox then the fringing will vanish and your fringing field capacitance should be 0 let us see if that happens so you put this equal to 1 this becomes 0 and T Fox equal to T ox so this is 1 so this bracket becomes 1 so long of 1 is 0 so it is indeed reducing to 0 for that case at least one limiting case we have checked now you can approximate this using the fact that T Fox is much greater than T ox so you can neglect this one so you are getting twice T Fox by T ox here using this formula this term can be written as 4 T ox by pi W into ln of T Fox by T ox you can write this as some factor F by W and this minus QB by C ox you can write as square root 2 Q NA epsilon is into phi T minus VBS by C ox is epsilon ox by T ox so this T ox goes up so you can substitute this quantity here and this quantity here and then you will get delta VT W writing the final expression I will leave it to you now we are coming to the close of this module or end of this module finally we just want to mention some other short channel effects namely decrease in sub-threshold slope with decreasing channel length now this occurs together with decrease in threshold with decrease in channel length and with increase in VDS ok so sub-threshold slope decrease with increase in with decrease in channel length that is indicated here ID versus VGS on a semi log plot when your L is large you have this curve you go on reducing your L your curve shifts as shown here so for very short L you can see here the this slope is less as compared to this slope this is so called decrease in sub-threshold slope ok now this extreme case actually corresponds to what is called punch through that is shown here that is the depletion region from source and drain are meeting each other and thereafter the gate is losing control over the channel region completely now this not much change in ID with change in VGS actually this is reflection of this kind of punch through effect right that is gate losing control all together and your IDS versus VDS curves in such a situation will look something like this so you find that as you increase your VDS the current goes on increasing right you do not have any saturation effect this is the kind of punch through that can happen in some devices ok where the punch through is happening inside the substrate away from the gate ok this kind of punch through will happen if you have uniformly doped substrate but if you have non-informed substrate where you have higher doping near the gate ok to increase the threshold voltage and so on right decrease channel length modulation and things like that then the punch through will happen deep inside for higher value of VDS the curves are shown by the dashed line ok so you can see here in the long channel device the VDS has little control in the sub threshold region so your sub threshold current does not change with VDS for long channel device but as we decrease the channel length the VDS starts having control ok because you are getting drain induced by lowering threshold voltage is changing so that is shown here ok now with that we have come to the end of the module let us recapitulate the learning outcomes and summarize the main points at the end of this module you should be able to show that the effect of series source drain resistance is equivalent to a reduced mobility due to transverse field derive an expression for the effective channel length including channel length modulation derive an expression for the threshold voltage including vertical and lateral non-informed substrate doping short channel effect narrow width effect and drain induced barrier lowering finally here is a summary of the small geometry effects on VT effective VT decreases when substrate doping decreases oxide thickness decreases channel length decreases assuming no lateral doping or non-informity so that is reverse short channel effect would not be there if there is no lateral doping non-informity then effective VT decreases when junction depth increases ok or when channel width increases if it is low cost technology or decreases in shallow trench isolation technology with that we have completed this module on MOS