 Hello and welcome to this presentation of the STM32 Interconnect Matrix. It covers the main features of this matrix, which is widely used to connect various internal peripherals between each other. The Interconnect Matrix, integrated inside STM32 products, provides direct connections between peripherals. Applications benefit from these interconnections to ensure time predictable operations to decrease power consumption by avoiding complex management of peripheral communications through reading and writing registers using CPU instructions and, in some cases, reducing the need to loop the signal from a source to a destination through a dedicated GPIO. The Interconnect Matrix offers two features. First, it ensures direct and autonomous connections between peripherals, allowing removal of latency in regards to software handling, thus saving GPIO and CPU resources. Second, the interconnection between certain peripherals can even operate during low power modes. The main peripherals having direct autonomous interconnections are timers, analog IPs, clocks, extended interrupt and event controller, digital filters for Sigma Delta modulators, USB and system error for the connection sources. And timers, analog IPs, digital filters for Sigma Delta modulators and direct memory access controllers for the connection destinations. Peripherals can be interconnected using the Interconnect Matrix even when the circuit is in a low power mode. The low power modes that can be used are run, sleep and low power sleep modes, except for the USB to Timer 2 connection, which can only be used in run and sleep modes. The connections from the real time clock or comparators to low power timers can also be used in stop zero, stop one and stop two modes for low power timer one. The Interconnect Matrix is mostly used for synchronizing or chaining timers, for example allowing a master timer to reset or trigger a second slave timer. Triggering an ADC, DAC, digital filter for Sigma Delta modulator or comparator through a timer event or an external interrupt. Triggering a timer through an ADC or DFSDM watchdog signal when a predefined threshold value is crossed by the analog input. Timers can also be triggered by DFSDM short circuit detection or by a real time clock interrupt at a given time or in a regular interval. Timers can also be triggered based on a comparator output value or when a USB start of frame is detected. Triggering a DMA data transfer from memory to the DAC by a timer to allow a frequency controlled conversion. Calibrating HSI 16, MSI or LSI clocks, for example measuring the external oscillator LSE frequency by a timer clocked by the calibrated internal oscillator. Dual ADC mode, using ADC1 as the master to trigger a start of conversion for the ADC2 slave. Monitoring the temperature of a connected internal temperature sensor or the VBAT to ADC voltage. Analog IP interconnects, for example connecting an op amp or DAC to an ADC or a DAC to an op amp. Protecting timer driven power switches through the direct connection of system error signals to the timer break input. And infrared pulse modulation signal waveform generation using two timers. On STM32L45X46X49X4AX devices the internal ADC results can be directly connected to the DFSDM inputs in order to use the DFSDM filtering capabilities. This slide shows a simple example of timer synchronization. The timer 3 is used as the master timer and can reset, start, stop or clock the timer 2 configured in slave mode. In this example timer 3 is clocking the timer 2 so that it acts as a pre-scaler for timer 2. For more details about the interconnect matrix refer to reference manual for STM32L4 microcontrollers.