 All right welcome everybody. It's really nice to be back in Austin, and I'm excited to be running the risk 5 buff My name is Stefano some of you may remember me from my days working on the Octo project or in open-source firmware Currently I work at risk 5 as a director of technical programs which basically means I'm helping to ratify many specifications to extend the risk 5 ISA and Really helping to forge what is an open-source ISA development process that up till today has not been well defined And we are hopefully charging forward with that. So this is a buff It's going to be a pretty open Q&A discussion session But I prepared some slides just so folks can kind of get some fodder for asking questions Feel free to stop me during any of this presentation just raise your hand and we can chat and then when I get to the end I'll open up the floor for discussion So the talk is pretty straightforward. It's just going to be Where we've been where we going and how we're going to get there In terms of where we've been last year was a pretty busy year for us over at risk 5 international We had a pretty large backlog and so we were able to ratify 16 specs the specs that we ratify you can think of them as a group of Extensions to the risk 5 base ISA and so there were 44 total extensions that were added to the risk 5 ISA 46 working groups in total. It is a rather large community a lot a lot to a lot of work getting done we have committees that oversee special interest groups and then the task groups that are actually getting the work done that are ratifying specifications generating standards and Doing the work that needs to be done This year we've already ratified three specs and one extension I'll call out two of the specs that we ratified supervisor binary interface SBI and the UEFI protocol. These are both things related to platforms, which I'll talk a little bit more on another slide But stuff that might be interesting to you And then we're also still forming new groups so we spin up these special interest groups so that they can be a center for discussion and then they those special Interest groups will go off and start task groups to actually do the work So I've told you what we did last year. What's coming next? Well, I mentioned platforms Platform standardization is going to be rather important for risk 5 We're currently suffering from chip shortages and supply chain problems So there's not a ton of hardware out there But there's a ton of hardware that will be coming and for those of you who work on software We would really like to standardize those platforms so that you're not seeing a completely different beast every time you put a new board on your desk so those efforts profiles platforms supervisor-executionary environment and Unified discovery those are all essentially an aid of a platform that's standardized So that company a can produce a platform that looks just like companies bees from the software's point of view It's making your life easier. There's also some other standards We're working on things like advanced interrupt packed SIMD things that I'm sure you're all be interested to see We're hoping to have most of this done by the end of the year early 2023 As far as more work that's being done We do have a lot of specifications out there that I think will be interested to the embedded folks Specifically code size that's been brought up in a lot of our different working groups as a thing that risk 5 needs to concentrate on So we have a group of extensions that are gonna aid in code size reduction And then also we ratified a scalar version of cryptography extensions for risk 5 last year and a vector spec now that the vector spec is out We're gonna start working on cryptography related to vector. So that's another thing that lots of folks are interested in seeing How do we get there that sounds like a lot of work that we're gonna be doing and as such we have a pretty large Community internally at risk 5 so risk 5 membership is needed for isa development for developing standards and extensions But it is free to join. This is how we lay out our organization. This is how we're getting that work done You'll see some horizontal committees the horizontal bars there. Those are the places that oversee high-level work So specifically if you're interested in software, we've got a privileged software IC and application and tools HC those two groups essentially split up the software between the Privileved which you can think of as operating system firmware type stuff and then application and tools essentially everything else So if you're interested in software and you're interested in membership, that would be a place to get involved The rest of the groups all work on strictly Specification development. So you see the unpriv and priv ICs. That's where a lot of the specification development work happens Developing specifications is probably easier than you think if you've never done it and you're interested it actually at risk 5 Looks a lot like software development We store all of our specifications in a format called ASCII doc Which is a type of markdown on github if you're interested in contributing you send a pull request if you find a bug You send an issue. It's pretty much like software development, but in the standards world So if you are interested I highly recommend looking at membership as I said It's free and you can contribute to specification development That being said I'm pretty sure I'm at the embedded Linux conference So I figured I should probably mention some software that most of you will be interested in This is the eye chart that I show when I give presentations at lots of conferences The thing that I'm trying to get across here isn't so much that your vision is going But rather that we work with a ton of communities at risk 5. There's lots of different software communities We're working with We're trying to build open source from the ground up. So we're starting at the ISA level We have a golden model written in a language that came out of Cambridge called sale We have architectural tests that we're standardizing around and the stack builds from there and it's open source all the way up So it really is an effort where if you're used to working in open source We're trying to make this as painless as possible and as a result our Members and community members Have developed several stacks that they're currently booting on products This is software that's out there in the field today that our costs are members risk 5 members and community members are using That is not to say that these stacks are complete and flawless and don't need any work on them whatsoever If any of this is interesting to you, please do join our community and help us move this forward There's work that needs to be done in lots of these areas Speaking of our community and work that needs to be done. This is how you join the community I mentioned that you do need to be a member if you're interested in working on ISA specifications You do not need to be a member to contribute to risk 5 You can get involved by heading over to the wiki to get started You can head over to github where we store not just our specifications But all the software that we're working on all the firmware that we're working on is all up on github And while we have member mailing lists for that, you know Specification development discussion. We have public mailing lists for things like software development SW dev and hardware development HW dev so these are places where even before you're a member you could already get involved and join the conversation and ISA dev where we Talk publicly about the specifications before a specification is ratified by the board and by the TSC the technical steering committee We give it a 45 day public review period on that list ISA dev So a public mailing list where before we put the stamp on it and say okay We're going to ratify this anyone from the public and comma Now that being said if you're really interested in spec development You don't want to get involved much much earlier on and membership is free But this is a chance where you can see what's going on in risk 5 before the ratifications actually happen So those are all the slides I had today I'll leave this up for you to Take snapshots of I'll open the floor up to discussion and questions If you have a question that no one can answer including myself. I have my card I will give it to you and I will find someone who can answer the question you have So I'll open up the floor. I have more slides with roadmap stuff on it If you're bored and want to look at road map slides I'll I'll go first good scared someone into asking a question once you break the ice everybody I'll flood out a question so We are a Kind of real-device widget company who's in the process of working with another third party to develop a chip But we're kind of down in the RV 32 space deeply embedded bare metal and I feel like a lot of the risk 5 environment is is targeted more at RV 64 and Lennox and like that whole stack of stuff you showed there right none of it's going to apply to my property So I guess I'd like to kind of hear One like how can I help in terms of making sure that RV 32 in low level is is where it needs to be? Right and and to kind of speak to what's going on in that space And yeah, one more the the click in particular is one that we're interested in excellent. Yeah, so I'll start with the click because that's easiest So for those who don't know the click is the core local interrupt controller So essentially the I would say if you're looking at interrupts, it's the furthest one down the stack So the interrupts get more complicated from there If you're interested in what's going on with the click Again membership is free for individuals and there is a group that meets to discuss interrupts There's sort of the high level group that meets that's just looking at the big picture But there is a group that's discussing work on the click. So that is a way to get involved there in terms of Essentially what's going on bare metal Two things I'd say first would be the real-time stuff that's going on So Zephyr free RT thread not sure if that's applicable to you at all, but okay So I've been working with the Zephyr community and the free RT community and now just recently RT thread I'm trying really hard to get a group of People interested in our tosses together to form a sick one of the problems I'm having is leadership People are very interested to come to that SIG meeting, but I would like to not lead it Not being a real-time expert. So if you know anyone who might be interested in doing that It's not a ton of work to run a SIG. It's essentially one meeting every few weeks and Paying attention to a mailing list so that questions Essentially get bubbled up to somebody So that's kind of where the next step is going there in terms of bare metal I assume our soft CPUs interesting to you at all Okay, so yeah, so the other group that I'm interested in forming So there's a big soft CPU group that works with FPGA stuff as sort of a side note to seed more questions But in terms of bare metal work, that's not soft CPU I am interested in forming a group that focuses on hardware implementations It's a little delicate to do in an open-source community because especially at risk five We try to stay away from implementation But I'd like to enable folks at all levels to build products And so a big part of that is folks getting together to ask questions about hey, how did you do this? I see you got this product out the door and we're struggling with this How did you do that? And that's an open forum which I can create and foster so I'm definitely interested in doing that I've had folks in the mobile and laptop space talk to me about that But now I've just had someone from the real from the bare metal space talk to me on that so My cards up here Let's connect afterwards and we'll see if we can tie you into that group as it gets going There's one virtual question. All right. What is the status of profiles? What a great question. I feel like that one was seated So let me give a quick rundown of profiles and platforms for folks. So The way a risk five is structured The ISA you have a base ISA the base ISA is RV 32 I RV 64 I or RV 32 E These this is essentially the core of what risk five needs to To process to be a CPU Everything else is layered on top. So if you want to do multiplication, it's an extension. It's layered on top M If you want to do compressed instructions, that's layered on top The only differences in the base really are the 32 bit 64 bit 128 bit and then I or E E for Essentially embedded where they're cutting down the registers from 32 to 16 to save space where that's applicable Everything else is layered on top a Profile is going to define in a standard way. What can you expect to be in your risk five implementation? So if I'm gonna ship a risk five implementation that boots Linux I'm gonna want the letter G after after RV 64 I That denoting those extensions that Linux expects to be there I'm not gonna rattle them off because I don't think they're all in my head and I'll miss one and someone will call me on it So that's what profiles entails now. Why are we doing that? What's the point to standardizing that concept? Well, we want implementers to be able to go off and implement something that The software community when they go to build platforms with it will know. Oh, I have an RV 64 I G implementation. I know what's there. I know I can kind of multiply divide float double all this stuff is there So I know I can boot Linux, but we want to kind of take it the next step further to start to push the envelope We want to seed the community with the opportunity to do more work in more interesting areas So by creating a profile that's more complex those profiles will then encourage implementers to create Conforming profile that adheres to that standard and has those advanced features in it And so we're sort of forcing and folks to push the envelope and build more interesting products Now, what's the state of that was the original question? I believe It's the technical steering committee's job to decide on what goes into a profile and what goes into a platform Because at the end of the day, we're not building platforms. We're not creating implementations But we'd like to create a good interface for the community to use So we will discuss that end of platforms from a profile standpoint It really is just discussion among the technical steering committee about what they think the community wants to see Current state of it is they know people would like to see Linux booting on risk So I'm pretty sure you're gonna see a profile coming pretty soon that adheres to that idea I can't give you a date on that because we're currently working on that with the TSE However, it does raise the idea that if the community is interested in seeing different kinds of profiles There are mailing lists on that screen in front of you where you could Discuss that and that discussion will filter up because of yours truly to the TSE and that discussion will happen on We're hearing this from the community. This is the kind of profile we're gonna create And if you think about how we've developed ISAs and specifically platforms in the past, this is an interesting idea Because it's not the customer not the person buying the chip that's telling us how we're gonna do our job It's the people who are helping to work on the infrastructure So that's that's the way things are turning with risk 5 and I think it's an interesting opportunity for folks Hopefully that answered the question Another virtual all right virtual What is the reasonable limitation on number of risk 5 cores on the chip? That's also a good question Are there any PhDs in the room Didn't see any hands go up I can tell you what I've seen I've seen thousands of cores So a thousand cores on a machine came out of Esperanto My knowledge of multi-core does not Span deep enough to tell you. What is the practical limit? however My contact information unfortunately is on a car that you can't see If you type my name into Google I Have a unique first and last name and you will find me and I can find an answer to that question Most likely coming out of an academic institution, but I can't help you with that Unless did anyone here want to answer that question it is a boff Discussion around the limits of core implementation. Okay other questions or thoughts discussion topics So are there any soft CPUs that have actually taped out? Yes, there are several Yes, there are soft CPUs that so Jeff wrote did write an article on that so and I mean it's dubious, but because it came from Jeff row I'd like to go on record saying that No In terms of stuff that's been taped out I would go look at the work that Berkeley did because that's that'll sort of get you in off on the right foot because that's I think where the inception of risk 5 came from was a bunch of folks at Berkeley creating soft CPUs for an educational purpose and then me like hey why don't we tape these out and then looking at the results and then by 2015 it was you know actual Implementations folks were looking to put out into products. So yeah, I think they're boom core BOM is the it was one that they've taped out that runs Linux, but from there You can go out from there. You can also look at What's the one open Titan uses ibex ibex is a much simpler 32-bit core that is used in Open Titan, which is I believe a trusted platform module that came out of Google that is open source I Believe that's been taped out. I believe that's been put in products So if could I go buy a dev kit or something and start with open Titan? Yes I believe there are dev kits out there and if I am a liar Then let me know and I will find from somebody at Google how I can play around with open Titan in an actual chip Because I know it's been implemented on product. So I have to imagine there's a dev board out there somewhere What would hope thank you other questions also an opportunity to throw tomatoes at me Often you get this chance at a bath Do I did not however bring fruit I was just gonna ask if you can expand on the advanced interrupts that you had listed up there Yes, so advanced interrupts a I a so that is a pretty new effort in terms of so you've got in terms of interrupts You've got the click core local interrupt controller the platform local controller click and a I a Advanced interrupt architecture is a group that's essentially taking the next step adding more complexity and more features to interrupts Can't tell you much about it But I can give you my card and there's a mailing list where they're discussing it If you want to be a member and if not I can just connect you with folks who will be happy to discuss it with you If no one in the room is asking questions that folks virtually are Next one is how really promising to use risk-vive cores to offload the computation Into star age device space and your road maps for this sure. Yeah so I Think what the question is it's it's moving compute off the CPU and into other areas Storage is one. I haven't thought a lot about but in-memory compute is probably What I would recommend that person look into in-memory compute is becoming much more popular It's getting the compute closer to the memory. It's being used in AI and ML and I would recommend that person look at Esperanto in terms of companies. They're doing cutting-edge type things with risk-5 cores I don't know if they're doing in-memory compute, but the folks at Esperanto or the folks I would ask about who is doing in-memory compute This isn't a question, but someone commented VESC risk 5 is an excellent soft core. Check out Linux on latex I could totally be pronouncing this wrong. Sorry. How's it spelled? Like Linux dash o n dash L-i-t-e X Okay, no another question any updates on Tee and something similar to TF dash a for risk 5 yep trust Yeah, so for those not in the node trusted execution environments Tee Many of you will have heard of Intel SGX and arm trust zone and then TFA trusted firm where I believe they stand for application. It's been a while But yes, there has been a lot of progress So PMP is risk 5's trusted execution environment set up the base layer PMP physical memory protection is Essentially the core of what will allow us to have some trusted application environment to work in We recently extended that with E PMP extended PMP or enhanced PMP into the next layer So PMP is sitting at the machine layer the M layer of risk 5 you have machine Supervisor hypervisor and user so sort of think of the same privilege levels that you have in other architectures So we have PMP at the machine level. We've recently brought it up into supervisor level and we're working on things like IO PMP and my the real interesting work that's going on not to sort of get out of the hardware and into the community but The real interesting work that's going on right now is in the security Horizontal committee because what they're discussing is the entire software model or sorry security model So trusted execution is just one part of the security model But if you go look up arm trust zone, you'll see that there's a whole you know Ecosystem of security Enablement that happens in that arena. So while we've enabled sort of that core level that you need to get that work done We still have a lot of work to do to create an entire stack or an entire solution that you might use There are a lot of folks out there that have already implemented PMP in trusted app Sorry tongue twister in trusted execution environment applications However, they've done that sort of on their own We're bringing that in and getting as much of that stuff open source as we can So as much of the stack that can be open source, we will open source and show, you know Here's how one might do that implementation in terms of open source implementations that are out there today I would take a look at Keystone that is One one current solution that's out there and will I'm sure take advantage of any of the new features that we come out with? The virtual community is very strong in here. This will be a test because someone dropped an answer in this So we'll see if you give the right answer. Oh wow. All right Any news on cheap community oriented risk five Linux capable boards? Yes No, that's a good question So I think I mentioned at the beginning of the talk We are suffering from a chip shortage and supply chain problem, especially in risk five That being said, there are some boards out there. The D1 board is one I take a look at the D1 chip I'm not gonna be able to remember the name of the company that made it though The D1 chip came out of Alibaba. I can't remember the actual manufacturer of the chip Pardon all where thank you see Thomas is here to correct me So there are a couple of boards that implement that that is about as cheap as it gets right now There is also a vision five board from star five a little bit more expensive gets more into the $200 range The D1 is closer to a hundred However more important than any of that. We have a developer board program so if you go to our website and you head over to the development board Program that's linked somewhere right there on the front You can sign up to receive a free development board It'll either be a D1 or a vision five right now as new boards come out We will be shipping boards out to the community The idea is we'd like to seed the community with the ability to do work based on projects So you fill out what kind of project you're interested in working on you promise to us that you'll follow up And actually tell us how that project goes doesn't have to succeed You just have to tell us you'll follow up and we'll ship you a board So there are there are inexpensive boards out there, but there's also a program that'll help you get it in your hands for free so Shameless plug for our dev board program very excited about that one That was one of the options that someone provided so you passed the test. I think the only other one someone wrote Sippy leechy RV and it said under $30. I don't know okay. Yeah, that's true I sort of went right to Linux, but there are a lot of boards out there that are That won't run Linux, but that are risk-5 based spark fun has probably the most popular one their red five boards Yep, are we good? All right, any other questions in the room? You missed the chance to throw tomatoes at me. I'm really glad nobody brought produce All right, well it is beer 30 so thank you all very much for coming appreciate you showing up and See you all at the next conference. Thank you very much