 Hello, Myself Ravindra Chauhan, Assistant Professor, Department of Electronics Engineering, Vulture Institute of Technology, Solapur. So, in this session, we will discuss how to interface the external program memory to the 8051 microcontroller. So, at the end of this session, the student will able to apply the concept of the program memory interfacing while designing the controller based system. So, the outline of the session will be like this. The first, we will see the 8051 program memory organization, then the pins provided for the program memory, especially the program memory of ROM type memory. Then, how to interface the external program ROM with the microcontroller 8051. So, 8051 microcontroller have the on-chip 4K bytes program memory. So, it is having the 4K program memory. Then on-chip program memory address range, it starts from 0 to 0 f f f h, why 0 to f f f, because the size of the program memory, internal program memory is 4K and the number of address bits required to address 4K memory is equal to 12. So, that is why the maximum address is 0 f f f. Now, to 8051, we can also interface 64K external program memory. So, the internal 4K and plus external 64K. So, physically, we can have the 68K program memory. So, we can connect the 68K program memory to the 8051 means 68K means 4K on-chip plus 64K off-chip means external memory, but the 8051 have only 16 address bits. Some counter is only of 16 bit, so the 8051 is capable to generate only the 64K addresses starting from 0 to f f f f h. So, assignment of these 64K addresses in on-chip and off-chip program memory can be done by the use of the control signals called EA bar. It is the active low signal and EA stands for external access. So, here it is shown how the addresses are assigned. Now, this address assignment is totally decided by this particular control pin. Now, if EA bar is connected to the ground here means the external addresses are enabled. So, entire 64K addresses starting from 0 to f f f will be assigned to the external program memory or which is called off-chip memory and when EA bar is connected to the VCC that is the plus 5 whole then the lower 4K addresses that is starting from 0 to f f f will be assigned in on-chip memory. And remaining 60K addresses starting with the address 1000 to f f f f will be located in the off-chip memory external memory. That means here no doubt this 4K internal and the external 64K physically there may be a 68K memory but out of 68K maximum we can use 64K because of the program counter and address bits are 60. So, when EA bar is connected to ground the entire 64K addresses will be assigned to the external memory. If EA bar is connected to the VCC then lower 4K addresses 0 to f f f f will go to the on-chip memory internal memory and address from 1000 to f f f f will be located in external program memory. So, as far as the pins required for the interfacing are the obviously the address pin A0 to M. So, this M is depends on the number of locations in this particular memory chip then D0 to DN and is depends on the capacity of the one location. If one location or one address is capable to store the 8 bits so, this N must be equal to 7 D0 to D7 means that chip is requiring the 8 data pins. So, these two are the control signals output enable and chip select. So, to read the data from this program memory now see this program memory is of ROM type memory. So, only the read operation is possible so, we cannot write the data into this type of program memory. So, that is why only the read operation is possible and to read the data or to read the code from the program memory this OE bar must be 0 and CS bar is also must be 0. Then the 8051 port pins which are required for the memory interfacing so, the port 0 and port 2 are involving in accessing the external memory whether that is the data memory or the program memory. So, port 2 is having the alternate function as A8 to A15 means port 2 is providing the higher 8 bits of the address higher 8 bits of the 16 bit address. Similarly, port 0 is having the alternate functions AD0 to AD7 means this port 0 is providing both address as well as data. So, what will be available on the port 0 at what time that we can find out or that can be differentiated by making the use of this ALE signal. So, the 8051 controller is generating the ALE signal when the address is on the port AD0 to AD7 line and ALE is 0 it means that the data is available on AD0 to AD7 means on the port 0 that is on AD0 to AD7 lines either data will be present or address will be present at the same time. So, this can be distinguished by ALE signal if ALE is one address is available on the AD0 to AD7 line if ALE is 0 the data is available on AD0 to AD7 and then the one control signal which is called PSEN bar which is also referred to as a program store enable. So, whenever the 8051 is accessing the external program memory it generates this signal PSEN signal as a 0. So, this PSEN bar signal is 0 it means that the 8051 is accessing the external program memory. Now, to interface a program memory chip to the microcontroller first the data pins of the microcontroller should connect directly to the data pins of the program memory chip the control signal PSEN bar from the microcontroller should connect to the OE bar as well as we can connect to select the memory chip that is the to the CS bar pin while connecting the address pins the lower bits of the address from the microcontroller go directly to the memory chip address pins the remaining upper one should be unused and EA bar can be connected either to ground or to the VCC as per our requirement. Now, here C port 0 is involving for both address and data. So, that is why on AD0 to AD7 either address will be available or data will be available during the first portion of the operation address will be on AD0 to AD7 and the later period the data will be available on AD0 to AD7. So, to separate this address and data lines we can make the use of the latch ok. So, this latch will be enabled when this G is high ok. So, that is why it is connected to the ALE because ALE is high when address is available on port 0. So, when ALE is high latch will be enabled the address is available on AD0 to AD7 that will be gets latched here ok and when ALE is 0 this latch will be disabled at that time the data is on AD0 to AD7 that we can take out here. Now, we are having separate lines for address and separate lines for data that is called the demultiplexing of address and data pins. Now, this is the overall schematic ok. So, the program memory shown here it is of 8 k byte program memory ok. So, for 8 k program memory the 8051 micro controller is connected with the starting address 00 ok. Now, this latch is used to separate the address line and data line ok. So, lower 8 bits of the address will go to the A0 to A7 and higher A8 to A12 means total address pins are from A0 to A12 means the total address pins are 13, 513 because the size of the program memory is 8 k. So, 2 raise to 13 is equal to 8 k. Then PSEN bar signal which is used to enable this particular program memory. So, it is connected to the OE as well as CS bar ok. Means whenever the PSEN bar is active, low chip will be selected, chip will be enabled and output pin that is this data pins will also enable and the data will come from this and it will go to the controller ok. Data means normally it is the data mentioned in the program or it may be the operational code of the different instructions. References used is the book by the Majidi 8051 book by the Majidi and the micro controllers by Ajay Deshmukh.