 Welcome to the session on D T flip-flop in sequential logic circuit. At the end of this session students will be able to explain the operation of D and T flip-flop. Let us see what is D flip-flop. D flip-flop are also called as a data flip-flop. They are used to store one bit binary data. The D flip-flop is by for the most important of the clocked flip-flops as it ensures that the input S and R are never equals to one at the same time. Thus, this single input is called the data input. If this data input is held high, the flip-flop would be set and when it is low, the flip-flop would change and becomes reset. A data flip-flop because of its ability to latch and remember data can be used to create a delay in the propagation of the data through a circuit. The basic D flip-flop has D input that is one input and a clock input and outputs Q and Q complement. And optionally it may also include the preset and clear control input. By connecting an inverter to the SR flip-flop, we can set and reset the flip-flop using one input as now the two input signals are complements of each other. This complement avoids the ambiguity inherent in the SR latch when both inputs are low. Here table shows D flip-flop to table. The simplest form of D type flip-flop is basically a high activated SR type with an additional inverter to ensure that the S and R inputs cannot both be high or both low at the same time. In active low clock of SR flip-flop when D equals to 0, there will be no change in the output of the latch. In active low clock of D flip-flop when equals to 1, there will be no change in the output. So, if both inputs of the flip-flops are same, there will be either no change or invalid output condition. There are many applications where only set and reset conditions of the latch are required. In those applications, we can use the inputs which are always the complements of each other. Characteristic table defines the behavior of flip-flop. The characteristic table in the third column of the table defines the state of each flip-flop of a function of its input and a previous state. Qn refers to the present state and Q of n plus 1 refers to the next state after the occurrences of the clock pulse. The next state of the D flip-flop is completely dependent on the input D and independent of the present state. Excitation table shows what input is necessary to generate a given output. During the design process, we usually know the transition from present state to the next state and wish to find the flip-flop input condition that will cause the required transition. And for this reason, we will need a table that lists the required input for a given change of a state. Such list is called excitation table. And following table shows the D-type flip-flop excitation table. There are four possible transitions from present state to the next state and the required input condition are derived from the information available from the characteristic table. Here a question. In D-type flip-flop, if clock input is low, the D input, you have four options. Pause the video and write your answer. Answer is A. In D-type flip-flop, if clock input is low, the D input has no effect. Now, we discuss about the T-type flip-flop, the T in T-type flip-flop stands for toggle. When you toggle a light switch, you are changing from one state to the other state. If the two input J and K of a JK flip-flop are tied together, it is referred to as a T-type flip-flop. The process is even easier if you are starting with a JK flip-flop. No additional gates are required. If you are starting with a JK flip-flop, no additional gates are required. All you need to do is connect the same input signal to both input pins. So, a T flip-flop is sometimes called as single input JK flip-flop. A T flip-flop is like a JK flip-flop. These are basically a single input version of a JK flip-flop. This modified form of a JK flip-flop is obtained by connecting both inputs J and K together. This flip-flop has only one input along with the clock input. Hence, a T flip-flop has only one input T and two outputs Q and Q complement. T flip-flop is a very good option to use in counter design and in sequential circuit design where switching and operation is required. T flip-flop is an edge trigger device that is low to high or high to low. Transitions on a clock signal of a narrow trigger that is provided as input will cause the change in output state of flip-flop. The truth table of T flip-flop is given. If the T input is in zero state that is J equals to K equals to zero, the Q output will not change with the clock pulse because we know for JK flip-flop J equals to K equals to zero output will be no change. This state is called as memory state. When you provide a logic one input to a T flip-flop, if the output is currently at logic high, it changes to logic low and if it is currently at logic low, it changes to logic high and this state is called as toggle state. Characteristic table defines the behavior of flip-flops. The characteristic table is useful during the analysis of sequential circuits when the value of flip-flop inputs are known. The next state for the T flip-flop is same as the present state Q if T equals to zero and complemented if T equals to one. Excitation table, there are four possible transitions from present state to the next state. The required input conditions are derived from the information available in the characteristic table. Following table shows the T flip-flop excitation table. The data or D type flip-flop can be built using a pair of back to back SR latches and connecting an inverter between the S and the R inputs to allow for single D input and T flip-flop actually indicates the fact that the flip-flop has the ability to toggle. It has actually only two states toggle state and memory state. So, these are the references. Thank you.