 We were looking for mass capacitors and we said there is a, we always start with P substrate, whatever is true for P substrate with opposite polarity of voltages, it is true for N substrate. So right now we look for P substrate for simple reason, P substrate gives what we call N channel devices and we know N channel devices are better in performance compared to P channel channel devices as far as the area of voice and threshold wise values are concerned simply because the mobility of electrons is higher than mobility of holes even at the surface. And because of that N channel MOSFETs are most used as drivers and P channel devices are used as loads but in CMOS this statement will be has to be modified, there is no load, there is no driver, both coexist then we have to do something to P channel so that it becomes equivalent of N channels, okay. Digital course will tell you more about it, what is the logical effort one needs to make it equal. Okay, so we said that if VGS is positive or negative, since electric field is from bottom to upwards, holes start accumulating at the surface and since holes are more like a metallic system, so you only get a net capacitance of oxide which is C ox decided by epsilon ox by T ox, please remember capacitances in our case are mostly defined as per unit area where we may monitor actual capacitance in flats but the theory always will have C ox which is epsilon ox by T ox simply because Q is equal to C V, the basic Gauss's law has to be satisfied and Q will be used there as charge density and since this is per unit area there C is also per unit area here because voltage cannot be per unit area, voltage can be per unit centimeter which will be fields but otherwise there is nothing called per unit area. So everywhere you find that I normally use C ox as epsilon ox by T ox, we also said that if I apply VGS positive and small, the first thing we have seen the electric field is now downwards, the holes are repelled down because of this and since holes leave the surface there are acceptors which are negatively charged appears there and this is called depletion layer. We also assume that there are no oxide charges as of now and therefore if the D vector is continuous then we say epsilon ox into T ox is epsilon S into T epsilon, this is electric field. The reason why I started using this capital other kind of E is because this normal E is actually energy in band diagram, so this E and that E should not get confused, E capital E is normally given for energy that is Q into V and therefore I normally write Zeta kind of E for my evaluation, you can use capital E also there is nothing wrong with it. Now if depletion layer will keep an answer if I increase VGS because we can see from here we will prove this that depletion layer is proportional to twice case epsilon not size we will see what is size surface potential by Q and E, so if one can see from here that if I want larger charges to appear there are two ways either this N A should have been larger which is fixed by substrate so we cannot care, so X D must increase as the Q M that is the charge on the metal plate VGS increasing means metal charge increasing which means there should be more and more depletion layer widths so that the charge is balanced by Gauss Lawn net charge is 0 across the loop, okay. Now this theory is very simple and as I say right from 7 standard we have been telling capacitors, resistors and inductors and even after your masters VAD you will only learn that much, okay nothing more. Now if we initially when the VGS is small the electric field due to the depletion layer is also very small relatively and since the electric field is small please remember in semiconductor whether it is depletion layer or neutral region constantly whole electrons are generated this is called thermal generation, there is a rate of generation depends on generation time. Now if these carriers are generated they will also have recombination time so by the time they are actually taken out by electric field they may recombine so there will not be any contribution from free electrons and holes because they will be able to recombine the electric field is very small. However if I start increasing the voltage at the gate then this electric field across the depletion layer will also enhance and there is a possibility that the force on electron holes may be exceeding now and if that happens this is what we say, okay before that maybe in the depletion region I am sorry before we come to a inversion. Since there are only two capacitances involved due to the depletion region which is called semiconductor capacitance and the oxide capacitance look at the figure one capacitance due to oxide one capacitance due to semiconductor or depletion layer so they are in series and series capacitance is always this dash is only to take care of area nothing more. So the net capacitance is Cf dash by Cs upon Cf dash by Cs dash since Cs dash will start decreasing as voltage starts increasing please remember as Cs dash increasing voltage start increasing depletion level increases so epsilon by X will be actually small decreasing if Cs dash decreases the net capacitance will also decrease as voltage increases Cs dash decreases therefore the net capacitance start also decreasing that is why in the high frequency Cv you see decreasing in capacitance as you increase Vgs you can see from here the capacitance start decreasing as I increase Vgs, okay. However this Vgs is still not large enough to create large electric fields in the depletion layer but once this electric field is large enough that is Vgs is sufficiently positive there is a possibility of whole electrons get separated by the electric field in this depletion layer holes will move down because the electric field is downwards and electrons will start piling up at the interface that is something very interesting can happen holes will move down of the depletion layer electrons will start moving towards the interface since there is a silicon dioxide electrons cannot cross the barrier there but they will sit at the silicon interface silicon silicon dyes interface since we started with a P substrate and the layer just below oxide is become electrons are negative now we say you are in inversion region you have inverted the carriers I have inverted the layer there we have P substrate and now you have negative N free carriers available so as larger the Vgs you apply more and more electrons will come and then the charge balance required there are how many charges are now there one is the depletion layer charge plus the inversion charge but the way inversion charge increases with electric field is e to the power something Q size by kind of KT whereas in the case of depletion layer how it increases root upon is proportional to XDN which is proportional to root of size okay which means which is stronger exponential terms are very strong so whatever additional charge you put on the metal will be now easily supplied by inversion charge and depletion charge does not exceed though it does increase one cannot say it does not but in ratio it may be 1 to 1000 so we say depletion layer becomes constant and all the charges are now made available through inversion charges so the balance of net charge 0 can be now attained through the available free electrons rather than from the depletion layer so there will be a fixed depletion charge plus inversion charge is equal to whatever Vgs you apply corresponding to that whatever metal charge you have and that always will be net charge will be 0 please remember why inversion is stronger because the way if you solve the Poisson's equation there we will be able to figure out with continued equation we will be able to prove that it is e to the power size kind of terms so size increases surface potential the carrier generation is very fast okay and therefore this electrons are available in larger number even a smaller change in the Vgs so you do not need to increase depletion layer since the capacitance now if the charges here are not very very large right now or the variation in this charge density is not very large we will see this is what we want to prove later the net capacitance is now whatever is the maximum by charge you create here that divided by Xd max Xd max QA Xd max this what is Xd max at the potential when Vgs depletion layer becomes almost constant that is called Xd max someone asked other day what is Xd max so I was a little worried but now as a microelectronic student at least if you do not know mass CV probably leave the group as fast as you can okay the value of Vgs at which this then you know what is the inversion layer what we call threshold we define a threshold voltage as that voltage of Vgs when the number of electron and electron density here electron per unit per cc is exactly equal to the substrate concentration is that clear if Na is the substrate concentration Na holds so when the electron concentration is exactly equal to Na at the interface or surface then we say we are in a strong inversion case but where inversion will start whenever electron starts there inversion has already set in for one Vgs even if the electrons are smaller than number of holes available in substrate even then inversion has set in this is called weak inversion this is called weak inversion but what is the definition of threshold we will give it for a strong inversion and in strong inversion we made a mischief we say okay whenever number of electron per cc is exactly equal to Na at that voltage we will say threshold has the voltage Vgs is actually the threshold voltage that is the definition not very correct but it is okay that is the way defined I define that way okay that is the way it is. So if I plot the capacitance versus voltage characteristics this of course again Professor Vasi will tell you in more details so please look for that if you see very carefully if I have a 2 curl I have shown capacitance versus voltage for a p substrate MOS capacitor and I figure out for minus Vgs its accumulation and therefore oxide capacitance is constant if I increase Vgs the depletion layer starts enhancing so the net semiconductor capacitance decreases so net capacitance decreases and somewhere here at this Vgs sufficient electrons are made available so we say inversion has started and depletion layer capacitance is constant if that is constant C ox series 2 C depletion is constant so it becomes constant this is called high frequency CV the assumption here is that the frequency is high enough which is typically 1 MHz to 10 MHz one is standard but many people use 10 MHz even you can use 100 MHz what is the way capacitance are monitored you can do through a have you any time thought about the meters which you see LCR meters or how do they monitor capacitors all that we are doing we are passing the current through 1 upon j omega C and measuring the voltage Vac by Iac is 1 upon j omega C if I know my omega I know my capacitor that is all that we do okay so the frequency of measurement is this omega okay so AC signal which I am applying to measure a capacitance it has a frequency so this high frequency CV is this measurement frequency which is 1 MHz and above at those frequencies we say no other charges follow this change in voltage if AC become positive negative if the charges do not respond to that only depletion is fixed so it remains constant their oxide capacitance is without this you are measuring so C ox plus or series of CS dash or CS is all that capacitance you will see in all these cases so capacitance is always seen as constants once the inversion sets in however if the measurement frequency and we have a lot of things to show later if the measurement frequency is smaller maybe 1 Hz to 10 Hz then this charges change in inversion layer charge change in if everyone can follow this low frequency signal or voltage and if that follows then some of these capacitance will come dQ by dVs capacitance if the change of charge is followed by V then we say there is a capacitance so then the others capacitance will start also appearing in your circuit and then you will see if large at the after inversion at then we will show you this that the oxide capacitance the net capacitance climb back to the oxide capacitance okay so low frequency after inversion you climb back to the oxide capacitance we will see this little later few minutes how does how do we evaluate everything out of this why I am spending this time because at the end of the day for me the mass device performance which maybe I will show you first so that I will just show you this slide of course this right now we are not done all the terms here but the threshold voltage in real life is given by 5 s plus minus 2 y plus minus if n a it is 2 5 f plus and if it is n d because charges are opposite it will become minus 2 5 f minus Q ox by Q ox is the oxide charge and we want to monitor that minus okay here also we should write plus minus because minus Q any XD or plus Q and D XD depends on the substrate you start with but this is always minus so minus Q any XD makes it plus plus Q and D XD will make it minus please remember very interesting thing 5 s is always negative okay always we will show you this for a P substrate or n channel device to 5 is positive Q ox is always positive okay so Q ox by C ox is always negative Q V which is Q any XD minus will become positive so this is positive term this is positive term this is negative term this is negative term so what can happen they will subtract okay it may happen in some cases that if Q ox is very large then this plus this will become larger than 2 5 f plus Q V by C ox or Q any XD by C ox what does that mean VT will become negative for n channel device we always want threshold to be positive turn on okay VGA should exceed VT to start currents okay now that may not happen so one of the technology worries are how much Q ox I can maintain okay so that this plus this is always smaller than this plus this this is something well in the case of P channel device this is minus because this is plus Q and A so this is minus this is minus this is minus this is minus so all four terms in P channel devices are negative so VT for a P channel device is always negative but larger these values more minus VT will appear since larger VT means you will require larger supply to create the same current so P channel devices will require larger threshold larger supply voltage to get the same currents VGS minus VT is that clear because VT is a negative so there also we must reduce Q ox because then VT becomes lesser negative okay somehow should increase 2 5 f okay or decrease 2 5 f so doping should be such so if you can adjust your doping and oxides chart within technology then I will be able to get VT n equal to VTP in circuits I want n channel devices should have same as P channel VTs sign wise VT n is equal to absolute value of VTP okay magnitude of VTP that is what is a symmetric circuits so we will like to do that that means some way in technology for P channel I must control very strongly so that VT becomes as small as possible which is closer to because n channel will be smaller why it will be smaller because 2 terms are positive 2 terms are negative so it will be smaller so to if I want little more positive I must increase actually 2 5 f okay so that I get larger the doping I will get more VT out of it so larger VT if I want I can always increase the doping in the case of P channel I want 2 5 to decrease so I will actually reduce the substrate doping okay that is why P channel areas are different from n channel areas in all CMOS circuits okay okay so this is my expression the term here 5 minus 5 as we look into it time permitting since the work function of the gate whether it is aluminum gold or titanium or any other molybdenum or any other this the work function will define little later is the energy required for a electron to take out of a metal is called its work function in vacuum okay since that is the material property semiconductor work function of course is depend on the doping in the semiconductors so one can see from 5 minus fires 5 depending on what kind of metals I use this 5 minus fires can change okay one of the recent techniques of last 5 6 years is called work function engineering so the threshold is actually adjusted by the metal which I put okay because I cannot then play too much about the other values so I say okay let us look at the other metals which probably can vary my VT okay this is something in nanometer 45 nanometer down or even 20 nanometers have not same aluminum of course I have been given up long time but other materials are looked into whose work function difference is more controllable and one can choose out of that molybdenum for example is very strong kind candidate for that okay molybdenum okay so this is why I say why 5 s is so very crucial but 5 s is a term in VT please remember so that has to be looked into Q ox is always positive always positive and very close to the interface very close to the interface inside oxide that means this term just can't be avoided I can minimize it how much minimum I should have that it should not have much influence is all that we can try okay then the FIF of course is called Fermi potential which is nothing but intrinsic for me an energy minus the actual for me energy for me level divided by Q and if you look at a mass device current okay let us say for any of the device the saturation current ID sat as it is called is half mu C ox W by L VGS minus VT square 1 plus lambda VDS so any change in VT any change in mu is going to affect my current and current means in circuit everything depends on current available for a given bias or given VGS but this value how much ideas I will get is decided by what is mu I get and what is the threshold I get so the technology people are forced to worry about mu and VT because the current people are telling this is what I want okay because of the circuit performance is decided by charging current for the capacitor I want for a smaller voltage large currents of course power dissipation may increase we will see whether then the other people say no one reduce the current okay then what do we do so we play games on that as much as possible so this is why we say technology why we looked into all this theory because they will come and tell me I want this VT and plus minus so much and I want this mobility now I am forced to now work to my this I have to go back and see in theory which terms actually affects me and the threshold as well as in the mobility and those processes or those terms I must control in my process because that is how the mass circuit technology will actually perform 6 gigahertz Intel processor may want to make 10 or something it is okay saying is very simple the power may boost by 10 times 200 times then it can be done but I want power to be 110 we want to speed to be double this is something which is triangle as I say you push one the other will go down okay so that is where the technology people are called in say a little bit of help okay so one method of course is to choose materials which are higher mobility itself okay so that one probably do not have to too much worry about silicon okay but we do not want to lose silicon technologies okay as I say 2050 but 2050 if anything else the money may matter if I you know if the cost of one thing is 1 rupee and the other is 1000 rupees even if it is 5 times better 3 times better I say are a group and he can so that is the game technology is essentially money related economics say okay so one of the thing which we will look into later is this Q ox which as I say in this case I have said Q ox is 0 and 5 s is also 0 it is called ideal capacitor what is it called 5 s is 0 what does 5 s 0 means the work function of semiconductor is same as well by this is very impossible but assume and if you assume it is called theoretical CV ideal CV okay in which 5 s is 0 and we say there are no oxide charges okay then whatever VT we get is essentially ideal VT which is not the reality but from there since I know theoretically what is ideal what I can do then if I measure something then I know the change and I know this is because of this is that clear that is exactly what we do now the there are fixed charges which are called oxide charges which is essentially called trival and silicon sitting at the silicon-silicon dioxide interface inside oxide okay there are positive charges and their density please remember this word density is always per centimeter square okay and if your charge density is charge coulomb per centimeter square Q by centimeter square okay so then this positive charges will always exist do what you do they may be smaller they may be smaller or larger depending on the technology you do so can you think why in 1970s everyone including TI or every company Intel or who said we are working those in silicon IC process we are working on P-channel devices till 1978 or 76 okay 4004 was P-channels microprocessor only the first 8080 when it came it was in channel 1 why because this Q ox could not be controlled so it VT used to become 0 minus and therefore no enhancement okay so we said okay let us work on P-channel at least okay I will increase 10 volt power supply but it will enhance VGS minus VT I can get okay so all initial processors were P-channel devices simply because oxide charge was not within your technology control now of course great technology experts around which can probably reduce this number to a great extent also one can see about this Q by C ox this term will become smaller when C ox is larger if C ox is larger means what the oxide thickness should be smaller this is what is happening it helped you when you will score scale down the oxide thickness reduced so your C ox increased but that C ox increased as some other problem where the current also start increasing so power started increasing okay so there are issues then the area started building so yeah you have to adjust mini parameters together to get something called optimal values okay so typically if I want fixed charges it should be of the order of 10 to power 10 per centimeter square or 1.6 into 10 to power minus 19 into 10 to power 10 is minus 9 so coulombs this is the kind of charge density I am expecting 10 to power 10 per centimeter square what I may get is 10 to power 11 and hold my work is to see that this becomes closer to 1 into 2 or 2 into 3 into 10 to power 10 kind of numbers and that is my process okay that is why processing is very crucial how do I actually push my wafers in oxidation furnace how fast I take them out how much is the ambient I create what is the laminar I could make there inside is the temperature remaining constant is the wafer was properly cleaned all these issue may decide the fixed charges okay and that is something very very crucial for us okay apart from this fixed charges which are always which is called incomplete oxidation system called trivalent silicon this is the kind of bond you get some other days some other time what how trivalents are obtained but let us look at it further apart from this we kept saying in the clean room environment we were talking that there should be at no cost sodium be inside okay sodium or potassium our first group such elements be inside the reason is sodium has a strong affinity affinity with water water has strong affinity with silicon okay so silica normal silica which is called soda glass has huge amount of sodium in fact that is why it is called soda glass sodium based glass okay SiO2 with Na2O inside okay as a bond now if this is soda glass huge sodium there is a density may be 10 to power 14 per centimeter square so much large sodium now the problem with sodium is not okay I have no objection if sodium present if it does not hurt me but if it hurts me I will have to check what how it hurts it hurts something normally since biomass is also negative or if I apply plus VGS with reference to semiconductor I figure out the sodium which is well inside the silicon dioxide it is placed everywhere now and they are ions Na's are ions at little energy they actually break the bond okay this sodium ions have a tendency actually they are very they are quite large drift velocity in the oxide which is rare they have they can diffuse faster if I apply VGS which is the direction of electric field plus to minus so where sodium will go towards interface any charge which reaches at the interface will be seen in the VT as a Q ox plus Q Na okay that if okay one time I did it and I find fine chalo up which are the other as any as soon as I change the temperature all I change the bias which are in circuit I will this sodium will come back partially here there so what it means VT will be constantly varying as the mobile charge keep moving in the oxide thickness okay that I cannot tolerate if VT keeps varying my currents will varying my speed will varying my power will vary that certainly I will not appreciate okay and therefore somehow this mobile charges should be minimized and should be less around 10 to power 10 per centimeter square is all that I may tolerate okay preferably 0 but 0 of course is nothing so as low 10 to power 9 people are now getting per centimeter square so why sodium comes V okay the biggest source of sodium is V okay however we wear everything and close everything so that at least that perspiration is doesn't come out okay but there are materials which are self-absorbed like even polysters or polymers they actually pick up sodium okay over the time now they as soon as you start air conditioning initially heats sodium is released so come what may aluminium alumina has been made there is sodium sitting on it okay so as you move on this scratches and sodium is released so don't think sodium is you any clean room is sodium free of course the per centimeter square is very small that is density is very small but it is not that I can make it 0 quads where which I have also will have some sodium so in every sense and I am putting a 900 degree 1000 degree I am allowing sodium to really come okay so no time sodium can be made 0 all that I will do is to minimize sodium content in the facilities as well as from me at least I know I will cover all of my myself from every two specks and small because but you have to breathe you cannot say I will not breathe so that's the way you know whole problems you breathe and there is a sodium okay whatever filter you put here some part will come because air has to come in okay so in air and this has to be done so there will be a sodium inside do what you okay so please remember if anyone says the sodium free statement is good nothing is sodium free in the world okay sodium is only present but let's look at the other side if sodium is less in your body you start getting cramps so sodium is very relevant material okay so don't think sodium is bad larger sodium blood pressure increases so you will have to reduce your sodium so all problems is sodium at all I know everything now okay okay so this mobile charges which are essentially sodium base probably have to be controlled and we will see how we monitor all of this so what are the charges I said I said there can be a fixed charge there can be mobile charge and there can be the third charge which is wearing me most in fact okay the last but not the least important is the interface charge and that is something which is probably partly controllable partly not controllable now if you look at any surface of any material solid material the top atoms of any materials the upper bonds will not be satisfied the lower bonds will be satisfied but the surface will always have one bond in the air or two bonds in there okay now this is called shockless states or tan states these bonds which are available at the surface and they may be in large numbers because so many atoms in the surface so many bonds are available so we say these positive charges or dangling bonds as we are not position dangling bonds are such a large numbers that they can be called they are actually named as shockless states or tan states however as soon as you cover this surface by any other material some of these bonds will get satisfied so the states surface surface states now will become called interface states and their number will decrease is that point clear from the surface there are too many I put oxide on the top now silicon to silicon dioxide some will take bonds some may still not be able to bond okay so whatever is not able to bond is a dangling bond sitting at the interface okay any charge in semiconductor this is equivalent to saying there is a charge state or energy level in the band gap okay what is any charge they are sitting they will create an energy level in the band gap of semiconductor what is the problem with any this they act like a trap centers so what is that if you put something charge there they may act like a trap so sometime interface states are also called interface traps okay they are also called interface traps now this interface traps are not a constant quantity unfortunately okay for example over the if you apply larger voltage which is called constant stress for a given time or you increase thermal stress or the wafer is being held in a higher temperature ambience which in a real circuit will happen you are in a space or you are all it is receiving radiations now all in cases this so-called interface states are not very much fixed they actually change okay the problems are there if they are fixed there is some control and they say they are not fixed go to the effort now one can see from that mass transistor theory or mass transistor somewhere maybe I draw over here okay 8 minute I will come back to that this is my source drain and this is my oxide okay now if I create an inversion layer here by applying VJ is positive let us say why the current flows current flows from so electrons flows from source to drain due to the electric field lateral electric field called depth currents now these electrons are not in the bulk alone they are near the surface if there is a charge state here and this carriers which is in conduction band you say now finds possibility of trapping okay there are two traps there actually one is this silicon and silicon dioxide are two different material so there is a physical and undulations like this which are flatness you make mirror polish near man there between the two material there cannot be one to one this so there is a surface traps because of the undulations and surface trap because of interface states so if the carriers are affected by interface states then the mobility will start decreasing and that is my worry because that current id set I looked into is proportional to me so if mobility goes down my current goes down my everything goes down okay I am suddenly worried so this DIT where are in a charge interface state density what we are saying we are worried too much about it because we feel that also is one but as I say even from VJ is going from minus to plus you will find DITs are not constant so we say okay at the bandage it may be anything in the mid gap how much is there the one more likely to in a any trap near the mid gap near EG by 2 will have maximum probability of trapping by electrons or holes okay 50 by recombination center 50 percent probably are here or here so that they are the rest anyone closer to valence band only holes probably can trap anyone closer to in the only electrons can trap but in between they can do any machine the problem is exactly this the CV as we show they keep changing there as we move from bandage to bandage okay and that is where major okay how much I how much DIT really I have a number of charge density there that will influence my mu okay and also it is indirectly not seen but we will see even VT will keep varying with that because if you see the VT variation here this Q of essentially contains a term fixed charge plus QIT what are charges in the interface there are fixed charges plus interface charge plus mobile charge all these charges at the interface will contribute to net Q ox which means VT will get also affected by QIT or whatever charges in interface and they are varying so VT will keep varying so my worries are not just this I am not only worried about mobility but I am also worried about my threshold getting not fixed okay. So why we are so much worried in technology because people will insist because all designers when I am as a designer teach I will say the same thing they all blame technology people I told you I want this okay we give you something technology people they say you but this is not good enough so every now and then the technology people were hammered now it is last 10 years it is the other way we can do anything what you can do now designers do not have any options they cannot do much thing they cannot think bigger system they cannot do anything oh low power now a new thing okay low power ox side but low level so every time a designer does not get his performance he looks at process people okay please help or you can do either way but that is the way work so now in 2011 to onwards at 5 8 onwards no designer should forget technology or no technology should know not about design because they individually together only can now solve the real issues which the newer technologies are facing 7 nanometer process if you do you are designing a chip of course 7 is there is already circuit is made so I am not bluffing 11 is already there 7 is already there 7 nanometer chip has huge technology problems okay so what is the problem one out of thousand chips work then who will work for it okay so the reality is major worry so now everything is looked at Intel's chief what is called board mark board is looking into it how to make reliable circuit 7 nanometer circuits are available okay not in market in the lab okay so this is what the process is so why process people become very strong but at the end of the day they only can solve the problems designers only will sit with the computer and sleep only and the process people will come and say okay here is the model here is something now this is a device this is equivalent models start designing that is good okay so I already said okay so the as I keep saying DIT is very very crucial for variety of reasons and one must somehow control them to this around 10 to power 10 per centimeter square so that the effect of DIT is minimized okay I am not saying it will be 0 but it will be minimized same as fixed charges reduce this Q ox term which includes all of them as small as possible or Q ox by C ox term in nutshell then you will be able to actually leave some hope for circuit to function okay so all technology people should not feel you know that that is why some material people must be feeling bad that you know a lot of circuit related things are told the reason is we are not material scientist we are VLSR technology people and for us circuit is the ultimate or system is the ultimate that is the way it is so process people should know what designers want or what device wants and we should be able to give that okay so if I keep correlations please take it because I am I work on every area or I do not work any area now so because of that I can tell you where it hurts okay typically time state as a 10 to power 20 per centimeter square sorry per centimeter square okay and we want to reduce it to as low as 10 to power 10 per centimeter square but as soon as you put silicon dioxide on silicon much as the oxygen will get bonded to silicon Si O Si bonds will be formed some which are not able to they are still dangling and they are called interface states one of the technique is to pass chlorine during oxidation that is what we tried okay so we say this bonds will be picked up by chlorine but chlorine itself has a problem so we left chlorine then we said okay CL may be more worrisome so use dichloroethane TCA as it called then it has a carbon content there so it starts coagulating there so in 70s it was very interesting technology anything you can try and you will get something funny okay now many things known so not many achievements are in technology as in those days I dip in something I owe different okay now it is not so okay is that okay so I am interested in DIT for control on VT and control on mobility and therefore I am worried okay I already said now forget about all this VT is fixed charges interface charges and mobile charges all three are actually coming into VT term is that correct so any one of them can hurt you okay of course sodium can be easily removed much of it if you take super clean systems fixed charges by technology by proper oxidation process you follow kiosks can be minimized there was a time when we worked in 80s when students of mine were working in lab so I used to do oxidation for most of my students in those days so many of my PhD student used to say sir let us do let me do I say okay do it then he used to measure CV and he says sir my charges are 10 to power 11 and yours are 10 to power 200 to power 10 you do the same thing which I do I say that is my hand that is when I push some things I do myself do not know what I do but I push the rack in I push take out at what rate I do how long I wait where which zones is unknown to me okay but my mind is set for that over the years I know what to do okay so even if you do 100% automation someone has to model this what I did so they photograph they do a lot of enough image processing and then figure out what exactly I was doing so then computer can be told do this motor control okay so all automation was done by actually monitoring what humans do okay but humans are smarter they always do better than what machines can so again machines have to learn how much humans can learn okay okay so these statements are already made for me potentials is twice KT by QNA or NE by NI plus or minus if it is NE by NI it is plus if it is NI by ND it is minus XD max is twice KS epsilon the size is called surface but I will take the figure just now and that is equal to 2 phi F at inversion surface for I will just draw the band diagram quickly and then we will show you is that okay so these are the expressions which last time also again I am just repeating this is a net expression which worries us in our controls and therefore technologically if there is a change in substrate doping variation can you think that same 2 phi will vary this will vary so VT will vary so it is not that whole buffer will have same VT so there is a called VT map we actually see how much VT varies just because of the substrate concentration so what should we do we actually make wells as one one well I showed you other day in my this which diff diffusions or implants are fixed by me for all regions since I can do much better control on by selective this I will be able to get more much more control on any or nds okay therefore all CMOS processes do not use substrates okay they use p wells and n wells to make n channel and p channel devices is that clear to you so this any nds are not no more controlled by actually controlling the VT it is the doping in the wells which we will do see later implants okay before I start working again on this capacitance you can actually write write note down this circuit this is called equivalent circuit of a MOS capacitor some are important in some regions some are not important in some regions some are important in frequency terms so we will see what it is but this is called the MOS CV so if you have really a MOS capacitor man you should know all these four are very different grid this there is a CP for this is a p substrate so we say NH so CP which is accumulation CS is the depletion charge or capacitance due to that then there is an inversion capacitance and there is a interface states capacitance why we say this any charge variation with the voltage leads to capacitance q is equal to CV so dq by dvc so if charge is varying with voltage there is an equivalent capacitance associated is that clear this is a basic theory which we use any change in charge with voltage leads to capacitance is that clear so anywhere you see change of charge as you change voltage then you say there is a capacity effect coming in okay so this net capacitance is these C ox is always in series with these four of them and not all four exist simultaneously but many of them may we will see what so these are in parallel what do they mean they add they all add whereas this is in series means they actually go harmonic way 1 upon C is equal to 1 upon C1 plus 1 upon C2 okay this semi bulk is depletion then the reason is this is taken from Sahas book he is defining here I mean many I recently had in but my old sheets have CS there so I wrote that but then I immediately remember to make it bulk there are four okay I will show you the circuit before we come to it we will show you okay so we want to write that for each region what is the equivalent circuit or equivalent capacitance we get okay this is what I am trying to do okay so and this is what I know all these capacitances adds to itself not necessarily present all of them why but during accumulation there will not be any depletion you know so obviously both will not be there okay so those people who do not like physics still want wish to know at least or do not those who like physics is better for them but those who do not like look at it anyway this is a p semiconductor mass capacitor shown here typical oxide thickness is T ox as a p type semiconductor substrate has a doping of in a and this is a metal plate so it is MIS as we want this is the band diagram the silicon dioxide band gap this is the conduction band this is the valence band has a 8 electron volts band gap now right now I assume that the Fermi level in metal and Fermi level in semiconductors were aligned when they brought together so fineness is 0 okay we will add that term in case in real life what will happen so if I put that and I apply positive Vgs with reference to substrate which is grounded positive Vgs means what is energy associated with plus Vgs energy minus qv okay so energy is minus qv so if energy diagram shows upper energy increasing which side is the energy going down going down so the Fermi level of this metal what is the voltage you apply between the Fermi levels whatever potential you apply is the separation of the Fermi levels but the Fermi level metal should go down because its energy is more negative than Fermi level in semiconductors so the difference between EFS and EFM is the applied potential qvgs okay q because it is a voltage it is a energy diagram otherwise the difference of potential is Vgs now please take from me that in all our band theories or all mass capacitance theories PN junction we do not do but in case of mass I always show EFS constant in PN junction I will I will actually say whenever the Fermi level bends I say current is flowing that the word if there is a change in Fermi level with X d5 by dx then the current flows J is proportional to d5 by dx okay in this case the across oxide there is no current there is no DC current across the oxide so therefore Fermi level is semiconductor is held constant at zero potential where you are grounded that fifth reference to that now you will measure all other potentials is that clear to you so Fermi level in semiconductor is fixed but if it is a dope semiconductor then semiconductor to EVS balance band should be fixed because that is depending on the doping you use okay EI minus EI is called the mid band intrinsic Fermi level EI minus EF is how far the Fermi level is away from the mid band is the Fermi potential which is Phi F so it is the Phi F then if I apply initially EF is equal to FS the bands will be flat is that correct no bending but as soon as I apply VGS this energy goes down okay which means now applied positive charges at the metal so what is that semiconductor charge should receive now negative charge so the first thing is holes move away if holes move away okay e is Q times the potential so Q by KT is 25.8 millivolts at 300 degree so okay we are called Bellman's relation the holes are related to EI minus EF and electrons are also related to EF minus EI so we now say since EI is above EF holes are appearing EI is away from EF so holes this is a p-tile semiconductor so you have holes in the conduction balance band but as you apply plus VGS and you expect hole concentration to leave surface where they will go because of the electric field holes will move away from the sorry I am sorry I am sorry since the electric field is opposite this side so holes will move away from this and will leave what depletion charge okay will leave depletion charge what is depletion charge minus Q NA XT okay these charges are essentially in this region. So the band start bending down because holes are moving away EI is coming closer to EF if the hole concentration start reducing what will happen EI will come closer to EF EI is the mid band so both EC and EV will also follow EI is that point clear the balance band and conduction band are EI is always 50% either side so if EI bends EC EV also bends okay now if EI is equal to EF what will happen the exponential 0 that is intrinsic if EI is equal to EF P and N equal to NI that is material becomes intrinsic however if EI goes below EF that is this become minus or EF minus become this what should what is that Boltzmann relation is saying electrons must appear that is the inversion as you start applying VGS the band start bending as EI is above EFS your holes concentration reducing but depletion layer is enhancing because acceptors are open as you further increase VGS bands further bend down to adjust to this VGS as it bends down and touches EI EFS then we say material has become intrinsic and if you further apply VGS then EI crosses EFS and you expect electrons to come so this electrons start appearing in the conduction band is that clear they start appearing in the conduction band this is inversion but EI when it starts becoming inversion when EI just crosses EF inversion sets in few electrons will come because they are just crossed EI EFS however definition was threshold was that when this number of electrons bending is so much that the number of electrons here is same as number of doper and acceptors only then we say inverse strong inversion is set in this size is measured as the bending for EI size is measured as surface potential so this is Q size EI bend how much is Q size surface potential so when the size will equal to please take it size is same as when size is 2 5 1 5 here 1 5 here what does that mean the concentration here and N are same as P opposite now so 2 5 whenever surface potential becomes 2 5 we have a strong inversion okay is that clear to you this for a N channel device what P channel device all of will go about and there is an interesting thing another thing before we quit if this contains interface states where they will lie from conduction band to valence band there will be interface states at the interface if I apply charge here now not only there will be charge in the semiconductor but they will be charged in the because some charge will be picked up by dangling okay so we say there will be interface states will start uncovering themselves okay so they will start sharing charge with metal charge whatever you expect some part of the charge will now go to interface and rest of the charge will go to the semiconductor so what will happen to size size will not be able to bend as much for the same bgs is that correct to you if there are no interface charge all size will be reflected by Vgs okay increase this will bend now but now there is additional mechanism which is changing the charge equations is that clear so what will happen to make strong inversion it may take longer voltage now is that clear to you so if the interface are larger some charge will be picked up by interface so you require larger vgs to attend to this vt is that clear to you so inversion which is too far in strong inversion case will appear now late why because initial charge was picked up by interface states as well and you apply and it will start picking some charge in the interface some will go to semiconductor that is size plus size interface total will be the applied charge potential at the EI minus EFS minus this so any vgs change now is not directly going to the semiconductor but it is also shared with interface states so that is our worry that the vt is varying as many states are here and as many below the semi for me level and as many above the for EI they are called donor states or accepted states and they will share the charge and if they share the charge the vt will vary with vgs is that now clear why I am so much worried about this DIT world because I see larger the DIT larger sharing will go to interface so my vt will become even larger and which I do not want why I am not interested in that vgs minus vt is the proportionality for the current if vt increases my current goes down my circuit fails so I am not interested okay so I am now told by people which we grow DIT reduce which we grow how do we do it it is a game it is not so easy it is not so difficult in technology there are good games played some things you do and you get and then you are left to think why do how did you get next time you do you do not get then you are again left to think why you did not get okay so it is very interesting because I keep saying silicon be as it wants it does not be the way you want okay after many days your hand at least if not brain actually picks up what silicon does okay and it starts following that is interface so my hand start interfacing with the process and I know if I do this it will happen that is why technology cannot be learned on sheets it can only be learned in the lab okay do whatever this is the only that is why I am spacing so much on the models because that I can explain without going to the lab whereas actual technology I cannot tell you do this and meaning will tell you okay because we guarantee name what he said and what you understood also is not same so okay so it may happen that you will get then we will go and say I did this and it cannot happen no no sir it happened this is result series or so oh is it then he will put another theory and another experiment so it keeps interesting work going on okay just in your fix so girls in research cut them so that is how we keep doing research because this and this does not match as long as it does not match we both are happy a core paper a core citation a core so just then match okay okay so anyway this is fun part in the course okay so now little quickly we go we do not read this part right now you just look for this if I increase VGS opposite side what will happen EFM will be above EFS and the bands will bend which side then upwards because now I am applying minus VGS and I expect positive charges so holes will come closer to larger the EI minus EF larger will be number of holes so EI should move away from EF as much as so that larger number of holes are created so accumulation make over bands bands will bands will bend upwards is that correct but maximum how much they can go up to once the violence band touches EFS it cannot cross is that correct the violence band cannot cross if that is called degeneracy once you did degenerate case if all carriers are a possible only in the violence band and no more addition okay so once degeneracy nothing extra happens but to band bands bands can bend upwards to access holes please remember if EI goes above EI minus EF becomes larger means holes become larger in accumulation you need holes to the surface is that clear to you so in accumulation bands will bend upward in depletion band start going down and when EI crosses EF we say it is inversion initially till size is equal to 5 it is just at the age of inversion when size becomes equal to 2 5 we say it is strong inversion and between size equal to 5 to 2 5 is called weak inversion okay weak inversion is that clear is that now clear to you many people say that if you reduce VGS below VT the current still close is that clear the reason is obvious you are in a weak inversion you are you are cross 2 5 above but you are not cross EI equal to EF value so far so current still start moving in this called the leakage current simply because you are still in the weak inversion and weak inversion sub threshold currents will keep flowing okay the problem is sub threshold for someone who there are two problems in sub threshold current one is power of course the other major issue is sub threshold is in the design of a DNIME and now also in the NAND flash okay this sub threshold problem is a serious issue for NAND circuits flash RAMs ROMs and also in DRAM designs so all this technique why I am relating you every time because I do not want you to feel that may sir you have to do something with oxide it is a relation in my mind so all of you should realize that all things which we do has one goal a Pentium 4 say okay why do you want to make better Pentium or better processor to design another better processor with generation okay there is nothing more to it okay if I apply VGS you can see from here matter of course is a very good conductor so very low resistivity material so no drop we assume so where the voltage will drop now partly in the oxide and partly in the semiconductor is that correct if I apply to resistor R1 R2 apply VG part will go to R1 part will go to R2 so VGS is part will go to VEX and part will go to semiconductor but this V ox I do not know the way I show V ox is the band bending of the oxide band is essentially the V ox but that I do not know how much okay so I must replace this V ox by some terms which I know so that is the next thing which I want to do before I quit is how do I replace VGS term in terms of size plus some term which is not V ox but connected to the terms which I have I know about so I say from here as I just now said last time if the D vector is continuous what is D vector electric intensity vector D epsilon E is continuous then epsilon S ES is epsilon ox E ox or epsilon SCX is epsilon ox by T ox what is the electric feeling of side V ox divided by T ox so it is V ox divided by T ox is that okay VGS is V ox plus IS then use D continuity epsilon S is ES is equal to epsilon ox V ox I write E ox as V ox by T ox so I get epsilon S that permittivity of semiconductor into electric feeling semiconductor is a permittivity of oxide divided by oxide thickness into voltage across oxide okay now from this equation I write oxide voltage is epsilon S ES upon epsilon ox by T ox this is epsilon which is essentially epsilon S ES by C ox okay C ox is per unit area okay however by Gauss's law epsilon S ES is how much the semiconductor child density QS this is Gauss's law okay so QS is minus epsilon S ES this is how Gauss's law is defined but how much is QS how do I calculate semiconductor charge QMA XD plus Q inversion I know charges in the semi I know everything in semiconductor but I do not know anything in oxide so I said fine I will replace V ox by charges in equivalent charges in semiconductors so I write users Gauss's law I write V ox is minus QS by C ox so what is VGS now VGS is size minus QS by C ox at inversion strong inversion size is 2 phi f so VT is 2 phi f minus QS by C ox where QS is the bulk charge depletion before inversion sets in strong inversion sets in which is Q and D XD max N substrate minus Q and A P substrate so this relation which we earlier derived VT is equal to 2 phi f minus Q bulk by C what are the conditions we have applied here in doing so phi m S is 0 no work function difference and oxide charges are 0 is that clear this is called ideal CV this is called ideal CV okay from I sorry from ideal CV I will be able to get VT so anything additional term appears here from experimental if I subtract this ideal that experiment the difference is what value I will get from that that is what my whole measurement technique is about if there is additional Q by C ox something this theory I know okay this values I know so I know my this value so I will actually see CV curl see how much shift it was from the ideal okay the shift is whatever is the extra term is the shift from the ideal is that clear so the first thing we plot in the CV curve is ideal CV then on the top we plot experimental CV and the difference and where we measure we will see that difference is the additional term appearing in this terminology is that clear to you so this expression is the only expression I use in all my CV measurements okay all my CV measurements please remember that will give me all kinds of parameters which I am looking for MOS system okay I can measure phi m S also through that I can measure Q ox I can measure QIT different techniques there are seven interface state measurement techniques we will only show you what is most famous among them is called quasi static or Bert Lund's method there is a gray brown there is a triangular sweep there is a conductance Nikol, Nikol Engelsberg technique then there is a pure low frequency CVs and there are DLTS the n number of ways you can evaluate DITs okay however we will only look into the simplest which is called quasi static very fast high frequency low frequency CV and anyway why we are not I am not so keen about getting exact value because exact value does not help me anyway I know how much maximum I need to get okay I control with that even if it is 10 to power 1, 2 into 10 to power 11, 10 to power 11 is same for me how much one order I have to reduce okay so I am not so keen and process to know exact value but because they are actually 1.875 into 10 to power they will ask you this okay so do not put it 2 into 10 to power 10 there put 1.87965 in real life it does not matter okay so next time I will use this give you the CV techniques faster CV techniques and we will finish