 Hello and welcome to this presentation. My name is Bedardine and in this video we will learn how to set up a different OctoSpy flash memory and that GFX template. In this first part we'll see how to set up the OctoSpy peripheral in STM32 Cubamax. If we look at page 20 of the STM32-H7B discovery board user manual we see that it has a 512 megabit OctoSpy north flash memory and this video will see what changes need to be done to use a different memory from a different vendor and a different flash size in the TETGFX application. For example we'll use the IS-25 north flash memory from ISSI. The IS-25 family comes in two sub-families the IS-25LX family operating at 3 volts and up to 133 MHz. The IS-25WX family operating at 1.8 volts and up to 200 MHz. The two families come in 128 megabit and 256 megabit flash size. We'll use the IS-25LX-256 because its operating voltage is compatible with the STM32-H7B discovery board. Besides this memory comes in BGA package and it's pin-to-pin compatible with the one from Macon X. I will start by launching TETGFX designer version 4.17 and TETGFX designer is a GUI builder that lets you easily build your graphics application. On the left hand side select examples and select the board setup. In this video I'll use STM32-H7B3 discovery kit and then click select. For the example example I will go with animated image example given name to my application STM32-H7B underscore octos pi IS-25LX 256 and then click create. I have my example ready. I'll generate the code then browse to the files click on files here on the left hand side go up by one level here and then double click on STM32-H7B3 IUC5. I have my STM32-QBMX project open I'll go to pin out and configuration tab and then to connectivity and here we see we have two instances of octos pi peripherals so the octos pi peripheral is used to interface to octospi or serial flash memory. So if you look at the schematic of the STM32-H7B discovery board we see that the octospi instance 1 so here octospi 1 is used to interface to the octospi flash memory. I go back to QBMX and select octospi 1. Here in the mode we have all the modes supported by the octospi peripheral single-spy dual-spy quad-spy quad-spy multiplexed and here we'll use octospi mode because we have eight data lines if we go to schematic we see that we have eight data lines from IU0 to IU7 and that's why we'll use octospi mode and the clock we have either the possibility to connect the clock signal to port 1 clock or port 2 clock if we go to the schematic we see that the clock pin is PB2 and then we go to the device datasheet table 9 we see that PB2 pin is or can be mapped to octospi port 1 or P1 clock so we'll select port 1 port 1 clock same way for the chip select if we go back to the schematic we see the chip select in this pg6 we go to pg6 and here we see that pg6 can be mapped to octospi port 1 chip select and go back to QBMX and select port 1 chip select and here we see in the GPU settings tab under configuration we see the default pins enabled for the octospi and we see here for the chip select PB6 is used by default and PF10 is used by default for the clock so here we need to match the schematic so the schematic uses pg6 for the chip select and so we need to type in pg6 and change the default configuration to from pb6 to pg6 so pb6 is again is correct configuration is just it doesn't match the schematic so we use pg6 for the chip select and for the clock same way for the clock we see it for the clock PF10 is used by default go back to schematic I see that the clock is used in the schematic pb2 so here I'll change it to pb2 pb2 octospi port 1 clock I go back to the mode and enable the data store we see here in the schematic that data store or DQS signal is used and the pin used for that is PC5 so we enable the data store for port 1 and the default configuration is PC5 and it matches the schematic next we'll do the data lines port 1 same way and here we need to make sure it matches the schematic so we have the data lines expand this so for the iu0 we see in the schematic for the iu0 is pd11 while QBMX uses PC9 so we'll change it to pd11 to octospi iu0 same way for iu1 iu1 the schematic uses pf9 while QBMX uses PC10 by default we'll change it here with the search for pf9 and here toggles change it to octospi iu1 for iu2 iu2 by default QBMX uses PE2 I'll change it to pf7 pf7 and octospi iu2 one more data line is the iu3 pf6 so by default iu3 is mapped to pf6 which matches the schematic then we'll enable the data from 7 to 4 the MSB of the data same way we need to make sure that the configuration matches the schematic here we check iu4 iu4 by default it's pd4 while the schematic uses PC1 we'll change it to PC1 octospi part 1 iu4 next iu5 by default uses pd5 this is the QBMX default configuration while the schematic uses ph3 we'll change it to ph3 octospi part 1 iu5 iu6 pg9 by default and this matches the schematic iu7 pg40 and this doesn't match the schematic the schematic uses pd7 so we go here and search field and we type in pd7 and we change it to octospi part 1 iu7 okay now one more thing we need to go to system core GPIO and then the octospi tab here and we need to enable the internal pull up for the data stop signal so which is PC5 so here in the GPIO pull up pull down configuration we need to enable the internal pull up for the chip select we already have an external pull up so no need to enable the internal pull up for the chip select signal next I go back to octospi one and then to parameter settings here we'll set up the octospi peripheral so we'll leave the 5 4 threshold to 1 I'll keep the dual quad mode disabled because we have one single octospi memory the memory type we have either micronex AP memory or micronex RAM so here the memory type specifies the order of the data in double transfer rate 8 data bit mode in micronex mode the data is organized as D0 and then D1 while in micronex it is D1 and D0 if we go to the device data sheet we see that the data comes out as D0 then D1 so the IS memory is compatible with micro mode we can see in the micronex data sheet that the data comes out as D1 then D0 then D3 and D2 so I go back to IS 25 data sheet and then I see it's D0 D1 so compatible with micronex type next we specify the device size which is the size of the external flash memory in bytes and it is calculated as 2 power of n where n is the device size parameter here in cuba max the IS 25 lx 256 is 32 megabytes flash memory 32 megabytes is 32 megabytes is two zero zero zero zero hexadecimal value and we see that bit bit 25 is set so 2 power of 25 is 32 megabytes so here in cuba max I set the device size to 25 next the chip select high time is the minimum number of clock cycles where the chip select must remain high between commands the IS 25 lx 256 specifies 30 nanoseconds here if we go to page 88 we see here that TSH SL2 is 30 nanoseconds so we need to divide 30 nanoseconds by the clock period of the octaspire I go back to cuba max and then I start my calculator so I divide 30 nanoseconds by the clock period of the octaspire the clock period of the octaspire is so we have the frequency here to the octaspire 133 megahertz and we need to divide it by the clock rescaler which is 3 so the clock period is 3 divided by 133 megahertz so we divide 30 nanoseconds by 3 and then we multiply by 133 megahertz so here we have 1.33 we round up to to the next value which is 2 so here we set the chip select high time to 2 we'll keep the free running clock disabled the clock mode the clock mode indicates the level taken by the clock between commands when the chip select is high in page 47 page 47 of the IS 25 lx 256 datasheet we see that the memory supports mode 0 or low level and mode 3 which is high level so our flash memory supports both low and high we'll select low we'll keep the app size not supported the clock prescalar 23 meaning the clock on the bus is 133 as we saw earlier the octaspire is 133 megahertz divided by the prescalar 3 here so which gives us octaspire clock of 44.3 megahertz we'll keep the sample shifting to none and we'll enable delay hold quarter cycle which means we will add a quarter cycle delay on the outputs in DTR communication to match the whole timing this is recommended when using double transfer rate or DTR mode I will keep the other parameters to their default value now I will generate the code my code is successfully generated I'll click on open project I have my STM32Q by D launcher here I need to give a new workspace and click on launch thank you for joining me in this video and we hope that you enjoyed learning how to set up the octaspire peripheral in STM32 cuba max and the second part of this video we'll see how to initialize the octaspire flash memory