Speculative Parallelization of Applications on Multicores





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Published on Oct 21, 2008

Google Tech Talks
October 20, 2008


The advent of multicores presents a promising opportunity for speeding up sequential programs via profile-based speculative parallelization of these programs. In this talk I will present a novel solution for efficiently supporting software speculation on multicore processors. Our execution model maintains the state of speculative parallel threads separately from the non-speculative state. Thus, if speculation is successful, the results of the speculative computation are committed by copying them to the non-speculative state. If misspeculation is detected, the speculative state is simply discarded. A lightweight mechanism that maintains version numbers for non-speculative data values enables misspeculation detection. Through profile-based speculative parllelization of a set of programs, our approach achieves speedups ranging from 3.7 to 7.8 on a Dell PowerEdge 1900 server with two Intel Xeon quad-core processors.

Speaker: Rajiv Gupta
Rajiv Gupta is a Professor of Computer Science and Engineering at the Univ. of California, Riverside. His research interests include Compiler and Architectural Support for Optimization and Software Tools for Profiling, Monitoring, and Debugging. He has published over 200 articles in refereed conferences and journals, he holds 8 US patents, and has supervised PhD dissertations of 16 students including two winners of ACM SIGPLAN Outstanding Doctoral Dissertation Award in the area of Programming Languages.

Rajiv served on the Technical Advisory Group (TAG) on Networking and Information Technology created by the US President's Council of Advisors on Science and Technology (PCAST). This TAG provided input and feedback to the PCAST as it conducted a review of the Federal Networking and Information Technology Research and Development (NITRD) Program. Rajiv received the National Science Foundation's Presidential Young Investigator Award in 1991. He is a Fellow of the IEEE.

He served as the Program Chair for PLDI, HPCA, LCTES and HiPEAC conferences and General Chair for PLDI and CGO conferences. He serves as an Associate Editor for ACM Transactions on Architecture and Code Optimization, Parallel Computing journal, Journal of Embedded Computing, and Computer Languages, Systems and Structures journal.


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