 we are doing differential amplifier and we have already looked into the large signal analysis and now today we shall see some of the active loads, different kinds of load which Diffam can be can have and how we calculate the difference gain and the common mode gain, okay. So the first one which I am going to calculate is a normal active mode in which M3 and M4 are in saturation by force that the gates are both are N channel but as I said they can also be P channels. For this differential amplifier which I just showed with the active load, okay. The equivalent circuit you can start looking from that circuit again, if you have the figure please keep this figure up so that you know what I am saying. I am referring to this figure, okay and there are M1, M2 are the drivers in which inputs received, M3, M4 acts like loads and M5 is the current source, okay. Okay, so with this for this amplifier and since we said the difference mode is always used that Vgs1 is minus Vgs2 which is equal to VID by 2 each of them plus VID by 2 at V in 1 and minus VID by 2 at V in 2. So difference is VID by 2 minus of minus VID by 2 means VID. So essentially the difference can be divided half on the input 1 and minus half on the input 2 so that the difference signal remains VID, okay. So if I do that from the gate side if you see at the gate side there is a VID by 2 signal which is going to be your Vgs1 this is my source of the equivalent source for both M1 and M2. One can see from here the source one can keep seeing here this is your source and down there is a transistor M5 which is your ISS current source and it has a resistance of RO5 it has the output resistance of RO5. Now if this is your RO5 which is going to the ground and each signal is also provided to the ground please remember signals are from VID by 2 to is taken positive and ground ground is the second terminal. So this is your second terminal for Vgs2 the signals are minus VID by 2 therefore it is same the opposite sign plus minus this is plus minus this is plus minus okay and this source then is a common for both M1 and M2 and by simple thinking it is there at the drain side you are gm1 Vgs1 gm2 Vgs2 shunted by RO1 and RO2 is that clear this is same two circuits together I am putting in one way because source is common so I am going together on the both circuits then for the Vgs3 and Vgs4 please remember this is something interesting this transistors are connected at the outputs here VO1 and VO2. So this is your VO1 and this is your VO2 so it a transistor in saturation will receive some signal you can see from where since there is a potential going to be here and this is going to be grounded so there is a Vgs available for both the signal as if is going for both M3 and M4 is that point clear if there is a potential here they act like a Vgs for M3 and M4 okay. So those signals if you look at it can be represented as gm3 Vgs3 gm4 Vgs4 shunted by their resistance RO3 RO4 but the interesting part is this potential across since please remember this gate is common to both and going to the ground the potential here essentially is Vgs3 and VO2 is Vgs4 this is drains these are drains of M3 and M4 okay. Since this potential is Vgs3 because you are connecting gate to the drain okay so this is again Vgs3 which is also VO1 this is drain this is free since the potential across is gate and drains are common the potential VO1 is same as potential Vgs3 same way Vgs3 is VO2. So what does that mean this is equivalent of what if the potential drop across a current source is the same potential then what is the equivalence of that there is a resistance there of what value 1 upon gm3 and 1 upon gm4 please remember this is a simple circuit theory if the potential is Vgs3 and the current source is Vgs and current source is gm Vgs it has a resistance of 1 upon gm as straight as that see if I use this equivalence also I do some interesting things you can see since Vgs2 and Vgs1 are in opposite sense okay minus Vgs2 is going to come the current through RO5 is in opposite sense if this goes like this essentially the Vgs2 because of minus one current goes like this the other current comes like this is that point clear Vgs2 is minus Vgs1 yes so this current is going through this in this direction this is minus so as if the current is coming out of this on the RO5 generally gms are equal Vgs1 are smaller okay very small value they may not be exactly same but maybe because Vgs1 is minus Vgs2 this current sources are equal if gms are equal so what does mean how much current is really flowing in RO5 0 is that point clear if gms are equal and Vgs1 is V minus Vgs2 current through RO5 is 0 and this fact I will use everywhere now okay if this is grounded physically by us and no current flows through is what is the condition for the source it is equally grounded please remember AC ground and do not connect it to DC ground this is that equivalent of an AC ground assumption is gms are same as gm2 and other signals are opposite sense then automatically we say there is hardly any current in RO5 and since there is hardly any current in RO5 this potential is same as this potential is that no current means the potential here and the potential here must be same otherwise current will flow is that correct if we say no current the potential at the two ends of RO5 must be same no current is that clear this current goes through this direction in RO5 this is minus sign so this current comes out of this and if gms are equal and Vgs1 is e Vgs2 by magnitude the two currents are cancelling in RO5 so there is no current in RO5 equivalently saying of course gms are different they will flow but otherwise and even if they are different they are very small difference will come okay so practically what we say drop across this is very small because very little current can flow or zero current can flow so this potential must be same as this potential this is what AC currents are AC drops are minus Vgs2 is that clear that is why it is minus no is that that condition is for difference mode signal amplifier we are looking for DVDs is that clear so essentially it is a difference mode amplifier the currents will be in opposite sense is that correct so if I use this theory which I did here then I have a very simple circuit which is what the circuit analysis people do they just forget about RO5 put your source of this transistors as to the ground okay we are removed RO5 from here equivalently saying this is ground this is gmbrd by 2 gmbrd by 2 this is RO1 RO2 1 upon gm3 1 upon gm4 RO3 and RO4 do you see two circuits actually they need not have been drawn one over the other this is independent circuit and this is independent circuit in between there is a ground just to save space I showed you one ground this one they won the opposite one is that clear these are two independent circuits is that correct the VO1 and VO2 are independently seen by us is that correct since the source is common I am using common line here one on the up this side and one on the other side so this is drain this is drain please remember these are drains of both the transistors outputs of M1 and M2 okay now that is so this is a parallel combination of RO1 1 upon gm3 RO3 this is a parallel combination of RO2 parallel 1 upon gm4 parallel RO4 same thing I just want to show this two circuit can be as if independently shown to you because this is source which is grounded drains of yeah essentially we are saying same essentially so that is the source of N channel but which is connected to the same terminal okay and therefore we say they are commonly called drain of M1 and M2 okay this is drain of M1 and this is drain of M2 but we have put the sign opposite now current source okay that right if it done I will write minus you are right but here I did do that is that clear I did this same thing here yeah it is going to the drain this is coming from drain to the ground this opposite sign has been taken care okay opposite side so if I now these two circuits what do I calculate V1 and V2 how much is V1 quickly say me minus gm times this load and this is plus gm times this load this is plus sign is this way this is plus gm times this load is the output minus gm times this load is the output is V01 is that clear so if I calculate both of these which I did you solve yourself again this is only to show you how to solve circuits so the gain of first you go VID by 2 plus is V01 by VID gm 1 by so much similarly so if I write this expression so it is minus gm 1 upon 2 plus gm 3 plus g o 1 plus g o 3 why I put genes because 1 upon R plus 1 upon R plus gm you have to invert it again so if expression becomes long enough so many times add conductances if they are in parallel is that point clear whenever conductance you have parallel things you can convert them into their G's and add them out okay essentially when you want to know or you will have to do 1 upon again okay but this is much easier to do conductances so every D1 okay oh sorry by 2 I have taken care through this I think just keep whether it is so similarly I can calculate every D2 that is V02 and I calculate the trick about this game is if gm 3 is much smaller than Geo will it be right to say so trans conductance of an amplifier will be the order of 10 to power minus 2 or minus 3 amps per volt okay whereas what will be the order of conductances minus 6 or minus even higher okay 10s mega ohms or 11 mega ohms to 10s of mega ohms so when I shunt a smaller resistance by larger larger can be neglected so roughly one can say that is why I say roughly this rule gm 3 if I substitute gm in this formula at ISS by 2 all that I am going to get is rich gain is W1 by W3 is that correct W1 by W3 similarly I wrote this yeah 2 will come because this 2 is appearing here I should have put 2 here but that is same that will anyway difference it will get added what we are you are saying is right VID is VID by 2 minus of minus VID by 2 so if I calculate for this they will sum in the difference of VID will anyway come when I actually add the 2 gains 2 by 2 but same for the other one also so by the when I take the sum of this VID by 2 be minus VID will be get subtracted out any way to get you VID is that correct so if I get AVD what is the when I sum this 2 I get VID AVD is W1 by W3 what does that mean what is the advantage or disadvantage I see in this expression the difference gain does not have any quantity which is dependent on what only the size of the transistor but nothing else no VT no beta in dash it is independent of transistor parameter except size except size is that correct it is independent of everything else now not even ISS okay not even ISS so essentially this means that I can fix the difference gain by what should I do in this figure I should adjust the size of M1 M2 with reference to M3 M4 the ratio of these why I am setting I did not take links because links in all transistors will be identical unless said otherwise links of all transistors will be the smallest channel length available to you is that correct all integrate circuits in analog uses common channel links for all the transistors so is in digital channel links are never changed okay because if you increase channel length what will happen digital or even here the time taken for an electron to go from source to drain will increase or decrease increase because the channel length is higher so what does it mean in time term as frequency term it will slow down the circuit so at no time the channel lengths will be actually reduced however if you recollect back I say lambda is somewhere related to this and if I want lambda to be small what I what do I gain if lambda is smaller r0s are higher so what do they are what I am now trying to tell you they are used longer channel lengths okay if you want output resistance to be higher but if you want larger gains you better use larger bits is that issue coming to some way GM r0 term is now getting opposite way increase GM increase size increase r0 decrease lengths okay this means there is some optimal will appear is that word clear to you GM will go proportion to root W or 0 will go 1 upon L okay now essentially if I increase W your GM will increase okay or W by L essentially if I increase I will increase GM but if I increase lengths I will improve r0 GM r0 is essentially some way intrinsic gains so is that camera love a but I will go to this one down hugato there is some maximum minimum will occur you turn for a whatever can be done so can't have longer length can't have smaller much smaller you will have to adjust many times so the idea is in digital circuit so is in analog don't change links often use common links for everyone and what is the available length of device the channel then given by technology people let us say it is 0.25 micron process the channel length is 0.25 micron so use everywhere same links is that clear this is a SanctoSanct number channel length use everywhere else same else so when I divide W by L by W1 by L1 upon W2 by L2 L1 L2 are same so it is only ratio of sizes okay but remember it is W by L ratio I am taking links being same I am canceling means essentially it is the size ratio W by L of the one by W by L of the other is that correct but length being same we only save it is that this fact is understood by all analog designers or digital designer when they go on the chip because that is the way everything should be uniformly kept on a board you cannot do anything like this why the circuit devices will be given by someone else they may have anything we do not know so we just go by and connect and hope for the best so no integrated circuit equivalence can be created by a breadboards is that point clear to you because discrete devices are never identical is that clear to you discrete devices are never identical so what is the experiment I suggested you in the lab to do that they are they look like I see there is a array array of transistors you use in which transistors are most likely to be identical and then you can make a defam to that array is that correct otherwise no way you can actually create an equivalent circuit equivalent IC in a discrete okay so what does that what is that trick I am trying to say so do not make a opamp out of discrete components it will never give a good gains or good bandwidths okay however which amplifiers can be used with single discrete transistors this normal amplifier common source common whatever transistors you have you can always use them as a normal gain stage gain stage wherever you need but if you want to defam or you want to have an opamp at no time try components discretely and connect okay however as I said you and if you pick up array of chip which has a more transistor you can pick up inside that there will be pins which will be available for each source brain gate for each of them if there are area for there will be 12 pins plus VDD pins plus many other things so if you use that then you can make a opamp so try if you can get in our lab but that is okay at least you have seen that commonality of transistor parameters are guaranteed to some extent if it is on an array otherwise take one transistor discrete put here on the breadboard this will never have any gains available is that because of the mismatches it will have okay so this fact has to be understood that why I keep links constants everywhere because all ICs will have common links we never change that unless of course I say I am looking for a buffer stage in which I want really R0 to be of particular value then I may tailor it for that specific particular device okay that is called tailoring and that time this is difficult to tell her because say extra mask as we say and if you do extra masking that means please remember in circuit I do not know I have not been told any technology we go through around 20 odd mass steps as we call patterning each mass patterning step cost you around a million dollars plus okay if you add one mass additionally for doing one separate process for one transistor then you are almost asking me to do additional money on the same chip one million dollars okay of course number of chips will come out of the paper but it will cost very increased per mask and therefore in interior circuit you are avoiding extra mass okay but if you need it yeah it is possible okay so having shown you the gains the output resistance how much is the output resistance of a defam how much is R01 the GM 3 plus G01 plus please remember how do I look at R01 at this end how many resistances I will see R of this R of this plus one upon GM of this okay three resistances in parallel R3 conductances in series GM 3 plus G01 plus G03 which is roughly equal to GM 1 upon GM 3 by same argument R02 is 1 upon GM 4 G02 plus G04 which is GM 4 and the ROD is essentially called some of the R01 plus R02 which is nothing but 2 by GM 3 if 3 and 4 are identical oh please remember now in this transistor the connection was of this kind this is diode connected this is not diode connected the GM's occur only when VGS in VO is same across that means rain is connected to the gate is that correct only than the potential is same this potential is same as this potential is that clear only than that condition is satisfying that the drop across a GM current source has the same voltage drop then only it becomes GM this is called diode connect only in diode connection the actual output resistance is 1 upon GM shunting R is fine but that R0 are so high so it is only one upon but in a normal this the this VGS and VDS are not same now so they are giving you a R0 only there is no 1 upon GM term because the VDS is not same as VGS is that point clear to you so this issue has to understood that is why this was called active source active current loads active loads for in channel transistors okay is that clear so only what time you should use GM's when there is a diode connection okay otherwise no otherwise a normal transistor with also R0 sitting is VDS is not same as VGS is that right same potential drop hair to he GM you understand now current a then upon a message a word Kabir Madh Bulna if this is GM some V and this is V this is equivalent of a V and then this is 1 upon you can see now V by 1 upon GM is the current which is GM V is that correct so these are only equal when this condition is made otherwise it is not equal so whenever that that is the circuit I showed you know I connected them and therefore this GM term appear now we will do in which case this does not occur and in that case we will remove that GM it will be only our rules is that correct why I am showing you parallel because I want to tell you are as may come or GM may come depending on whichever is smaller among the them okay that may dominate or whichever is higher than that may dominate is that okay ROD is between the two terminals of VO1 and VO2 a car resistance if not a car resistance if not the net terminal to the ground is equivalent of two times that okay so the next which is most important okay this is the most important circuit which all chips will be using okay what is the different between the last one and this what kind of load I am using now P even there I can could have used but what is the kind of load I have used now it is called current mirrors the gate of this is connected to the drains of this is that correct this is called current mirror so whatever current is here depends on the size being equal will be passed on into current in M3 should be equal to current in M4 provided size of M3 same as size of M4 otherwise how much if this is double the size twice the current filter now this current mirrors which is what I have shown you sideways this is a standard current mirror which is equivalently put there now this is the standard as I say first stage of an opium this is the first stage of an opium is that correct this is the first stage of an opium which is going to be used the next stage is what we call single ended amplifier and that will become two stage opium okay this you may call one first stage opium okay then we will have a two stage opium and we may finally have how many third three stage opium what is third stage will be the buffer do you understand the difference between buffer and in common normal gain stage the buffer normally provides you currents what does it do larger currents is that correct so buffer the characteristics Hamesha dhan before this is like equivalently saying like this it will either provide current from here from power supply to the load let us say it is a capacity load or it will discharge this capacitor to the ground through the lower one so what does that means at a given time either it will source or it will sink is that correct so that is called the buffer stage is that buffer is more clear the output buffers are always designed for in which either it will source the current or it will sink the current is that correct this is the third stage of an opium which is the buffer stage okay but let opium come and we will come to it again so this is the first stage which we are looking into now here is something which the real circuit may look like this is your current mirror so the current ISS is created from where now please remember what is the difference between last stage and there I applied some potential VGG here to get that current source is that clear in the last case I applied to R5 M5 a supply voltage and I got the current source out now I say why do that I may as well use a current source current mirror so here is my current which I am creating which I am now transferring to M5 okay keeping what now what I can do tricks I can use different size here and different size here and I can adjust this value by the ratio of these two okay this we already done okay this is your current reference VDD by since these are equal VDS and VGS are equal we just calculate and find how much is current here if we know this please remember in this case again VGS 6 and VGS 5 are same therefore the currents in M6 and M5 are same with the size ratios is that clear this is this we did in mirrors so this is a biasing circuit what is this called this called the biasing circuit can I replace R also by a transistor shunting to the drain I can convert this is a R equivalent of that so I can replace R also by a transistor right now I showed you a resistor but in reality I may have a transistor okay so I may have a current here which I can fix and I can then mirror it into this whichever value I am looking one method is actually create same current transfer here as one to one or make any current here take a ratio of these two and push the current of your choice in M5 okay I want say 5 milliamp current I may create one here but keep a ratio of 5 and pass 5 milliamps is that clear so that is the way we can create the current sources at M5 this is a potential VP this is my M1 M2 and we this now few things you should know from being one minus V into is VID which is nothing but VGS one minus VGS 2 we as usual apply VID by 2 here minus VID by 2 to the other gate we also know VGS one is equal to VP what is why I am saying it VGS one is same as VG I just now said the resistance of our 5 is large enough then and if the two currents go opposite this potential can be treated equal to VSS and right now for DC it is minus VSS for AC it is how much ground so we say VP is close to the ground is that correct because I am not sure whether they are exactly identical so I may say okay VP is roughly close to the ground or can be treated ground so VG or VGS is same VG and VGS because S is going to the ground so VG or VGS is same so we say VGS one is VG one VGS to VG two condition again same as just now I said is that point clear just now I saw the case I say VP can be treated equal to close to the ground okay if that is the equivalence we agree then we calculate this circuit should be kept sideways you this I am keep using there is a potential node which is essentially V01 which I am calling as VX for the simplicity okay is that correct why I am not calling at V01 specifically because I am not picking an output there okay I am only picking an output at this end so I call that node as VX okay is that point clear this is essentially V01 but this I am calling at because V01 means either I am taking an output I am not calling this node V01 essentially because this V01 means I am picking output which I am not I am only keep finding what is the value of voltage here please remember by making this connection this is my gate this is my source can you tell me why source on upwards in P channels holes must go down okay otherwise there will not be possible of same direction currents okay so you can see if I connect leak like this this potential which is here this is shorted this potential and this potential are saying is that correct this potential are saying this is what I used no because the with this value itself I have calculated the cut understood here I am not hitting ground here I am treating minus VSS as the value and VDD is this value so when I calculate reference current I am using VSS there so when I am keeping this they by making of choice of this which is the gate of this I am ensuring this VGS is positive enough greater than meeting with VSS that is what I did now when I calculate the current and I assume this transistor in saturation I am I am actually forcing the value of resistance such that transfer remains in saturation with that kind of VSS available if it is ground on this value will change is that correct if minus VSS it will change different but it will force you go to be in such a so what is VGS for in your circuit keep watching that how much is VGS for the VS for which is the source terminal of both the transistor minus VX a source a VS4 and VS3 are same this potential minus VX is the VGS is that correct we know this is grounded for easy but right now as I said this is VS potential of this minus VX is the VGS source so this is our other VX minus this equivalently same okay VX minus VS is VGS yeah that is what I wrote now that is because it is a P channel device it is a minus potential will appear so we say VGS for is VS4 minus VX okay we are you can also call it minus fair enough okay this is VS3 minus VSVX please remember VX is the output of first M1 M2 amplifier with M1 receiving VID by 2 please check it what I say V01 is the output of a defend at terminal VX when M1 receives VID by 2 M2 receives minus VID by 2 is that correct so we know VX is nothing but GM1 VID by 2 RO1 parallel RO3 and for your case someone was asking now put one upon GM3 here also is that correct if that is so this is RO13 GM is some of this so VX is V01 minus GM1 VID by 2 into this since RO13 is normally equal to 1 upon GM3 so VX is minus GM1 by GM3 times VID by 2 for one input from the M1 side the output is VX is minus we did it for common this amplifier earlier we are just writing the same expressions so it is GM1 by GM3 into VID by 2 is the VX okay if that is so can I calculate VGS4 therefore okay so having done this I calculate VGS4 which is GM VID by this now I have for these and this M2 M4 amplifier you look at this I am talking the view is decided by how many inputs maybe I see a hamper maybe I see a hamper M4 is also an input has an input and M2 also has an input so the output voltage by superposition will say is the available because of this plus available because of this please remember there is a signal coming at the input of M4 VGS4 is a small signal which is coming as a input there there is an input anyway here is that correct so this potential is not only governed by M4 inputs but also by or not only do you learn by M2 inputs but also by M4 inputs is that clear to you since this value in this case is signal available to you small VGS4 or VGS3 is available to you this acts like an input to M4 so it will also amplify this and this is given so input any way by us so it will also amplify is that correct the sum total will be the net VO value for you occurring because of M2 and M4 input or M2 may be AC input say don't know milky output bring up or the only thing is since transistors are assumed in saturation we say we are signals are small enough then what is the condition I am satisfying linearity superposition theorem is only valid if it is in linearity so our assumption is because of the condition I enforced both systems are in linear mode therefore superposition is possible please is that point clear to you superposition is only and only valid if system is linear and please take it I repeatedly tell you which is the question I have been asking in here why is equal to MX plus 3 is a line so like looks like linear but the system is non-linear okay this fat has to be appreciated in whole of the life of electrical engineers this is a AC signal which is connected here output of M1 coming at here is connected direct to the gate of the input is that correct current mirror cannot connect to the output input is that correct is that correct okay so all that I do I solve this problem I calculate VO due to VGS4 VO due to minus VID by 2 I also assume all transistors like GM1 is equal to GM2 that is M1 M2 identical and M3 M4 are also identical but M1 M3 and M2 M4 are not identical only pairs are identical M1 M2 identical M3 M4 identical GM3 is GM4 I solve this problem that I you only see this is the line I said VO VGS4 VO we have minus a those signal cut some Karna output is that clear the next is this so we have this is due to VGS4 do you know what is why this is VGS4 is co VGS4 co VID get an major expression this is due to VID by 2 into the RO24 what is the output resistance at V0 the output resistance of 2 M2 parallel to the output resistance of 4 and there is no GM terms appearing here because it is not diode connected whenever diode connection make it GMs 1 upon GM if no diode connection it is only RO is that correct so if that is either I say ROs will get cancelled simply because not necessarily removed if that numbers are let us say RO is not very high in which case parallel combination must be taken care but as I told you GMs will be order of minus 2 minus 3 and per volt okay ROs will be order of minus 6 minus 7 per ohm per current for this so essentially we are saying that ROs are much larger than 1 upon GMs and therefore 1 upon GM is a good approximation in most cases but I have never written directly I first show you parallel combination and then I say if this is larger I can use that so in real life calculation wise never leave turns numerically they will get eliminated 1 upon 1000 plus 1 upon 5 do whatever you it is a 0.2 only okay so that number will automatically get eliminated you need not do anything you solve parallel combination the other terms will be small enough to be used in the expression is that but if you are sure and you can write there is nothing wrong these are too high compared to I use this that is what I let your engineers are all about okay what is the output resistance of this stage so every DD is view by VID GM 1 upon GO 2 plus it goes up for sort sort karovi to ya jaiga a bad expression the cook what is the upper terms are talking about what is this upper term is because of GM 1 of M1 which is same as GM 2 is that correct GM 1 is decided by what factors please look at it what factors GM 1 is decided beta dash which is a given technology the size ratio W by L into the bias current ISS where from this is fixed from the mirror side which I am fixing what is our GO to Geo4 is lambda 2 plus lambda 4 into ISS by 2 I can take ISS above now okay and I do so one thing very interesting is happening and that is why I have shown you this expression I will come back to this expression please note down this is relevant expression in our difference gain value beta N dash W by L 1 divided by ISS upon lambda 2 plus lambda 4 they are equal than 2 lambda okay then this 2 will also be oh I just now showed you and okay the output resistance seen at this terminal is because of this this is RO 2 and this is RO 4 so is terminal for the resistance parallel mehna so RO 2 4 is a parallel combination of RO 2 and RO 4 did you see GM from there no why it is not direct connection it is an open ended blocks okay so I calculate this term I calculate the output resistance R 0 which is RO 2 parallel RO 4 then I see very interesting two functions the difference gain is proportional to W by L of M1 or M2 they are equal M1 transistor is identical to M2 if I am cage or drivers and what is the size same over their size what will be larger the W by L larger is the gain is that correct larger is the size larger is the game but one interesting feature I am seeing this difference gain is inversely proportional to root of ISS what is it trying to say that is if you work at smaller currents your gains are higher which is very very typical and normally what do we say pump the power and get the game it is now trying to tell me that reduce the bias currents okay if you reduce the bias currents differential gain is higher okay however and they are also universally proportional to values of 1 upon sorry 1 upon ? of M2 and M4 if you see your R 0 which is 1 upon ? 2 by ? 4 this so if you see RO 2 4 value it is 1 upon GO 2 plus GO 4 which is 1 upon ? 2 plus ? 4 into ISS so the output resistance is inversely proportional to ISS so if you reduce ISS output resistance increases if you reduce ISS your game increases so why not always keep small currents power dissipation is lower it is lame and a but I keep when I go for open this is the place where I will come back to you so no if I reduce ISS I may lose something this condition is valid what I have shown you is a valid statement there is nothing great great thing going wrong is that correct then why are people do not want much smaller currents the net output resistance of defam do you want higher or lower I have not stated so far is that correct defam RO KITNA HUNA CHAYE YAY NEXT STAGE BATANEMALA YAPKU or you cannot decide arbitrary like this because you do not know what load you are connected is that correct that is why too much smaller currents are too higher current both may actually hurt you very strongly is that clear now me but this is not the only reason there is a major reason which we will see later we have been a person who did not figure Nikala Tha for you opamka opamka the output right away capacity load by driver this capacitor to charge karna kithna hoga CL DV0 by DT and this should be supplied by the buffer currents either source or sing or yes or sing current are a yes s K same area okay are so it come up yet the ISS related hand so what does this essentially will tell if ISS is smaller the time taken to charge or discharge this capacitor will be larger or smaller longer time smaller current will charge or discharge the capacitor slower is that correct this term DV0 by DT is called slew rate DVs output charging to high or low is called DV0 by DT is called slew rate and that is decided by ISS by CL so if you want larger slew rates which you will require for high speed performance in connections then you must have larger currents but if you have a larger current your defam stage will have lower gains is that correct so yet each of me na abhi tak nahi bata hai opamki ki jo last stage connect huna hain that may finally tell me how much ISS I will be allowed because someone will specify you is that point clear what is one specification opam gives slew rate it has 5 volt per microsecond that is the slew rate they will say okay now to meet this slew rate for the given load I know how much ISS I will require and that is the ISS I will have to use back so that I can use a good defense so ISS is not very much in my hand which I showed you as if I can vary ISS adjust powers as a nahi hai ek ko haath karenge dhusra nikal jaga dhusro ka yeh nikal jaga so opam design karthe samai so chijo ka dhanar main t3 a core term hai us me jo main nahi boli ICMR input common mode range and output common output swings also our functions of ISS is that correct so for a given opam how much is the output swing possible how much is the ICMR given to you what is the slew rate you are looking for that all together will decide and power dissipation will decide how much is your ISS and therefore how much is the game is that correct so it is not independent of everything if I say I want larger against lurid marling or I should have very low loads but if you have very low loads then who are you to decide outside so essentially design of an opam does not just say ISS come Kardoa jaga karthani 4.10 parameters you have to keep adjusting so that roughly you get where you are expected to reach in the parameters this is what the design is all so is that clear why I am teaching you something more on the design side because at the end of the day we are not going to use analysis everywhere we are going to design chips or design component design parts so as a designer I must know where I am constrained okay analysis what does it give it gives me constraint either kya hoga hudar kya hoga hudar kya then I know I know I had I know analysis I know this changes this this changes this so if you want this please give me this if you want this please give me here okay so this is what designers do at the end of your course if you learn this electrical engineers are not going to be just using the component they are the ones who are going to design systems okay as a designers we must know my constraints and if those constraints have to be met analytically I must know what changes what the whole course is therefore slightly changed from last so many years is more towards design values because second year say after the mark maybe want to push you that you are going to be designers in life okay even in banks will be making some portfolios or you will design something okay so at the end of the day engineers design something okay it does there is a limit coming maximum minimum is also fixed but within that range also how much lower side or higher side your view point is correct if too much or too less I may get out of saturation or go to cut off but assuming there is a sufficient range in which I will still remain in saturation so we may be low I am seeing something I see something okay so during designs this condition which you said is always true saturation the key see how it may honi everything else this is after if device comes out of saturation you are in a non-linear zones okay so we are not going there is that correct so this point is well taken but there is a still values lower side and upper side where to work as a analysis I do not care now Joe value many Dia Nikala will output push the value is I got art world by a I am part of the way gain count he care art world by world I think 80 gain but it again can amplify okay they say art car so I have to know I must attend for three a thousand or five hundred game change I am so all these values analytically I damn care what value I substitute in formula and whatever I said this is the rough up in a good data but in design I will be given specs this is what I have to meet so I am trying to give you some ideas how do I think I mean I do not mean I designer things he knows analysis hundred percent therefore we teach you analysis from there I know each how it connects and then given me final this is double man and I okay this is a issue which I thought I must have hammer on you so please remember designs are part in parcels of all electrical engineering but more so far okay so this finishes the amplifier part which amplifier we did this is a different with what kind of loads current mirror loads the first case we did active load with diode connection but there is a third one also current sources itself that circuit I will not solve you solve which one the first circuit which I showed you first time actually it may be a current sources a m3 m4 the in case resistances is that correct this is RO3 this is RO4 so it is very very easy to solve a current source load is that point clear if this is simple resistors then we already solve the different case with simple to resistance so this is the case only advantage is this will have very large resistance is a good current source means output resistance is how much for that RO must be very high 10 to power 6 or 7 because you know there is no GM term will appear here because VGS is not same as VS there is no diode connection going on that means the voltage drop is not same across the current source as the GM times that if they are same then it is equivalent of a register but otherwise RO is always there of the transistor so this is equivalent of a RO here equivalent of a RO here okay just solve it okay and you will get the gains for this also okay so this finishes different as such before we quit I will not solve fully but just show you what how quickly we solve this we have been telling as if the mass defense are only going to be used but in real life which opens are still on bipolar 741 okay the 741 CV have market may are askels CV attack it was 741 each range so there mass opens 741 again is 741 bipolar open will be better than mass open or not is bipolar systems upon an amplifier that superior to mass systems or not okay basic idea is GM is GM is better in bipolar for everything similar compared to mass yes so bipolar amplifiers will be superior to mass amplifier any day in fact but what is the cost I will pay for our QIC by KT kar rahe to IC bada rahe to GM bada rahe to why actually I see bada kaya because beta 100 se jada hai IV micro may rakhane to be million se jada IC leke jada which means at the cost of power bipolar then we say why not use the same technique in a mass and use large powers what is the problem because independently if I am using I may do that but the power supply limitation may be increasing beyond 1.5 it may go to 5 volt and which no mass transistor gates can sustain what is the problem if the gate gets larger voltage break down if the electric field is larger than the critical field the mass upside may break down so I cannot just arbitrary increase BDD is that correct so that we will have to work at smaller voltages and for those the currents will be smaller and therefore GM's will be always smaller than bipolar for similar things only thing advantage I will get is low power since the chips are going to have low power dissipations we will prefer mass circuits on any silicon chips okay is that point clear why silicon chips are always presently mass simply because of power requirements otherwise you give me huge heat sinks big silicon area I may use bipolar circuit as much and do better performance okay is may have a cake you may be a star is may be a star is a current driven circuits a voltage driven circuits so is may subject currents use current I will be one IB to however actual inputs will be voltage is being one and being two okay difference is still VID by two okay VID required minus same method current source a IE across a resistance a REE a meter here we have made the equivalent circuit I am going to make a RE resistance REE small RE or RS secret is emitted to substrate that is normally used in many books but that is around less than 10 ohms or 5 ohms okay in actual calculations so if you do not use that it is much easier to solve otherwise RS plus Barbaria a guy or a the somer a mega home as a bar bar that they are not bad okay so may have a turn on give me a circuit may also you may not have but our books they can get so you will find they will use this term because they are actually solving full circuit so they will show you the RS part are small resistance which I showed you between substrate and emitter will be shown to you there so circuit will have this resistance here plus this resistance here so the emitter will see small resistance due to the emitter substrate this plus are he may raise many more resistance which resistance I normally neglect in analog RC RB RB dash and RS or are they may be used in case you want accurate analysis in analytical memory so it is now worth minor if you have spice space all karenge so automatically built in ingame so you do not have to think they will come there in model okay so they will take care of themselves you do not have to worry on that since you are doing numerically apne got up under kya hana pata ne naham ko yeh pata hai ki eye is GV we are all the time solving a current matrix for a given voltage matrix with given conductance matrix nodes ke upa hum yeh calculate karna hum ko kuch bhi model the wo andar se leta alone hum ko kya that we have to sit dekh rahe hain pick up output of that is what spice is of you must have seen you just give an input file and hope for the best it may not be the best unfortunately that is where the problem is okay see you