 Hello, and welcome to this presentation of the STM32G0 Extended Interrupts and Events Controller. We will be presenting the features of the EXTI controller. The Extended Interrupt and Event Controller, called EXTI, provides up to 34 independent events split into two categories, configurable events and direct events. These events benefit through smarter use of low power modes, taking advantage of the STM32G0's capability to wake up via external communication or requests. This is the block diagram of the Extended Interrupt and Event Controller. Configurable events are generated by peripherals without interrupt capability, but which are able to issue a pulse. The EXTI controller provides interrupt detection, masking and software trigger. Direct events are generated by peripherals supporting interrupt requests. In this case, the EXTI controller is used to generate events to the CPU and to request system wakeups. The Extended Interrupt and Event Controller can generate interrupt and event as well as wake up the processor from stop modes. Virtual events are linked with external interrupts from GPIOs, PVD and comparators Comp1 and Comp2. Direct events are linked with RTC, TAMPA, 12C1, USARTs 1 and 2, CEC, LPUART 1, LPTIM 1 and 2, LSE, UCPD 1 and 2. The Cortex M0 Plus supports two ways to enter a low power state. 1. Executing the Wait for Event Instruction WFE. 2. Executing the Wait for Interrupt Instruction WFI. With WFE, the first instruction executed after a wakeup event is the next sequential one, Instruction N plus 1 in the sequence on the left. By implementing WFI, the processor jumps to the Interrupt Service Routine when an enabled interrupt request is received. Note that an interrupt request is a WFE exit condition, but an event received on RXEV is not a WFI exit condition. This figure aims to explain the various stages enabling the conversion of a configurable event active edge into an interrupt request. The first stage is the asynchronous edge detection circuit configured by two registers EXTI-RTSR1 and EXTI-FTSR1. Any edge, possibly both, can be chosen. The software can emulate a configurable event by setting the corresponding bit in the EXTI-SWIER register. The bit is auto-cleared by hardware. An AND gate is used to mask or enable the generation of the interrupt to the NVIC. Finally, a flag is set in the EXTI-RPR1 register when the interrupt is generated to the NVIC. This flag enables the software to determine the cause of the interrupt. This flag is expected to be cleared by the interrupt service routine. This figure aims to explain the various stages enabling the conversion of a configurable event active edge into a processor event. Both configurable and direct events can be configured to issue events to the CPU, steered to its RxEV input. Unlike interrupt requests, the CPU has a unique event input, so all event requests are all together before entering the event pulse generator. The registers used to mask the generation of events are different from the ones used to mask the generation of interrupts, EXTI-EMR, instead of EXTI-IMR. The CPU wake-up signals generated by the EXTI block are connected to the PWR block and are used to wake up the system and CPU subsystem bus clocks. Both configurable and direct events are able to request a wake-up. A wake-up occurs when an asynchronous edge detection circuit has detected an active edge or a flag is set to 1 in the EXTI-RPR1 register. Consequently, software is expected to clear the flag in the EXTI-RPR1 register to disable the wake-up request when the source of the wake-up is a configurable event. For direct events, the flag is located in the peripheral unit. These flags enable the software to find the cause of the wake-up. The wake-up indication is asserted when either the interrupt or the event generation is enabled. See the OR gate combining EXTI-IMR and EXTI-EMR registers. All CPU wake-up signals are all together and then all with the event requests. The SIS wake-up signal is asynchronous and wakes up the clocks. Once H-clock is running, the synchronous C wake-up is generated. A direct event is able through the EXTI controller to generate a CPU event and trigger a system wake-up. The active edge of direct events is the rising edge. Direct events do not rely on the EXTI controller to assert interrupt requests because they have their dedicated lines to the NVIC. Otherwise, the same circuit as the one described in the previous slides is implemented. Direct events can be independently masked for event generation and interrupt generation. The interrupt mask is only used as a wake-up mask. The STM32G0 has 5 IO ports. Ports A to D are 16 pins wide. Port F is 4 pins wide. Each of the 16 EXTI configurable events related to GPIO ports has an independent multiplexer. The EXTI multiplexer outputs are available as output signals from the EXTI block to trigger other IPs. The EXTI multiplexer outputs are available independently from any masks defined in the EXTI-IMR and EXTI-EMR registers. This table provides all inputs of the EXTI block and indicates for each of them whether it's a configurable event input or a direct event input.