 Hello and welcome to this introduction to the STM32H7 series training session. It describes the feature sets of the various lines available in the STM32H7 microcontroller series. The STM32H7 series of very high performance MCUs comes with an ARM Cortex-M7 core and an optional ARM Cortex-M4 core for a dual core CPN. Taking advantage of up to 2x32 kilobytes L1 cache for instruction and data, the STM32H7 devices deliver the maximum theoretical performance of the Cortex-M7 core, no matter whether the code is executed from the embedded flash or from the external memory. 2424 core mark, 1027 DMIPS at 480 MHz FCPU1 and 2778 core mark, 1177 DMIPS at 550 MHz FCPU1. In dual core variants, the Cortex-M4 core offers 800 core mark, 300 DMIPS at 240 MHz FCPU2. The STM32H72333 line offers the performance of the Cortex-M7 core with double precision floating point unit running at up to 550 MHz. Its L1 cache provides 32 kilobytes for instruction and 32 kilobytes for data. The ITCM RAM can be increased to 256 kilobytes. All those fast memory accesses boost execution performance. The STM32H733 integrates a crypto hash processor providing hardware acceleration for AES128, 192, and 256 with support for GCM and CCM, triple DES, and hash. MD5, SHA1, and SHA2 functions. On top of features provided by the STM32H72333 line, the STM32H72535 line embeds an SMPS to scale down the supply voltage, decreasing device power consumption. It can also be used to supply external circuitry and can also be combined with the LDO for specific use cases. It proposes an optional extended ambient temperature range up to 125 degrees Celsius with junction temperature range up to 140 degrees Celsius. The STM32H735 integrates the same crypto function as STM32H733. The STM32H7A H7B lines offer the best balance between the performance of the Cortex-M7 core with double precision floating point unit running up to 280 megahertz and a very contained power consumption in low power modes for energy sensitive applications. It embeds 1.4 megabyte RAM and up to 2 megabytes flash. The STM32H7B integrates a crypto hash processor providing hardware acceleration for AES128, 192, and 256 with support for GCM and CCM, triple DES, and hash, MD5, SHA1, and SHA2 functions. The STM32H742 line offers the performance of the Cortex-M7 core with double precision floating point unit running up to 480 megahertz. It embeds up to 2 megabytes of flash memory. On top of features proposed by the STM32H742 line, the STM32H743753 line offers more RAM, an LCD TFT controller interface with dual layer support, and a JPEG hardware accelerator for fast JPEG encoding and decoding offloading the CPU. The STM32H753 integrates a crypto hash processor providing hardware acceleration for AES128, 192, and 256 with support for GCM and CCM, triple DES, and hash, MD5, SHA1, and SHA2 functions. On top of features proposed by STM32H743753, the STM32H745755 embeds an SMPS to scale down the supply voltage, decreasing device power consumption. It proposes an optional extended ambient temperature range up to 125 degrees Celsius with junction temperature range up to 140 degrees Celsius. The STM32F755 integrates the crypto hash processor. The STM32H747757 graphic line expands the family, offering an additional Cortex-M4 core with single precision floating point unit, the MIPI DSI interface, and some additional power schemes with SMPS. The STM32F757 integrates the crypto hash processor. The value line STM32H730H7B0H750 offers an entry point to the STM32H7 series, cost-effective, while the devices come with 128 kilobytes flash memory to host, for example, a user bootloader. This line is very suitable for applications where external memories are required. It comes natively in crypto variants only. STM32H730 is the value line of the STM32H723332535 family. STM32H7B0 is the value line of the STM32H7A3B3 family. STM32H750 is the value line of the STM32H742434555 family. The STM32H7 family benefits from the software and hardware tools available for STM32 microcontrollers. A wide range of development boards is proposed to map all features and variants.