 Hello, and welcome to this presentation of the STM32 hardware semaphore or HSEM module. It covers the main features of the module, which is used to manage the access permissions and synchronization of resources shared between multiple processes. The HSEM module integrated inside STM32 microcontrollers provides semaphores used to synchronize processes and manage access permissions for shared resources. This module provides a two-step lock mechanism and a fast one-step lock mechanism. Applications benefit from process synchronization and shareable resources via non-blocking interrupt-based semaphores. The HSEM module is located on the AHB bus. It consists of an AHB interface containing the semaphores and an interrupt management block handling the interrupt distribution. A dedicated interrupt is provided for each CPU. Each CPU has its own enable, status, mask, and clear register for the semaphores. Each semaphore consists of two registers. A write-read register used to write lock the semaphore in the two-step procedure and read back to the semaphore status. The write-read register is also used to free a semaphore. The read lock register is used to read lock the semaphore in the one-step procedure. The AHB busmaster ID is used to identify which CPU is accessing the semaphore. This ID is stored in the semaphore when locking and can be read back from the semaphore status as core ID. In STM32H7 microcontrollers, CPU1 uses core ID 0x03 and CPU2 has core ID 0x01. In the two-step write lock procedure, a freeze semaphore will be locked by writing 1 to the lock bit in the semaphore write-read register. The core ID and process ID used during the write will be stored in the semaphore. A process has to check that the semaphore is locked by it by reading back the write-read register. If the read back semaphore core ID and process ID matches the one written by the process locking the semaphore, it is locked by it. If the core ID or process ID doesn't match, the semaphore has been locked by another process. A locked semaphore can only be unlocked by writing the lock bit to 0 with the corresponding core ID and process ID. Writing the core ID or the process ID or writing the lock bit with 1 will keep the semaphore locked. In the one-step read lock procedure, a freeze semaphore will be locked by reading the semaphore's read lock register. The core ID used during the read will be stored in the semaphore during the read cycle. When the semaphore core ID value read by the CPU matches the one from the CPU and the process ID equals 0x0000, the semaphore is locked by the CPU. In the one-step read lock procedure, there is no process ID. The process ID when locked by a one-step read lock procedure will read 0x0000. If the core ID doesn't match or the process ID is different from 0x0000, the semaphore has been locked by another CPU or process. A locked semaphore can only be unlocked by writing the lock bit to 0 with the corresponding core ID and process ID. The two-step and one-step lock procedures can be used concurrently. In this case, the two-step lock procedure must not use process ID value 0x0000. In the case where locked semaphores from a malfunctioning CPU are to be cleared, this can be done by writing a key value in the HSM key R register and writing the key value in the core ID in the HSM CR register. It will clear all semaphores locked by the corresponding core ID. A semaphore get-free interrupt will be generated when enabled. Here is an overview of HSM interrupt events. When a semaphore is freed, an interrupt can be generated to a CPU. Each CPU has its own set of semaphore enable or IER and status or ISR states before the masking or MISR and clear or ICR registers. Here is an overview of the peripheral status at specific low power configuration modes. The HSM is not able to change state in system sleep and stop modes. In standby mode, the content of the HSM is lost. The HSM can only be changed when the system is in run mode. The HSM is able to interrupt and wake up a CPU in C run, C sleep and C stop modes. Semaphores can be used to handle one, access to shared resources. That is, this allows you to read, modify and write registers in a protected way or to share functions like the AES encryption engine, random number generator or RNG, etc. 2. Synchronization between processes. That is, used by a process to wait for input from another process. Here is a list of peripherals related to the HSM module. Users should be familiar with all the relationships between these peripherals to correctly configure and use the HSM module.