 Hello? Hello? Hello? Hello? Where is it live streaming? So can I just start? Hi? Hi? Hi? Hello? Hello? Hello? Hello? So whenever you are talking, right? Welcome to Day 2, Pike on India, 2014. Our first speaker for today is Raghav, who is going to speak on Introduction to Bin Pai. Raghav is an undergraduate computer student from Bitspilani and he is one of the maintainer of Bin Pai. Actually, from Anayana University, Chennai. Okay, whatever. Hi? I'm Raghav. I'm from Chennai. I'm going to talk about Bin Pai. So Bin Pai is basically a digital electronic simulation library. It started by Bitspilani Goa campus students. And it started a few months ago. And it's mainly aimed towards students. So like-minded students who know Python already and can try out some simulations out there. So again, there is a link at the bottom of the slide, which points to a GitHub repo, which contains the iPad and notebook and the presentation. If you get too bored, go to GitHub. So what to expect from this talk? Well, we'll see a little bit about digital electronics and see how we can implement those stuff using Bin Pai. We've got modules for gates, flip-flops, registers, stuff like that. And we'll play around with some ICs. And we have got an ASCII-based oscilloscope out there. So you can kind of run simulations. And there are some algorithms for multiplication, Koin-McLeod-Skinethode, I mean minimized logic minimizer. Hello? Yeah. So analog is kind of experimental right now. We don't actually have much analog libraries or functionality built into Bin Pai. But we do have a few, say, buffers, converters, and a signal generator, which can generate sine, square, ramp, and all. At the end, if time permits, we'll use an amplitude-modulated signal using two signal-generator blocks. We use two signal-generator modules of a modulated signal. So what I really kindly expect from Bin Pai is that it is not p-spacer or cap. There are lots and lots of tools which can do kind of accurate analog simulations. Bin Pai is not one of those. And we are kind of trying to be an Python equivalent of Verilog, something like that. And we are inspired, like I said, like it's put up here. We are inspired by two great libraries, MyHDL and PyEDE. Those who know about MyHDL. Pretty much. And PyEDE is a great math library, I mean Boolean math library. It's got SAT solvers and stuff like Espresso Heuristic Logic Minimizer, which Espresso Heuristic Logic Minimizer is a great minimization algorithm by Berkeley in ST, I guess. So again, a few more things I request you not to expect from this talk is a delay model, kind of a work in progress right now. And since everything is kind of run in a concurrent fashion, like we do it in Verilog, those who know what Verilog. So concurrency in Verilog is kind of simulated using multi-threading in Python. So there will be a few timing-related bugs. The reason we'll have a few timing-related bugs is that when there are different threads, the priority will be given to a graphic simulation thread and all that. Let's get started. The easiest way to install Bin Pai would be to clone it from the GitHub repository and just use Python setup tools to just install it. And we'll move on to gates. The basic fundamental block of Bin Pai is gates. And gates are basically like classes. You can instantiate from them just like we do it in Verilog. And these are the two tables, the Venn diagrams. Venn diagrams, those who are familiar with set theory, you must be knowing about it. Let me talk a little bit about XOR gate. XOR function is a really interesting function. It's also known as exclusive disjunction operation. The real importance of XOR is that when you give a uniformly distributed sequence, two uniformly distributed sequence, one as the input for A and another as the input for B, you get an output of uniformly distributed sequence. The uniformly distributed sequence means that in a random sequence, the probability of getting one or the probability of getting zero is equal. So the basic advantage of that is that in cryptographic systems, when I do message XOR with K, this is a key, you get this ciphertext, right? The ciphertext cannot be analyzed using frequency analysis methods to break it down. See, for example, if we use AND gate to do the same thing, the output will be kind of skewed towards zero. We know that the probability of that will be 0.75. The probability of getting one as the output of the AND gate will be 0.25. XOR is special in that case that probability of getting one and zero is same. So it's equivalent to modulo2 addition. I'll show you the demo of that, but before that, we'll look at three more slides. Connectors, buses, and linker module. These are basically the connection architecture of bin pi. So connectors are very similar to what we use in verilog, in-out, register, input, output, stuff like that. And they can be used to connect to digital structures, gates, stuff like that. And again, a bus is a really versatile class. It's a really useful object which you can get from bin pi. It's a multi-bit vector module. We can create a multi-port analog or a multi-bit digital. We can store multi-bit digital or a multi-port analog value inside it. And it's an abstraction over list. So basically, you kind of get to do all list operations like slicing, rotation, circular rotation, and stuff like that. And again, you can do batch updation. Batch updation, by that I mean, you can just set all the logic. I'll show you a demo. It will be more clear, but just take my word for it. You can do batch updation, set logical, get logical, and stuff like that. Then you have the linker module. So the connector module, like I said, it connects to digital blocks. So basically, you have a digital block outputting a value. And internally, it stores the list of all connections towards it or away from it. And again, it propagates those changes in values to the next digital block using a trigger mechanism. The disadvantage of that is that when you have a feedback loop, like we have in JK Flipflop. JK Flipflop is built around SR Flipflop. It's a feedback loop. So if you have those kind of circuits, you'll have an infinite triggering thing. This will trigger this. This will trigger this. It will go on. So to avoid that, we kind of designed a linker module. The linker module is basically graph representation of all the circuit links. This kind of runs in the background as a daemon thread and kind of propagates all the changes in the nodes to other nodes. It's basically about it. I'll show you the demo of these three till now. So you just import everything. And this is how an gate is simulated in Winpy. You can give n number of inputs to it. Again, you can use a connector. It's very similar to very log. You instantiate a gate rate. Then you give some inputs and you get the output. Just that in very log, we gave it output followed by the inputs. Here, we just used an output method. This is just the basic stuff. Then you can use the connector, like I said. The advantage of using a connector is... See, I just set the logic over here. Change the logic of one of the inputs and that propagates back to the output. That's pretty basic stuff. This is about bus. I just create a four connector bus. I create four connector instances and use it to instantiate a bus. As you can see here, I can do stuff like getLogicAll, which returns me the Boolean representation of all the contents of the string. This is basically what these connectors hold inside it. Winpy has an inbuilt digital to... It kind of maintains the 5v0v logic. One represents a high logic high, which is 5 volts and zero represents a ground of zero volts. You can configure it to point to some plus 32 or minus 32. We use it in serial communication stuff like that. If you want that kind of thing, you can do it in winpy.config file. This is an interesting feature of winpy. I mean bus module. You can concatenate two buses. You have two four port devices, output of two four port devices. You can concatenate those two to give another eight port bus. We can then copy from that bus, all that. One more thing is that you can iterate through a bus. You can iterate through a bus just like you can do it in a list. The advantage of iterating through a bus is that when you iterate through a bus, you can just change those values of connectors or perhaps you can update the label of connectors or you can even do kind of, you know, get the logic of connectors. If it is an analog bus, you can get the voltage and stuff like that. These are basic how the connection architecture of winpy works. I'll move on to real simulation, I mean IC simulation stuff like that later on. So far now you can basically... This index is an internal detail. This kind of stores an index for each and every connector. So each and every connector has a maintenance and index so that we can track it when there is a bug. We can know which connector connects to which digital structure and all that. Again, I use list comprehension to just, you know, join the previously set label into a neat thing like this. This is a bus. You can also create an analog bus. This is pretty standard stuff. And you can slice through buses. Bus D is an eight-port bus and I have just sliced through the bus just like I do in list slicing. Again, I'm just using equality comparison to just verify whether the logic of bus E and bus B are same. You can do circular rotation in buses. Circular rotation as in... Look at this. You can do this with buses using the left shift and right shift operators. Okay, about the linker module that I told it will run as a daemon ride. So now, assume this diagram is actually drawn with KKR. It actually contains a bug. Assume this is connected to this. Okay, assume this is connected to this. So basically we have a power supply rail which is VCC and ground. Again, have a control volt which is again a four-port analog device and slave one which is a four-port analog device. Slave zero is another four-port analog device. Control voltage basically drives slave one and slave zero. So assume this is zero, one, two, three. It's one, two, three, four. I just took it off some IC. So assume it is one, zero, one, two, three. And the higher two ports of the control V is connected to slave zero or one. And lower two ports of the control V is connected to the another slave device. So I basically create a bus for control voltage. How do we do that in bin price? You basically create a bus for that. You set the logic of all the voltages and you create two slave ports. And again, like I said, bus can be used to both contain analog as well as digital values. So again, I use these two slave ports as analog devices, four-port bus. And again, I just specify the links that I mentioned below. That's all I'm doing right here. I just specify those links that have to be connected between the buses, control voltages and stuff like that. And again, when I do this, as you can see, I'll get this. This internally updates all the propagates, the voltage changes in a node to all the linked nodes nearby. It maintains these links in a graph data structure. The graph data structure used is a NetworkX graph. How many of you know about NetworkX? Yeah, NetworkX is a great graphing library. And you could use it for any kind of traversals and stuff like that. So we use internally NetworkX graph to maintain the links. So when I make a change in the control voltage, see, I'm not doing anything else. I'm just making a change in the control voltage. You should be seeing an updation in the slave zero. Can you see this? 5, 6, it got changed here, right? Before it was this, it got changed to 5, 6. That's basically about the linker module. You can also unlink and just unlink slave zero, slave zero's middle two ports from the graph so that any updation to the control voltage does not propagate to the slave zero port. So if I do that, any change in the control voltage is not propagated to slave zero. It remains at 5, 0, though the input has changed to 3 and 2. But the slave one gets the update from that. Okay, that's pretty much about the linker module. Again, the VCC propagates because VCC is still connected. Okay, no digital logic simulation library will be complete without a module to handle bit level manipulation, right? You might have to set a flag of few registers. You might have to do some bit level manipulation for, say, implementing an algorithm, whatever. So we've got this bit string, excellent bit string library, which basically handles efficient conversion between integers, hex, stuff like that. And we use this bit string library and bit string dot bit array. That's a class. We wrap this class around some custom. We have some, a few custom differences. For example, we have a parameter known as signed. I'll explain you why we need that parameter. So we use that and we have made this bin pipe bits module, which can do bit level manipulations and we can, which can convert between different hex, binary, uint, int and all. Okay, so I'll just show you that. Okay, just initiate it with an integer value of phi. And the reason why I need a signed parameter in this bin pipe bits module is that when I store phi as binary, python store is at 101. Bin of phi is 101. When I do a bin of minus phi, python yields, I'll show you. I mean, you know that, right? Minus 101. So that is not how digital logic works. Digital logic, you have a signed bit at the front. That's how you have a, you maintain it as a two's complement value. So see this, you just say initially by default it is, it will be referred to as not signed. And again, when I do uint, it bit string library has a functionality of converting to like I said to uint, hex and all. When I do it to uint, I get phi. When I do it to a binary, this is 101. However, when I do it to an int, you get minus three. So there is an ambiguity whether that binary 101 represents minus three or five. So to just disambiguate that, I just store a parameter known as signed and I explicitly mentioned that it is not a signed value. So you could do this. You get five. So if it is signed, you get five. Otherwise you get minus three. The reason why this is done is that binary value, the preventing zeros in a binary value are being stripped off. So when you do that, you are left off with 101. So that one can be represented as just a signed bit or like any other regular bit. There's a basic stuff like I'm just converting it to hex, 1111 as signed. When it is signed, it represents minus one. Refer the documentation of bit string. Bit string is a really great library. You can refer the documentation of the bit string to discover some additional functionality that you could use it here also. This is pretty basic stuff. I'll just talk about multiplication. We got a very old module that was descended at the start of bin pi, the operations module. The operations module basically handles binary operations like addition, subtraction, basic stuff, multiplication that we can do it using bin pi two. The only thing that native Python cannot do, not without any additional two or three lines is that complementing, two's complement. Otherwise it has everything, what Python and basic stuff. So when we do a binary multiplication, this is a binary multiplication. Now when you give this binary multiplication to a student who has just learned multiplication, he will kind of do it this way, one into one, one into zero, one into one, one into one. So the time complexity of this one is order of n square because there are n into n multiplications totally. This is a really complex one and this is known as grade school multiplication. When you give this to a little bit higher grade students, say fifth class or sixth class, he intuitively reduces this to one, one, zero, one into one is going to be one, the same number and if it is going to be multiplied by zero, it's going to be just shifted. I need not add anything. The partial product can be just two shifts. That is exactly the algorithm used in Robertson's multiplication. Robertson's multiplication is used at a registry level and is a really famous algorithm. A slight improvement upon it is Booth's algorithm. Robertson's multiplication basically does the same thing that I told you before. Using a series of shift and add methods, it basically keeps a product register. In the product register, it initializes it to zero and when it has initialized it to zero, then based on the every single bit of the multiplier, it then basically adds or shifts it, basic stuff like just that we do it intuitively here. Booth's multiplication is a slightly interesting algorithm. The advantage of Booth's multiplication is that, see this one, see when you multiply five into seven, seven, seven, you don't do it that way, right? Our brain intuitively reduces it to eight thousand minus one into five. So that's exactly how Booth's multiplication algorithm works and how it does is that it, you know, series of ones or zero, a block of ones or zeros, it takes in a block of ones or zeros, it actually examines adjacent parts of ones or zeros and based on the values of those ones and zeros, it then does either add then subtract, there is a flow chart here to explain that. It does either add then shift or subtract then shift or simply shift based on the adjacent bit. There is a thing with Booth's algorithm. The worst case complexity will be same as Robertson's multiplication because the worst case complexity will be one, zero, one, zero, one, zero, alternating bits. There won't be any kind of something like you're multiplying seven, six, seven, six, seven, six. There is no way to simplify that. If it is seven, seven, seven, you could do eight thousand minus one, but if it is seven, six, seven, six, you could literally do nothing or if you have some fancy stuff, that's okay. Now we'll move on to Karatsuba's fast multiplication algorithm. Karatsuba's multiplication algorithms, high level algorithms use the compiler level abstraction. So Karatsuba's multiplication algorithm works by breaking two N-bit numbers, the X and Y. Let me explain it to you in terms of equation itself. So consider X, the higher order bits, higher order bits, the lower order bits. You represent X as a half N shifted, I mean N by two shifted higher order bits and the lower order bits. When you do X star Y, it's equivalent to multiplying the RHS of these equations. So when you do that, you expand it to get this. When I'm going to multiply this or I'm going to multiply this, there is no improvement in the time efficiency. There is no improvement in the time efficiency, there is no benefit, anything like that. But the basic optimization done in Karatsuba's algorithm is that I expand this one to again this. When I do this, you can easily see that you get these terms. These terms out here are already pre-computed. That is the micro-optimization done in Karatsuba's multiplication algorithm which reduces the time complexity of say any other algorithm. Karatsuba's multiplication algorithm is really important for the fact that it is used under the hood of Python for multiplying really, really large numbers. There are few other algorithms like 2k, k being commonly three and SSA algorithms. Well, we will not deal with that. It's just a little bit more micro-optimization done over Karatsuba's method. 2k breaks the n-bit number into k-sized bits and multiplies and does micro-optimizations like this. Again, I'll show you those algorithms that we haven't been by for that. So normally, we have two utility functions, two unsigned and two signed. Based on what you need, you can just convert it to 1111's minus one basic stuff. We have Booth's algorithm. Now you should be asking me a question, why do we need this? Because if I'm going to implement this in Python, this will be adding a lot of overheads. Every step will have an overhead. If I do a recursion, recursion is again inefficient in Python. When it is converted to compile to C, it is again not going to be very efficiently done compared to if I'm going to do it directly in C Python. So why basically these kind of algorithms are included in binpies that you can go to the source code? This is very much well-commented. So you can go to the source code, see how it is implemented. When you're taking up a digital course, it will be very much helpful for you to kind of learn these algorithms using the source code because you already know Python, assuming that you already know Python. You need not learn much harder language, Verilog. Those who know Verilog, sorry, Verilog is kind of really hard to begin with. Starting is really hard. There are some concurrent loops, blocking operations, non-blocking, stuff like that. You get really confused at the beginning. If you come up into the source code, you can check it out. Okay, and the binpy has some ICs, simulations, excuse me, ICs and simulations. Okay, we have some 7400 ICs, series ICs and 4000 series ICs. So like I said, there is no GUI, but you can do it in console. You can just set the pins to the digital values and get the output, simulated output of that. So creating an IC is as simple as just instantiating a class. You need not write further code. You can see the dock string of it. The dock string is well made and it contains what each pin represents, what each pin, what each bit must be given to pin, stuff like that. So it even has a small documentation on how to use it. There is a small drawIC function which kind of uses ASCII box-drawing characters to kind of draw this IC along with the pin configuration and stuff like that. This one works like this. Again, you can see the Z here. Z corresponds to the output. This is a 2-bit NAND gate. You have 00. There is no output because I have not simulated anything on it. Again, I set the pin configuration using a dictionary. The key values of the dictionary correspond to the pin numbers and the values correspond to the digital logic that will be asserted on those pins. I do that and I set the IC and then I just run the IC and you get the output. I am not just going over through every single method of pinpy. You can just go through the examples and documentation. I will just go through that later. Again, when you draw the IC again, you see that the simulation has been performed. 1 and 0 NAND of 1 and 0 is 1. Certain ICs have a pin tag over here. You can kind of get what exactly this pin represents over here. All these ICs do not have. How many of you know about IC 74181? It is a really cool IC. It is known as an arithmetic logic unit IC. It was a pretty famous IC before the introduction of microcontrollers and microprocessors because it efficiently does 4-bit operations based on these four select lines. Four select lines gives you around 16 operations. Those functions will be around here. This is from Google Images. Is it clear? For every single configuration of select line, you have a different function performed over the 4-bit inputs A and B. We will just see how we can do that. It is pretty simple. Just create an instance of the ALU. Draw the ALU. It will be a pretty long one. Do not fit the screen. Again, I just set A bus and B bus as the inputs, four inputs, and I connect the power rails. Then I do the A dot set logic 1, 0, 0, 0. B, I set it to 0, 0, 0, 1. Select line, I give it a reversed form because a list starts from 0. This would be 0 here, 0, 1, 2. I want this to be the third bit. I mean 0, 1, 2, 3rd bit. I just reverse it and give. I set the IC. I run it. Let us check the output. The output is F0, F1, F2, F3, which is 9, 10, 11 and 13. 9, 10. What happened? Oh, sorry. This is the first diagram. 9, 10, 11 and 13. This gives you 1, 0, 0, 1. 1, 0, 0, 1 is basically orbit-wise R of A, which is 1, 0, 0, 0 and 0, 0, 0, 1. How do I select that R using the select lines? It is given here. Where is the Google images thing? Can you see it? 1, 1, 1, 0. Select line given as 1, 1, 1, 0 corresponds to an orbit-wise R. It is not clear there, but take my word for it. That is how we do IC simulations. There are pretty much a lot of ICs like carry look ahead adder and stuff like that. Carry look ahead adder. You must have come across. It is an efficient way to do that. Then we have this multiplexer and demultiplexer. I mean, these are sequentials. Digital structures in WinPy, we have three. Basically, combinational circuits, sequential circuits and tools like multivibrators and oscilloscope. I will show you an ASCII-based oscilloscope. First, we will deal with demultiplexer, pretty basic stuff. You have this block. You simulate it. Full adder. That is pretty much the same. Needs no explanation. So multiplexer is same like that. Again, I simulate sequential circuits. Sequential circuits, you know about JK flip-flop. JK flip-flop, based on the inputs j and k, for every negative clock thing, every negative edge of the clock, it produces the output based on the j and k. If j and k is 0, 0, no changes in the output. 0, 1, which means a reset operation. 1, 0, which means a set operation. Again, 1, 1 is toggle. Let us just use the ASCII oscilloscope of WinPy. Use the clock module to connect the clock to the JK flip-flop. This is basically giving one pulse. Again, I am iterating through all the possible values for j and k. For every j and k, I mean in 0, 0, 0, 1, or 1, 0 like that. If I do this, what is the wrong move? I think the switch is not displaying perfectly. It is supposed to display clearly. Wait a second. Where did it go wrong? Siloscope, stato. It is supposed to display correctly. I will show you an output over here. The ASCII oscilloscope works something like this. It is screwed up everywhere. Anyway, I will show you this later on. We have this counters. Sequential circuits are an important part of the sequential circuits. N-bit down counter. This actually prints well in the console. The IPATEN screen is actually small, so I am not able to correctly do that. However, I will show you the counters. The oscilloscope should look fine. Check this out. These are some inputs. I basically start a counter like this. Then I specify the input. The oscilloscope is vertically scalable. You can connect n number of inputs to it. Again, you have this tag. Again, you have the connector that is connected to the oscilloscope. Again, you just start it just like that. You will see how this works. It is screwed everywhere. I will show it in a second. I will just show you a multivibrator with the oscilloscope. I will see if that one works. We have a few analog things like I said. At least this one should work. Notice not defined. Everything is screwed up. Sorry for this. Just go check the docs. It should be fine in that oscilloscope. I will just figure out what went wrong over here. This is really screwed up. The size of the screen is less. Wait a second. It should work fine now. This one when ASCII oscilloscope works. The size of the screen is even smaller compared to my notebook. This should work here. Fine also. I will explain the JK flip top ones. I will set it to ET. Wait a second. We have some other three analog modules are there and been by. One is an analog buffer, analog converter, and analog signal generator. Like I said in the end, I will just use two signal generators to generate amplitude modulated wave. Before that, we will just check if this one is done. This is how the simulation works. It is clear over there. For every negative clock pulse, see J is 0, K is 0. You get the output. No change in the output for a negative edge of the clock. Again, when J is 1, K is 0. You get the setting effect. It sets the output to 1 and out bar is set to 0. Again, when J is... It should show J is 0. This size is reduced again. If I have J1 and K1, it toggles the output. That is basically about simulating and JK flip top. And you have this multivibrator. We have three modes of the multivibrator. The three modes of the multivibrator are mono stable. You know about that, right? Mono stable, A stable, and bi stable mode. You can operate the multivibrator module and either of that. Multivibrator, clock, buffers, and signal generator. All of these are concurrent devices. I mean like they run as a multithreaded way. And again, I have this analog buffer. Basically, you can attenuate a block. You can run it concurrently with basic stuff. Again, I will show you about analog converters. Analog converters have a few modes in both A2D and D2A. Where in A2D, you have the successive approximation technique of conversion, right? You can go through the source. You can see that it is done using successive approximation technique. And we have two other modes, interesting modes. IEEE 754 format. IEEE 754 format is basically single position or double position based on the number of bits, like 32 or 64. Based on that, you can see how those kind of conversions take place. Can just go through that. So, basically what I did here was I just converted 3.2 to digital and again converted it back to analog. So, the advantage of this analog to digital and digital to analog block is that it is run concurrently. And again, this can be used to model digital circuits accurately. Like you said at the start, this is a digital simulation library. We are not an analog simulation library. So, again, what is the use of analog here? Analog can be used to model digital more accurately using delays and stuff like that. Finally, I will just end with analog signal generator. We have a signal generator module. This one is for the math plot plotting of this signal. This is pretty much simple. I am creating two signal generators. One for message M of t and C of t for the carrier. I am just using a very low frequency of 100 hertz and 10 hertz. And I am just using the modulation input as the M of t. You have seen a lab signal generator, right? It works pretty much the same way. So, you set the modulation type to 1, which is AM. FM is not fully constructed as of now. So, you could get FM later on. Now, I just do this. There are some glitches, like I told you. When you run it in a console, it would be much more cleaner. This is an amplitude modulated signal of 10 hertz over a carrier of 100 hertz. That is basically about it. We have three expression or Boolean logic modules over here. One is for a truthable generation. I thought I could show the K-map. We were not able to complete it before PyCon. We have an application of coin makuloski method. Coin makuloski is a great logic minimization method. It taught to most students after K-map. When you learn about K-map, you eventually learn about coin makuloski method too. So, check this out. You have a make Boolean function. You can just check out from that GitHub repo, right? Then again, you have this truthable generation thing. Truthable generation thing where you can generate the truth table of an expression. You can do this. You can parse the expression. You can do some, you know, convert it to the gate form. You can evaluate or, you know, you can do that to convert this to a binpy construct. Again, we have one more thing called, which is an expression convert module, which basically handles conversions of the type of, if you want, say, a NAND only logic or NOR only logic, you can do that. Check this out. You have an NOR only logic like that. These are pretty much what binpy can do. So, that's it. Any questions? Yeah. Excuse me, Mike. Yeah. About these circuits you created, if you simulated some, can you generate a VHDL file so that it can be run on an FPG or something? Yeah. Like I told, we are inspired heavily by MyHDL and PyEDA. MyHDL is a great library, which kind of uses VHDL, you know, kind of structure, which has class decorators and stuff like that. We could eventually, the work is in progress. We could eventually integrate MyHDL into binpy and use it. MyHDL does that pretty well. So, you can then, in the future, you can maybe run this code. Yeah. Yeah. We can do that. We can just integrate MyHDL module. If we do that, we can very well integrate it with the PGA or any other, can print out the HDL, Netlist and stuff like that. So, once it gets integrated, can you go for back compatibility? Like if there are some codes running on HDL or Verilog, you can just go back those codes and do your Python code. It will be a two-way conversion from Verilog or two Verilog. You can do that. Thanks. Any other questions? Nothing? Yeah? Can you connect two things? Yeah, we can do that. That's why the connector module is there. And if you want to automatically connect without any kind of triggering, if you have a feedback loop, you can use the linker module, which handles any kind of feedback. It doesn't care about feedback. It just handles it. It propagates all the changes. No. Right now, that functionality is not built in. We are trying to build it. So, any other questions? Okay. So, our repository is hosted at GitHub. GitHub slash bin pi slash bin pi with BNP capitals. Feel free to contribute if you like. I mean, like any feature would be great. There's a few months old. So, we have not many features in bin pi. So, you could just contribute it and make it a better library. Thanks. Excuse me. There are a few announcements. We have got this ID. It belongs to Jayant Pauja. And if you are here, you can collect it from this front row. If you're a friend of him, you could inform him. And we have open spaces going on in Audi 3. If you're interested, you can go and attend it. We will be having next session in 10 minutes, I guess. Hello. Yeah. I think it's working. Hello. Hello. Yeah. Okay. Next talk will be given by Aditya on building high scalable web services with Given. And he's a software developer at Plevo. He works on scaling and infrastructure management. So, sir, please.