 So, today we will discuss issues in scaling gate oxide. Now, first we will address S I O 2 scaling will see that you know silicon oxide has been fairly good insulator on silicon probably the best insulator semiconducting combination that one can find in the nature. But we see that there are now issues in using silicon oxide in transistor structure right. We will take a look at that you know we will also talk about the reliability issues of gate oxide. In particular we will look at two concepts one what we call f n tunneling that is to say if you start applying higher and higher voltages on silicon oxide that is start increasing the electric field at some point you will start conducting through the silicon oxide. And that phenomenon is called f n tunneling which is essentially an abbreviation called Fowler Nordheim tunneling. So, we will look at that and we will also study what is meant by T D D B which stands for time dependent dielectric breakdown. So, then let us get started with you know understanding the silicon oxide and you know what issues are we talking about here and you know when we look at silicon and silicon oxide this Si O 2 we say is thermally grown. What it means essentially is that you know you subject the silicon wafer expose the silicon wafer to high temperature such as you know greater than let us say 900 degree centigrade and expose it to oxygen ambient. And this would result in conversion of silicon into silicon oxide you know that is what we call growth of silicon oxide as opposed to depositing something on top of silicon oxide right we actually convert silicon into silicon oxide. As you could well imagine at this interface there is a transition what we have in silicon is that we have a nice covalent bond structure it is a crystalline semiconductor as you know and silicon oxide is an amorphous material and essentially you know what you have in silicon oxide is essentially silicon bonding to oxygen right. So, you know you have Si is essentially bonded to oxygen and this will essentially continue on right in other words you know this there will be another O and silicon and O and silicon and so on and so forth right. So, that is what you have in other words an oxygen atom is shared between two silicon atom right. So, that satisfies the valence and hence a silicon atom is bonded with 4 half oxygen atoms which is essentially Si O 2 you see, but this is not crystalline you know this is really you know very regular right it would not be looking like that. But the point is that every silicon oxygen atom will bond to an oxygen atom and this is how you have a structure in silicon oxide in bulk silicon oxide that is that is when I start growing oxide on top of silicon as I go deeper and deeper up thickness is increasing essentially you see a very ideal silicon oxide structure where you know silicon is bonded to oxygen which is in turn bonded to silicon and you have this mesh. But at this interface you see you have a transition right you are transitioning from one material to another material right and this is what is extremely crucial in the context of field effect transistor. And the issue at this interface is that you know you have two important aspect here one is what is called interface traps and the other one is what is called oxide charges. Sometimes they are also called fixed oxide charges you know they are sort of denoted as Q F to say this some charge which is fixed it does not change and you have what is called interface traps and typically the inter when I say Q F the typical unit that we are talking is you know coulomb per centimeter square you know mostly we talk of per unit area. And we also sometimes refer to the number of traps fixed traps in the oxide which is essentially number per centimeter square and when you have multiply this with Q you get Q F that is essentially transition from number to the charge. Now similarly you have interface traps interface traps are typically denoted as the interface trap charge is denoted as Q I T the traps themselves are denoted as N I T which is exactly at this interface whereas these oxide charges are little bit away from the interface right this is where you will find Q F and this is where you will find Q I T Q I T is exactly at the interface and that is the distinction essentially. And as you start going away then the oxide is fairly ideal you know there are no charges in an insulator you know all that is fine. And Q I T as opposed to fixed charge can be either negative positive right and that depends on whether you are populating holes in the channel or electrons in the channel whereas Q F is always fixed it does not change and in a silicon oxide system which is charge inside the silicon oxide Q F is always positive. And it is conjunctured that Q F arises at this interface because when you go little away from interface because you still do not have a regular oxide structure in other words more importantly it is conjunctured that you have a mix missing oxygen atom in that region. So, this is also called oxygen vacancy because this is transitioning from silicon to silicon oxide. So, it is not quite S I O 2 it is S I O X where that X is less than 2 right in some places you have missing oxygen. And it turns out such a defect what it does is that it loses an electron right because now there is no oxygen there is one electron here and one electron here it loses one electron out and it gets positively charged. And this is what is supposed to give rise to all the positive charge that we see in silicon oxide at very close to this interface. And this is fixed because this is little bit away from the interface what you do in the channel has no bearing on changing this because you cannot have this carriers go in and change it state that is why it is called fixed. On the other hand at the interface what happens interface state is presumed because at the interface let us say there is a silicon atom sitting here. This silicon atom is bonding to a silicon atom here a silicon atom here as is shown a silicon atom inside down here, but there is a missing silicon here. And in fact this is what we call dangling bond if the silicon were to continue up you will have another silicon atom sitting there. And you know it is a perfect covalent bonding mechanism, but here you know you will have lot of these missing silicon atoms exactly at the interface where the silicon is sitting at this interface, but it has failed to find another silicon atom here because it is oxygen rich it is silicon oxide right. And hence that gives rise to interface state this interface traps and oxide charges they can make or break your device. If you have very large amount of interface traps and oxide charge there is no way you can build a field effect transistor. This is the precise reason why even though we had known about field effect transistor theory way back in 1930's a field effect transistor on silicon was only formed in 1960's because it was very difficult to create an oxide which has very low fixed charge very low interface state charge the technology was not mature at that time. That is why the first semiconductor transistor was a bipolar junction transistor right it was 1947, but then as the technology progress we came up with lot of techniques to make sure that the oxide which is grown on top of silicon is very high quality oxide which has as low missing oxygen as possible. So, very low oxide charge and as few dangling bonds as possible hence very few interface states. Today you know in fact in the state of the art CMOS technology the numbers that we talk about for NIT is less than 10 power 10 per centimeter square and similarly for NF number per centimeter square is again less than 10 to the 10 per centimeter square. You see this number does not make much sense unless you put this in a perspective what is that perspective let us recall that the silicon atomic density right it is about 5 into 10 power 22 per centimeter cube that is per centimeter cube of silicon you take start counting the atoms you will count so many atoms right that is the atomic density of silicon. Now just a zeroth order calculation for you if this is my silicon silicon if it were infinite in all dimensions then everywhere you go you have this atomic density volume density, but when I cut silicon when I make a silicon wafer at the surface you see this is a silicon surface this is where I am going to grow oxide build devices here we do not talk of volume density here instead we talk of a real density correct because now it is a plane because there is nothing else on top of it to talk of volume density. So, just a zeroth order way of getting the aerial density from a volume density is essentially take this number 5 into 10 to the 22 two-thirds of it is your aerial density you can go back and think about how it is two-thirds, but you know take it for granted from you know it is a 2 d we are looking at instead of 3 d and hence it is two-thirds of that number. So, if you do this math what you get is 5 this is now per centimeter square correct. So, this is approximately 10 to the 15 per centimeter square now you put things in perspective what is it telling you if you had this silicon surface which is a silicon wafer at the surface you will have so many silicon atoms and obviously you will have so many traps because all these have dangling bonds because they are failed to get a silicon on top. So, this is your surface trap density and you could bring this 5 into 10 to the 15 to 10 power 10 per centimeter square that is 5 orders of magnitude decrease is possible because we put silicon oxide on top of silicon that is why even though it is not silicon on top of that surface we say silicon oxide is an excellent passivation layer what it means is that when I grow silicon oxide the silicon oxide silicon chemistry the interface chemistry if you will is so nice that silicon oxide can saturate so many dangling bonds and really bring down the volume I mean the surface trap density by at least 5 orders of magnitude in today's devices. So, that is the kind of you know achievement that we have, but this is just simply not possible if you look at other semiconductors like gallium arsenide you put an insulator on gallium arsenide you will struggle to get anywhere close to 10 power 10 it could be 10 power 12 10 power 13 you know depending on what kind of insulator you have same with germanium oxide if you want to use germanium for making field effect transistor right. And the worst thing about germanium oxide is germanium oxide is water soluble let alone be strong in resisting various chemicals that we use during semiconductor processing after growing germanium oxide even if you wash your germanium vapor it just dissolves germanium oxide right. The key then for a insulator in FET structure FET insulator that is gate insulator is that it should withstand first of all harsh processing because after putting oxide as we have already seen in a CMOS flow we have so many processes it should withstand all those process conditions and give very good interface property and this can be done with silicon silicon oxide. And it is just impossible to do it with any other you know means and that is why and again you know we take lot of care in really achieving that right for example silicon wafer has to be cleaned it has to be cleaned using various chemicals we have now a cleaning procedure called RCA cleaning it is a very well established chemical cleaning procedure where in silicon wafer is put in acidic and alkaline solutions to get rid of all kinds of contaminants metal contaminants organic contaminants and so on and so forth right cleaning is extremely important. And then oxidation at high temperature in is important you know during oxidation you need to really have a very clean ambient you need to have a very high quality quartz furnace in which you can actually do this oxidation. So, oxidation at high temperature and in clean condition and then of course you know you have to immediately put the gate electrode and then we have also figured out immediately after oxidation it also ways helps if you also anneal it in inert ambient like nitrogen you know if you anneal it at high temperature it improves the quality of the interface. And then once you make all your MOS capacitor put the gate we also do what is called forming gas anneal forming gas is essentially a mixture of nitrogen plus hydrogen about 90 percent hydrogen and 10 percent hydrogen and 10 percent hydrogen. The idea here is that you know you have these dangling bonds most of them are passivated by oxygen of silicon oxide, but there still could be some remnant dangling bonds if you expose it to this kind of an ambient hydrogen is a very light material and very reactive material it can actually come in diffusion and if there are any dangling bonds which look like this hydrogen can come and terminate that. And that is the idea of you know doing this forming gas anneal way back in 60s or even before that we did not know all these tricks it took a while to really come up with all these process development technology development and today we have very standard recipes you use this recipes you are guaranteed to get oxide charges less than 10 power 10 per centimeter square. If you have those kind of charges you will have very little effect on threshold voltage your threshold voltage will not deviate from what ideal theory would predict. Otherwise these oxide charges themselves will influence your threshold voltage very drastically. So, this is why we started using silicon oxide, silicon oxide, but a lot of things have happened in silicon oxide you know in terms of our very early MOSFET way back in 1960s which were still large channel MOSFET like 10 micron 20 micron kind of MOSFET. They used to operate at 10 volt and their typical gate oxide thickness of the order of 100 nanometer. And today we talk of 1 volt supply voltage but oxide thicknesses of the order of 1 nanometer. You see something interesting here this is exactly what I had said in the context of scaling theory also constant electric scaling field theory says you keep electric field constant, but if you see the history electric fields have increased over generations and that is very evident voltage has decreased by 10 x whereas thickness of the oxide has decreased by 100 x. If you have to say the electric field is approximately V G by T ox which is V G here 10 volt. You do 10 volt by 100 nanometer you get an electric field which we typically represent in mega volt per centimeter 1 mega volt per centimeter that is the electric field. And today if you talk of 1 volt across 1 nanometer the electric fields are 10 times large 10 mega volt per centimeter. This is precisely the reason for you know concerns today on silicon oxide. And of course the breakdown strength of good quality silicon oxide breakdown strength meaning at this voltage instantaneously it will breakdown you know is of the order of 18 mega volt per centimeter this is still much higher than 10 mega volt per centimeter. But as we will see little later there is a phenomenon called time dependent dielectric breakdown under which even if you have lower electric field below the breakdown so called breakdown strength. You can still have an oxide breakdown over long time that is why it is called time dependent breakdown not instantaneously whereas 18 mega volt instantaneously you have a breakdown we will talk about that in a while. So you see first of all you know in terms of computing electric field across the oxide this is an approximate expression you see really the electric field should be given by as you can very well understand V G minus V F B remember V F B is like a built in voltage there is already that built in voltage due to the fact that the gate work function and substrate work function are not necessarily the same that gives rise to this built in potential which we call here V F B minus V silicon what is V silicon it is essentially psi s the band bending because remember I have already talked about this simple model that is you have C ox C silicon and you apply V G this V G drop across C ox which is called V ox and drops across silicon which is called V silicon. So in a series circuit as you can see total V G is equal to V ox plus V silicon. So your electric field across the oxide is V ox by T ox. So your V ox in turn is V G minus V silicon by T ox but because there is this built in potential as I was telling you there is a V F B term also. So this is the exact expression that you should always use whenever you are asked to compute the electric field. So the key here is that it turns out this electric field is very important as you start increasing the electric field something interesting starts happening in fact you can start seeing significant current through the oxide. Oxide is supposed to be an insulator which is true when you have low electric field but at high electric field just as you have a lightning and air is a insulator supposed to be but you can have the current passing through this medium which is supposedly insulator because you have a very high field generator. And so is the case with silicon oxide also under low field electric condition it is indeed an insulator but beyond certain electric field it can start conducting. And let us look at that particular aspect and understand how does silicon oxide conduct. Let us take for instance case where you know I have it is true whether it is n type or p type. So let us take any one of these conditions let us take n type and I have this SiO 2 and I have gate electrode. It could be let us say poly silicon n plus or p plus if it is a p channel transistor that you are going to build you will put a p plus silicon or you could also have a metal gate it does not matter some conductor is there on the gate. Now let us look at this system and let us consider a case when I apply a positive voltage I mean just for simplicity let us say I just take a metal electrode put aluminum electrode it does not matter what electrode is just let us take that condition. So what happens when you start applying positive voltage as you can see here positive voltage will start accumulating the more and more electrons here correct that is the accumulation condition a negative voltage will drive away electron and it will create a inversion condition. Let us now consider a positive V G condition. So if you look at the band diagram under this condition what you will see is the following. You have an insulator this is a SiO 2 and this is your gate. This is the gate that is aluminum gate and this is your SiO 2 and here this is n type it is accumulating here more electrons at the surface because I have applied positive voltage and accordingly the Fermi level on the gate is lower than the Fermi level on the substrate that is indicative of that this voltage is positive with respect to this voltage. So the band bending will essentially look like this correct there are lot of electrons here in the channel which is here as you can see but these electrons cannot go in because oxide as you know is an insulator what does it mean there is a huge barrier here which we have computed earlier which is greater than 3 electron volt that is a large barrier. So oxide you know this carriers will not tunnel through and hence you have zero current. Let us now consider a case when V G starts increasing more and more positive. What happens when you start applying more and more positive voltage essentially what you have is that you know these two Fermi levels start separating that is the difference between this Fermi level and this Fermi level is the applied voltage and larger voltage will also set up larger electric field which is not difficult to understand and if you recall our discussion may be in the first or second lecture electric field is always related to gradient in band diagram remember this and more precisely 1 over q d e by d x. So what does it mean what is the gradient in band diagram this is a gradient in band diagram correct d e by d x. If I go to larger voltage larger electric field should set up in other words my band bending now will look like this this is a condition for larger electric field what will happen now is correct this is how the band diagram will look this is the difference between this point and this point which is same as this this is the difference between this point and this point which is same as this what has happened in the process is I have separated this Fermi level from this Fermi level by larger voltage and there is a larger gradient this is d e by d x which is your electric field more electric field increase it further you will have even more electric field something like this now there is something very interesting happening if you can see here earlier these electrons had to surmount this barrier to come into the oxide to conduct current. Now if you continue to increase this further and further let us say you have this kind of a situation very large electric field now you see something interesting here there is an electron sitting here and it sees an allowed energy state here which is separated by an extremely small distance what is this distance that distance is governed by electric field larger the electric field I have more very severe band bending and smaller is this distance and when this distance comes to of the order of nanometers then you can have large tunneling current electrons need not go over the barrier electrons can easily tunnel through this so called triangular barrier. So, if you increase it further electric field this distance decreases tunneling distance increases it turns out the tunneling current is an exponential function of a tunneling distance if you decrease the tunneling distance by a small amount this will be an exponential increase in tunneling current then you will see that your tunneling current starts going up exponentially with applied electric field or applied voltage and this is exactly what is called f n tunneling for example, when will this tunneling distance be 1 nanometer just to tell you this which is not very hard to understand right you know this let say if this barrier is 3 volt 3 electron volt then you should have an electric field which is 3 volt per nanometer if you have an electric field which is 3 volt per nanometer you will reach this point which is in line with this point over a distance of 1 nanometer. So, those are the kinds of field that we are talking about that is when the tunneling will start right typically it turns out you will start tunneling even before you reach 1 nanometer 4 nanometer 5 nanometer you know you easily will start seeing significant tunneling current and we typically say that if the electric field are more than you know of the order of 5 to 6 mega volt per centimeter then you will certainly start seeing you know significant tunneling current. So, what is this electric field this is 6 into 10 to the 6 mega right m here and centimeter which is how many nanometer right 10 to the 7 right 10 to the 9 nanometer is a meter and 10 to the 7 is essentially you know this. So, in fact, you can see here that right it is essentially 6 by 10 which is 0.6 volt per nanometer right. So, even when you reach 0.6 volt per nanometer what is 0.6 volt per nanometer for 3 volt barrier to be aligned here you have a tunneling distance of 5 nanometer you see 0.6 times 5. So, typically when you are tunneling distance is of the order of 5 nanometer you will start seeing tunneling current. So, this 6 mega volt per centimeter really corresponds to 0.6 volt per nanometer which approximately corresponds to a tunneling distance of 5 nanometer tunneling distance approximately and this is what you see if you were to look at current density j as a function of electric field e initially your current is very very very small. But, once you start reaching the fields that I was talking about 6 mega volt kind of field you know you see that current starts increasing this being a log scale you see this is a linear line meaning it is an exponential increase with respect to increasing electric field. And in fact, when you reach 10 mega volt per centimeter this is e in a 10 mega volt per centimeter your typical tunneling current density in silicon oxide silicon system are of the order of 100 ampere per centimeter square that is the kind of current density that we will see. The 100 ampere per centimeter square number may look huge, but you need to put things in perspective let us say if you have a you know 1 micron square area for your transistor or a gate area is 1 micron square then you can see that what current you will have. Now, you are 100 ampere per centimeter square and you are talking of 1 micron square. So, this is 100 into 10 to the minus 8 correct and you know that is the kind of current that you will see which is about a micro ampere current, but that micro ampere current is now significant in the context of the transistors that we are talking about. And if you continue this further it continues to increase and if this is really very large you know what is that large of the order of 18 mega volt per centimeter. Again this number may vary depending on how good is your oxide have you done an excellent quality oxide or it is little bit inferior it may be little better than 18 or little less than 18, but that is a approximate range. At this point you see a huge current you know as soon as I go to that voltage I will instantaneously have a very large current it will result in thermal runaway and even metal can melt and it will cause a permanent short in the device. So, that will be a destructive breakdown, but even before this destructive breakdown this is really destructive even before that you can still have reasonable current flowing through the oxide. It is no longer an insulator in this electric field regime that is the main message that I wanted to you know convey to you right. Oxide can conduct if you have sufficiently large electric field and that is because of this tunneling process. And in fact it is called Fowl-Nordheim tunneling because they were the first to really you know sort of give the theory for such tunneling. And in fact you can reasonably calculate this tunneling current reasonably well using this expression which is called Fowl-Nordheim expression. This is E is electric field here and you have this exponential of various quantity let me just write it down for you this is M ox which is a effective mass of electrons in oxide. And where your A is essentially an F N constant which is again given by this expression 8 pi h phi b. Here E is this electric field that we are talking about. You see this exponential dependence on electric field and this is negative because which essentially means that as you increase E the current here increases this is in denominator you see. And E is electric field which is obvious Q is charge and H is Planck's constant and what else do we have M ox is what is called effective electron mass in oxide which is lower than its free mass free electron mass. And phi b is important quantity and that is called barrier height this phi b is barrier height. And what is that barrier height at that barrier height is essentially this that we are talking about this is phi b. Larger the barrier lower will be the current that is not again hard to understand because there is a huge barrier for the carriers to conduct. Smaller the barrier higher is the tunneling current again it is an exponential function of barrier height. Similarly, given a barrier height for example, silicon oxide system barrier height is fixed then you start changing electric field again it is an exponential function of electric field. So, using this expression you can very well compute the tunneling current density. And now let us look at you know the other important the important point again I want to stress is that the oxide current through the oxide is essentially dependent on the field across the oxide. And the barrier height whether injection is from here to here or here to here if the same barrier height exists and same electric field is there the currents will be similar. In other words they are independent of from which side the current is coming into the oxide. But what is crucial is the barrier height and electric field in this context it may be useful to sort of mention here the difference between n channel and p channel transistors. Remember n channel transistors have p type substrate and n plus poly silicon and they are mostly operated with positive gate voltage. That is we are interested in this kind of a tunneling. We have a positive voltage when you invert this transistor with the positive voltage there are lot of electrons and these electrons can actually tunnel through. So, the barrier height here for electrons tunneling is what is important. Now if you look at a p channel transistor you see this is p plus poly silicon and it is operated with negative gate voltage. When you apply negative gate voltage I also create lot of holes here. I also create lot of electrons here and these electrons tunnel. Now you can have two possibilities. One is tunneling of electrons from p side if you are only talking of electrons tunneling. Because this is negative electrons have to go in this direction. But turns out this may not be very significant for two reasons. First of all it is p plus semiconductor. So, availability of electrons itself may be less. But more importantly the barrier height now when we talk of barrier height you know it is the electrons sitting here these have to tunnel into the oxide. This is a huge barrier height now because not electrons sitting in the conduction band we are talking of electrons sitting in the p plus layer. So, that is why this electron current is less and there can be hole current. But again the barrier for hole injection is larger if you recall our discussion when we sketch the band diagram of oxide silicon. I told you that the band offset for electrons is of the order 3 electron volt. Whereas for holes it is of the order of 4 electrons volt at the bottom. So, as an effect the leakage tunneling leakage current in p mass could be less than tunneling leakage current in n mass. So, that is J leakage due to tunneling remember we are not talking of sub threshold leakage we are talking of tunneling leakage is essentially for p mass typically is less than n mass that is because of these considerations. So, at least this is one region where p mass would help you a little bit it would not conduct so much leakage current through the gate oxide. Now let us talk about this issue of time dependent dielectric breaker. We said that if your electric field is greater than 18 mega volt per centimeter there is instantaneous breakdown. But let us say that e is less than 18 mega volt we do know that even when e is less than 18 mega volt per centimeter there can be conduction. As soon as I go more than 5 6 mega volt per centimeter we said that there is a follow not I am tunneling current because tunneling distance has come down to 5 nanometer of that order correct. So, in other words if you look at the band diagram of the oxide what you will see is you know again let me just consider the case where you have n type on the silicon and I have applied you know positive voltage on the gate and as I have already told you this band bending will essentially you know increase and will result something like this correct eventually this right. Now it is less than 18 mega volt but still there is tunneling because this distance is less than 5 nanometer of the order of 5 nanometer now. So, what happens really now is that these electrons come into the oxide conduction band there is large electric field they get accelerated because of the electric field you know it means that their energy increases but they can essentially collide with silicon atoms and they can they can lose their energy and they can go through a series of these processes and eventually they are collected at the anode from cathode they are coming and collected at the anode and that constitutes a current for you. But what can happen is that these electrons which have high energy when they impact with silicon oxygen SiO 2 silicon oxygen bond they can actually break the bonds. In other words these high energy electrons in SiO 2 can break SiO bond SiO bond has certain strength if the electron energy is more than that strength and it collides with that it can break SiO bond and in other words it will start creating defect in SiO 2 correct SiO 2 which was ideal now start seeing lot of defects and in fact we also call this over time these defect starts increasing and this is also referred to as in literature oxide wear out you know just like any mechanical device wears out over long usage you know this oxide over long usage is wearing out you know slowly the bonds are breaking in the oxide and you know what happens because of that is that you know once you start breaking the bonds these are defect sites you know they do not necessarily are like insulating materials you can model that as you know there is some defect here and you know this defect is propagating something like this depending on how the bonds are getting broken and this is what is called a percolation path eventually you know what happens is that this along this path there is more and more electric field there is some kind of a positive feedback more carriers can go in and eventually you can reach a breakdown condition you will have a path a defective path from anode to cathode which is not really an insulating path in other words if you look at the top view of the silicon oxide this is the silicon oxide that I have and this is the silicon material I have right this is the gate silicon oxide and silicon right. So, there is this electrons going and you know they are going of course in all direction but anywhere here a weak spot starts wearing out and eventually in that spot you know there could be a defective path from the gate to the substrate or anode to the cathode and hence you have a destructive breakdown under that condition. So, what it means is that although I had very low electric field which is much lower than the breakdown strength over the time because of the oxide wear out oxide will break down in other words if you actually look at as a function of time current gate current or oxide current you will essentially have some current which is small current as dictated by Fowler-Nordheim tunneling theory given an electric field there is a current you know this current continues like this but over some time you know you will see an effect something like this you can see a huge current flowing in and this is what we call time to breakdown d B D. So, even though I am operating the transistor at a normal operating condition which is much lower than 18 mega volt per centimeter one volt across one nanometer is 10 mega volt per centimeter approximately because you need to do V G minus V F B minus V silicon by T ox but it will be very close to 10 mega volt per centimeter. So, even at 10 mega volt per centimeter which is the normal operating condition of the transistors to in today's chips with silicon oxide as a gate dielectric over time it will break down if you apply larger electric field this will break down even earlier if you have a lower electric field this will break down much later. So, this is why it is important to characterize the so called oxide reliability oxide is insulator it is a good material but over time it breaks down does it break down in 1 year 10 year you cannot of course wait for 10 years to figure out when does it break down right because even before you ship the products in the market you need to make an assessment of the breakdown of the oxide breakdown time of the oxide in other words it is called a reliability prediction. So, the way the reliability prediction is done in all these devices is through what is called accelerated testing. So, what it means is the following right let say I am looking at V across the oxide or V G what that you apply on the gate as a function of life time let me call it as tau L which is a life time of the device and this is really going to operate at let us say 1 volt that is the condition for let us say 65 nanometer or 45 nanometer CMOS technology but for this 1 volt it may survive for 10 years but I cannot wait for 10 years before I ship the product in the market. So, what I do in the fab once I make my device is intentionally apply large electric field much larger electric field than the device will ever see in the field. So, instead of 1 volt I may apply 5 volt let say when you do this this is what I mean by accelerated testing the breakdown breakdown times come down very drastically which is manageable you can do the measurement in the lab you do not wait for 10 years for that. So, you figure out what is the breakdown time may be do it for a few different voltages do it for 6 volt 5 volt and 4 volt and so on and so forth. And based on that you do what is called an extrapolation for used condition in other words what you have really done this is the real test at high fields in other words I accelerate the deterioration and get the trend of it is life time dependence as a function of different voltages which are very high. And I assume that the same phenomenon is valid even at low voltage the wear out phenomenon and try to do an extrapolation and say look if you are going to use this device in the field now this device is going to survive for 10 years or whatever you know you get some life time and this is what is called life time prediction. So, I do the test for a month or so because you know I may engineer this voltage such that you know the whole data should come to me in a month this life time may be month this may be 2 weeks a week or whatever it is right. So, based on that I can now do this extrapolation and this is how this life time prediction engineering is done in foundries. This is an important exercise and the point again to summarize is that even the oxide has an 18 mega volt instantaneous breakdown field it breaks on instantaneously at lower breakdown field which is an operating voltage condition it will still breakdown over a long time and what is that time is to be estimated using this time dependent electric breakdown measurement. And there are various techniques that are used to enhance the reliability of silicon oxide you know silicon oxide reliability is typically very thin silicon oxide also are annealed in either ammonia or nitrous oxide this is actually called nitridation it is not quite silicon nitride, but you first create a silicon oxide matrix if you anneal it in nitrogen nitrogen is very inert you cannot really react nitrogen with silicon, but ammonia or N 2 O if you expose the silicon oxide after oxidation process then some of the S I O bonds can be replaced with S I N bonds and that is why it is called nitridation. And it turns out silicon nitrogen bonds are much stronger than silicon oxygen bonds and hence they can sustain larger electric field. And the other there is also other model that is used to explain the enhancement of the breakdown field and that is essentially when you grow silicon oxide on silicon silicon oxide always have compressive stress. When you put some convert some of the silicon oxide into some S I N bonds it is called silicon oxynitride this is called nitridation this is actually called C I O X N Y where X is very close to 2, but not quite 2 Y is little more than 0 that is why it is called S I O X N Y or it is called silicon oxynitride it turns out nitride typically has tensile strength tensile stress. So, when you put some convert little bit of oxygen oxide into nitride you reduce the compressive stress that is another theory. So, you minimize the stress if the bonds are under stress it is easier to break the bonds if you reduce that stress it is more difficult to break those bonds and that is another theory which is also proposed to explain the fact that when you do the silicon oxynitride you have enhanced reliability. The point that I am again trying to make is that the silicon oxide has been used may be up to 65 nanometer kind of silicon technology after that we have made a migration to high k gate dielectric which we will discuss in the next class next lecture. And when we were doing silicon oxide of the order of 1 nanometer it was really silicon oxynitride because it is so thin reliability is a concern we were actually converting part of that oxygen silicon bonds into nitride nitrogen silicon bonds very very small nitrogen by the way the nitrogen that we were introducing where may be 3 to 4 atomic percentage specifically at the interfaces 2 interfaces because that is the key because the damage starts occurring at the interface right you really need to strengthen the interface. So, thereby you know we have been using this silicon oxynitride until very recently before we made a transition to high k gate dielectric. So, let me summarize then silicon oxide first of all is an excellent material because it passivates the traps at the silicon silicon oxide interface which we have already seen. And that is why silicon silicon oxide system is an excellent system to make FETs unlike germanium or gallium arsenide system that is why silicon has simply displaced all other semiconductors in the industry more than 90 percent of your electronics which is available in the commercial domain is silicon electronics that is because of FETs and that is because of silicon oxide. Silicon oxide has really served us for you know almost 5 decades from 60s till you know very recently that it is a very large service that it has provided. But over the time because we scaled this from 100 nanometer to 1 nanometer we started having this reliability problems first of all also follow nadam tunneling which induced you know this breakdown time dependent breakdown and so on and so forth. And next lecture we will also see there is another phenomenon called direct tunneling that is even more serious. And because of that now we are talking of replacing silicon oxide with high K gate dielectric. So, with that let us conclude the lecture today and in the next lecture we will start discussing about direct tunneling in silicon oxide, ultrathane silicon oxide and why do we need high K gate dielectric to replace silicon oxide.