 All right, ladies and gentlemen, welcome again. My name is Dimitri Peroulis, and it's my pleasure to welcome you to the second part of our distinguished lecture series, the panel, the panel on the future of Microsoft Design. The panel is moderated by Professor Karl Handrecker, and I'll pass the mic to her in just a minute. Professor Handrecker is the Reinhardt-Sumann Junior Professor of Materials Engineering and Environmental and Ecological Engineering here at Purdue. She is a fellow of both the Mineralist Metals and Materials Society, as well as the Materials Research Society. Her research interests are in the areas of thermodynamic and kinetic theory and experiments of phase transformations and interface motion. So let's give a big welcome to Professor Handrecker. Thank you very much, Dimitri. So we have this wonderful panel here. So Ravi Mahajan that you have, you've just heard, give a wonderful presentation. Professor Zhihang Chen, Professor of Electrical and Computer Engineering, and her specialty is in new interconnect designs back into the line processing, and she has as a leader of an SRC center. She might say a few words about that. The next is Anand Raghunathan. Anand is another Professor of Electrical and Computer Engineering, and his specialty is in design of semiconductors. He is the deputy director, co-director of an SRC center and neuromorphic computing. And our fourth panelist is Professor Ganesh Subarayan, Professor of Mechanical Engineering. His specialty is in all types of mechanics, including solving very complex fracture mechanics problems that Ravi mentioned before, but for electronic packaging and other systems. And he is the director of the SRC center in heterogeneous integration and advanced packaging. What we decided to do today was not just to have this simple panel discussion, we decided to also have a discussion with you about how they would tell you, how they got, where they got. Ravi, you've already talked a little bit about that, but how they got, where they got, what excited them. And so just to give you a little more guidance as graduate students and postdocs and in some cases undergraduates as you take your next steps. So we're going to start first with Ravi. Can you guys hear me OK? So you have a few slides. Yes, I have two slides. Though I cheated a little bit, I took one slide, made a photo out of it and added it to the first slide. So there's really three slides. But we'll count it as two. Personal background, married one child, that is the daughter. If you look closely, you will see her little finger that's around which I am wrapped. I'm an avid fan of cricket, which those of you who follow cricket are not very happy right now because of the way, you know, how miserably India is playing right now. I like Indian classical music. I have a deep and abiding interest in history. And this is where I really, really appreciate knowing Ganesh because he gives me a lot of insight in history when I talk to him. And some literature. I was born and brought up in Maximum City, wonderful book if you haven't read it, Mumbai. My father was a self-made engineer. He worked his way through and became an engineer through his own hard work. And my mother was a high school teacher who became a high school principal. Both of them are tremendous role models. They really influence the way I think. I am the middle of three brothers. Both my brothers are quite successful and they are successful because our parents sort of instilled discipline and more interestingly, the desire to learn, which I think is very, very useful. You see the pictures, I put all my brothers, my wife Poonam is over there and my daughter Ananya in between. My mother at age 70 went on a trip and reached up to Mount Kailash and was able to walk there. So real enthusiasm, you know, even she's now 80, she just turned 86. She could click once. Now, how I got here, I got a bachelor's in mechanical engineering out of the University of Bombay. It is now Mumbai, if you click once, yeah. I came to the US in 1986. I got a master's degree in experimental fracture mechanics, working with Professor K. Ravich and who is now at UT Austin. We studied how cracks evolve by studying the evolution of light patterns at the edge of cracks. The problem I was trying to solve experimentally was, what is the direction a crack takes when it is under applied stress? The basic work that led to this question and which helped a lot of fracture mechanics was written by that person you see on the right hand side, Professor Fazil Erdogan, very, very famous fracture mechanist and just as great a person as he was an individual. I had written to him after my master's and I said, I'd love to do a PhD under you. And he was kind enough, even though I do not really have the intellectual capacity to be his student, he gave me a scholarship to come to Lehigh and I worked under him five best years of my life. And in terms of people who inspire and change your life, I'd point to my parents, my brothers, Professor Ravichandar and Professor Erdogan. Tremendous person, one of the best people I have known. And last slide. So I wrote a little bit about what this panel could discuss. As I said in my talk, I see H.I. as a very important vehicle for performance. I also see the need for a roadmap, a much better roadmap than where we are today, which clearly says here is the challenge, here is what we ought to do about the challenge. I see collaborative industry, academy of partnerships, not just topstone guidance, it doesn't have to be that somebody says, here is what has to happen. I think the intellectual strength or depth in universities is tremendous. I see, if we work together, we should have a clean path to generate ideas, evolve these ideas to a point where they are matured and then we bring them in to feed the next generation. We always look for ideas that can feed the next generation. And in addition, a systematic pathway for workforce generation. So slightly longer, but I hope. Thank you very much. So, Professor Chen. Okay, and can you forward the slide? So I have one slide prepared for the research areas that I'm interested, but just like what Ravichandar did, I'm going to tell you a little bit about myself. I don't have pictures about myself or my family here, but then my training actually was in physics for both of my bachelor and PhD studies. And then when I started physics, like that was the dream I had as a high school senior student, I wanted to become a physicist, but the dream was not about condensed matter physics. I was hoping for high energy for all these astrology or like studying the universe type of physics. But then after finishing the bachelor, I was still having that dream, but when I entered the PhD program, I noticed that nanotechnology, nanomaterials became really the hot, hot topic. And when I look at under the electron microscope pictures of all these materials and all these devices, they were just so fascinating that I couldn't resist joining one of the very nice carbon nanotubes groups back in University of Florida. So my advisor was working with one of the Nobel laureate, Dr. Smalley, back then synthesizing the carbon nanotubes and trying to figure out the chemical and the mechanical properties. And so I got very attracted to that project and trying to figure out how to make those nanotubes as pure as possible, as sorted as possible that we can use them in electronic applications. And because of that type of work, that was preparing the materials for industrial application. So I got the opportunity to actually join IBM T.J. Wilson Research Center as a post-doc. And where actually back then, Dr. Faden Varus was very famous in the carbon nanotube electronics field. And so I joined his group and we were working on not only the materials and really tried to integrate carbon nanotubes into microchips. That was one of the IBM's secret that trying to replace all silicon transistors with carbon nanotubes. And so we worked almost 15 years in IBM T.J. Wilson Center on nanotubes. To the end of my research staff member career in IBM there, I was appointed as manager. Actually we had about 15 engineers working on carbon nanotubes trying to push into really manufacturing and hoping that we can have a wafer scale integration of carbon nanotube electronics. And that was a tough path that so many of us working on materials issues, devices issues and trying to do the integration. And then after so many years of working on the materials problems and the device problems, I eventually felt the barrier to push a new material into industrial production is bar bar high. And I was not personally patient enough to wait for that to become a production. And so then I decided to leave for academia because I felt that I still want to explore new science, new materials instead of pushing the last bit for material to become production. And that's when I found the Purdue, this perfect home for me here. I joined Purdue in 2010. And then like here actually the slide shows on the left hand side, I show the cross-section SEM picture of a microchip. So my early career was focusing on the bottom of the chips. We try to look for the new channel materials for front and the line transistor implementation. So that was my old career path. And after I joined Purdue, I realized probably not that much can be done for the front end. So I decided to work on the back end. You see that there are almost 10 to 12 layers of metal interconnects that are embedded in dielectrics that we can have the innovation. And so like that's one of the SRC centers that Carol just mentioned, that I'm the director of the new limits, SRC Encore New Limit Center. And in that center, we are actually looking to new materials and the new connect, new devices to solve the back-end line problems. So what problems does back-end line have these days? When you look at this microchip here, we are trying to scale the transistors into tens of nanometers. And all the interconnects, all the vias on the top also need to be scaled together. But then even copper interconnects, copper is one of the best metals, the second most conductive metals. However, even for copper, when you scale copper into tens of nanometer scale, they even become very resistive. Even the resistivity of these materials start to increase. And that's how we actually look for solutions, how to save the back-end line performance through new material innovation. And so on the right-hand side, we have these cartoons of two-dimensional materials. These are many, like, thousands of materials choices. We are looking into these atomically thin materials, trying to insert them into back-end line so that we can solve the copper interconnects resistivity problem. We can solve all the copper diffusion leakage problem in the back-end line. So that's one of the major topics that we are exploring in the new limits center. But if you look at the ACM picture again, there is actually more room, plenty of room available in the back-end line. Especially above the M5, M6, like the fifth and sixth layer above, you can look at the structures, the interconnects and the vias. They are huge. So there is actually plenty of room to add something to these vias and interconnects. And that's what many people now in the fields are doing. You see on the bottom, like 2018 CEA Latte in France actually demonstrated they can insert RM, resistive RM into the vias. So now you can actually have memory units very close by to the logic units that you can have computing memory. And all like actually for a lot of neomorphic architecture, that's actually required to have memory close by to logic. And on the other hand, you can also insert new types of transistors like a thin film transistors to the back-end of line. You cannot do that to the front-end of line because the processes are too different. But for back-end of line, you can introduce the TFTs that can control the power, can actually be the IO for high voltage conversion or these different functionalities. So my personal belief is there is so much innovation can be done to the back-end of line. And if you can actually not only having the new materials and new devices to improve the performance, but even add new functionalities to the back-end of line, that's really going to define the success of all the future macro chips. Thank you. Thank you. So, Professor Ray Nathan. Okay, thank you. Carol, I'm sorry I missed the memo on introducing myself. You could go back one, are you able to go back? We'll just keep the slide empty while I introduce myself. Please. So, like Ravi, I also grew up in a warmer place. I'll come back to that in a moment, but I also owe a lot to my parents. I've come to think of it, never thought of it this way, but I think my brother and I are probably first-generation college graduates from our family, but really owe a lot to our parents who instill the desire to learn and the long-term commitment to us. So, after my undergraduate degree at the Indian Institute of Technology in Madras, I frankly had no clue what I wanted to do. I knew I wanted to go to grad school because everybody around me was doing it, but I actually nearly joined Johns Hopkins to do biomedical engineering until the last minute, change of mind, and saw me making my way to Princeton to study electrical engineering and specifically computer engineering there. And I think I'm glad looking back, I made that choice. Although, BME is a great area, nothing against. So, after I graduated, I joined NEC, like Professor Chen. I also spent some time in the industry almost 12 years, to be precise, leading a group that looked at various technologies, system-on-chip, architecture, embedded computing, and had the good fortune of seeing some of our technologies make it past the value of death, get transferred into products with extremely learning experience. And then, in the mid-2000s, when NEC semiconductor business was spun off, I figured I wanted to stay closer to my hardware roots and managed to find a home here at Purdue in the fall of 2008. I'll say that I actually followed my brother, or maybe he will say that, Vijay is sitting back there in the audience. He was here a year before I was. I still put his leg saying he's the professor in the family because I've spent more years in the industry, so I've just crossed 50% now. So, hopefully I still try to keep a blend of my background from industry to guide whatever I do. Maybe you could click. Now, getting to my message for the panel, this is the time of the year where we always look for a few warm days, so I find myself looking at the weather forecast, so I thought I would structure my message as a forecast of sorts. So, in my mind, the future of microchips, and this is very much from my perspective, shaped by what I do, is gonna be intelligent. Artificial intelligence already is setting the pace in terms of both creating new markets for microchips for computing and setting the demand for compute. The figure on the top here shows that, actually in the last five to eight years, the growth in compute demand from AI is 10x per year. That's way faster than Moore's law. So, AI can certainly soak up any compute we throw at it and more. This is a fertile ground for innovation. And so, the Seabrick Center that I serve as associate director for, funded by SRC and DARPA, is really, this is one of the core problems we are solving, the AI compute efficiency. And the figure on the bottom actually shows the different generations of hardware platforms, CPUs, GPUs, more specialized accelerators. And they take you to compute efficiencies in the order of tens of tera-ops per watt, trillions of operations per second per watt of power. That's one way of quantifying compute efficiency. But given the insatiable demand of AI, there's always this question of what's next. If you'd like to learn more, I'm happy to talk about it later. A click, please. And the future of microchips is also very challenging, okay? As we all know, Moore's law in the form of increased numbers of transistors integrated, continues and hopefully will, thanks to heterogeneous integration and other innovations. But for quite some time, metrics like single thread performance, clock frequency and power have tapered off, right? And so it's really an increase, designers like me are challenged to use these transistors and translate them into meaningful value that customers will pay for, right? One of the recent trends is that specialization is a key to improve performance, right? So today, if you open up your phone, the chip in there, or even the chip in a laptop or in the server, it is a system on chip. It is heterogeneous. It has different types of components that are specialized for different workloads. As a result of this and many other factors, the design complexity and design cost of these chips is growing up tremendously. So the graph on the bottom actually shows the design cost. And we all think of fabs as costing billions of dollars. The projected design cost for a state-of-the-art 5 nanometer chip is half a billion dollars, okay? So it costs the same to design 20 or 30 chips as it would to create a fab. So that's very mind-boggling and that needs to be addressed. That might be the eventual limiter, perhaps. One more click, please. And I want to, you know, like a weather forecast, I want to end by saying it is also bright, right? Because we see increasingly diverse workloads driving growth in the semiconductor market, right? This is really unprecedented, you know, in compared to any other aspect of technology or human endeavor to see the increase that Moore's law has enabled over the past five or six decades. And it shows no signs of stopping and driving economic value. And a big part in that is that microchips are not go not just into platforms that we think of as computers, which itself span a diverse spectrum from data centers, you know, down to computers you hold in your hand, but also all of these other things that we don't really think of as computers have computing embedded inside them. And so I think, therefore, the future of microelectronics is bright. Lovely, thank you very much. Yeah, Professor Subarayan. Working, I don't know if this is working. Okay, great, thank you. Thank you so much. And it's a real pleasure for me to be in this panel. And one unique thing that you'll notice about this panel is every one of us didn't start our career in academia. We started somewhere else and we transitioned to academia. I, too, didn't start my career in academia. I started my career working for IBM. And then after a few years, I transitioned to academia. Before I go there, I'll describe a little bit about what interested me as an undergrad. I was doing mechanical engineering at Indian Institute of Technology, Madras. And I was very excited by optimal design for whatever reason that I found that interesting. So I wanted to pursue graduate program in mechanical engineering. I thought I'd be focusing on optimal design. I started and then one good thing about doing a graduate school at Cornell is Cornell admits you directly into a PhD. So it's either MS or slash PhD. So you can pursue either. And I liked PhD enough that I wanted to pursue a PhD. And I chose to do a, and they also had minors, and this is more for the students. They allow you to take minors. You need to do two minors. And I chose to, my first minor was straightforward. I chose computer science as my first minor. But I know that seemed to line up with my interest in optimization theories, et cetera, et cetera. So numerical analysis was what I was doing. But then around after the first year, I took my first solid mechanics class. That really excited me. And so I said, well, maybe this is what I should be doing more of. And I did more solid mechanics classes. And I did another minor relating to solid mechanics and then computational mechanics. So I did all that. And then when I finished my PhD, I had two options. My computer science minor advisor offered me a postdoc to continue doing non-linear optimization. So I could have continued doing that. Or I could have gone to work for IBM. I ended up working for IBM because it paid me a little bit more. Maybe it's bad decision, but I ended up going to IBM. So I ended up doing failure mechanics. Most of what I did in IBM was, why do things fail? So a lot of what Dr. Mahajan talked about. So failure mechanics. And then when I started at IBM, IBM had a great lab or package technology development. I worked in a technology development lab, not in a research lab, technology development lab. And the projects that we were working on in my first year would become products maybe five, 10 years down the road. We were working on a really exciting supercomputer. A product on Teflon circuit boards with 32 layers stacked. Real state-of-the-art supercomputer that was going to become a supercomputer five, 10 years down the roads. And unfortunately that got canned. Then I was working on projects of this year. And in my third year at IBM, I was working on projects of last year. I mean products of last year. So at that point in time, I needed some more challenge. I moved to academia at that point in time and I've been in academia. So I should say my entry into academia is accidental. So that's about how I came to academia. And a lot of what I do is a mix of the interest in solid mechanics, optimization, all of the theories that you hear. That's about my background. And what I don't, usually students think that I teach them but what I don't tell them is I learn a lot more from them than I teach them. So most of the, every one of my PhD students taught me a lot more than I have taught them. So I'm very grateful to all the PhD students who I've worked with over the years. So with that I'm gonna move to this slide. Try to keep it short. I think Ravi did a wonderful job. And so this is meant to be a high level slide explaining the critical need for heterogeneous integration. And this is the package that Ravi showed, maybe very briefly. And this is a little blurb from Intel about their new heterogeneously integrated package and how this represents, in my view, a dramatic jump in the level of complexity in heterogeneously integrated packages. And what goes into these kinds of package, Ravi can address that. Dr. Mahajan can address it a lot better than I can in terms of what challenges they overcame to build this product. But a significant fraction of the challenges would be thermomechanical challenges in fabricating these kinds of packages. You need to be able to make sure that they don't warp. You need to be able to make sure that the sort of joints, for instance, are of the right material. They need to last for a long time. Those are the kinds of issues that I work on broadly. So with that I'm gonna. Great, thank you very much everyone. So I think you've heard how excited they are about the work they're doing. And some of the pathways that they've taken to get there. The other thing that's important is that they're each working at the cutting edge of these technologies. Whether you're at the university or at a company. And so one of the things we want to really discuss today is how we can work better together. What are the ways that we can become more efficient and more creative? And the other thing you saw from all of them, they were having fun telling you about what they were doing. So this is all very much part of this. So what ideas do you all have in how we can work in a way together that we don't become a service organization? We've had some so Ganesh and Ravi and I have had some discussions about well how can you be really important to the process and be involved but you've got these big companies like Intel that have these huge teams. And so we're universities, just how do we find the role that the best roles that we can play? So Ravi do you want to start? Yep, I have a suggestion. I don't believe I have an answer but I have a suggestion. If you look at what Moore's law is, it was a projection. What Gordon Moore very intelligently did was he projected doubling and then people extrapolated the doubling. In enabling that doubling and creating an engineering infrastructure to make it happen and an industry out of it, people kept asking to hit the next note what do I have to do? If suppose we look at this from a packaging perspective and this is not my idea by the way, my former boss and other people at Intel did this. They said thermals, let's pick thermal resistance as a number and let's say generation over generation what is the scaling trend of thermal resistance? And we plot this and we say okay if this is a trend line to hit the fifth point when the industry is working on points one, two, and three, four and five what do we have to do? What technologies do we have to be brought to bear? What meteorologies have to be brought? What materials have to be brought? If you just look at problems like this electrical is the same thing. Electromigration resistance, pitch shrink and things like that. And then say that these are quote unquote the hard problems and we say I cannot just do this with copper, I have to do something else. Chances are we will be wrong in all the solutions we pick but chances are we will also be right in a few of them and if we make them succeed and figure out what does not work I suspect will be better served instead of reacting to an engineering problem and engineer faces on the floor today and tell you what is in the back of their mind the problem disappears six months from now but the intrinsic value of the problem doesn't. Like I'll give you a classic example. Things delaminate in packaging and they have delaminated for years and years right? So every time something delaminates people find a way to stick it better and we solve this problem but modeling the fracture of that interface having a tool that predicts the existence and the formation of fracture. A tool of this nature would have helped not would have does help us quite a bit. I think that's where Ganesh's work comes in. Having a tool that you can put in a model and predict something. That is infrastructure in my mind and that is fundamental infrastructure that we need. Similarly a new class of materials for thermals is another infrastructure need. I believe something of this nature will change the way industry academia interact as a service model to a developer of building blocks model and that I think will be the difference. Ravi, so that's a great insight. As academics we like to focus in our disciplines. If you ask me would I rather develop a computational tool for fracture mechanics than to do something else? I would really enjoy developing a tool for fracture mechanics. The guys who are developing tools here. But is it better for academia to organize itself disciplinary or is it better to have a grand challenge problem? Maybe a device that academia should prototype and maybe a challenging problem that thermals are specified, reliability is specified and academia works together collectively on a prototyping activity. What would be a better? I believe a grand challenge synthesizes thought much better than individual areas. And you know like I, though I'm not a complete fan of this I'm quite a fan of the way DARPA addresses problems. You know they describe a hard problem. They say five years from now solve it or 10 years from now. Put targets. Once you have a synthesized then you say develop a prototype. While you develop it if you pay attention to the constituent elements and make good choices. I suspect we will do better. I suspect we'll do better. Instead of individual disciplines because individual disciplines will lead to expertise in individual disciplines not a combined solution. Exactly. Maybe because of my industry background so I personally I'm very excited about the translational research, right? I would like to do research on new materials or new devices that can be adopted by industry eventually. So that's what I call translational research. And then like in the past when I saw that the academia like did their own research, published papers and then industrial labs like IBM or Intel also like do their own research and even publish their own papers. And then we also have a really wonderful like mechanisms like a semi-data research corporation. We have the CEO Todd Young conducted Todd Young and I just sitting here like a semi-data research corporation actually is funding a lot of university groups to do research. And so like this is actually the mechanism to connect academia research with the industry with the real technology. But now it's entering a point that I see actually maybe there is another need actually to have the industry researchers and the academia researcher to even share a platform that you can have the knowledge transfer even faster than through SRC. Because we see that sometimes through SRC we are funded for five years to create a recipes or process or discover new materials. It will probably take another five years for the semi-data companies to really adopt them. So is there a platform that we can really talk in the same lab knowing what industry process needs that we can modify our recipes quickly for them that they can adopt? So that's what I think maybe is the next phase of the semi-data technology development. Ravi, do you want to comment on that? I actually very much I'm in sync with this thought process. I fully agree. If you have a platform you can work on that's the way to do it. We just have to define it right in my view. You know the definition requires thought I was talking to somebody earlier today and I thought if we have a way to organize a group discussion among people with very few barriers on what intellectual property are I believe we could collectively describe a vision of what we should do. And a few visions will help quite a bit. And I agree, entities like SRC do a very good job of bringing like-minded people together and strengthening these kind of institutions to do work at a broader level with greater discussion is probably the right way to do it. Anand? Yeah, I just wanted to chime in on the grand challenge and I saw Todd nodding meaningfully a few times. Well, yeah, I'll share my experience with it, right? So I've been part of the SRC DARPA center ecosystem or it'll be next year, it'll be for 10 years. I think it's a wonderful program by the way. I've tremendously benefited of course from the funding but from the additional value that comes with being part of the research and the value we get from feedback from the sponsors. When we started Sea Break, the Center for Brains by Computing, we felt we had a coherent vision and based on the feedback that we got from the sponsors and Todd was kind of the messenger, conveying that for the first couple of years, we realized there was still a gap and it wasn't easy. It was by no means easy but it was very much worth it. The experience of trying to further crystallize that vision and define very specific goals pushed us in ways that I think eventually were very productive. So I'm certainly a big believer in that grand challenge driven research. That's great. So we're going to get to the Q and A from the audience in just a moment but I'd like to give the other panelists an opportunity to ask questions of Ravi. Actually, I had one question. I didn't get a chance after your seminar because the audience was asking questions. For most law scaling, it was rather clearly defined that every company is competing for the size, the dimension scaling and competing about the time, every two years. And the winner will be announced, every company will say, okay, I can do technologies this node. So for the advanced packaging and the heterogeneous integration, is there a quantitative metrics that the companies are also competing on? Yeah, absolutely. Though you have to distill it by market segment. Once you distill it by market segment, let's talk about high performance computing, for instance. In interconnect, we have targets. We actually wrote a table down which I am convinced is not entirely right but it gives you a sort of a framework on which. So yes, for interconnects, there is one for physical interconnects. The thermals we are still getting there for power delivery, we have targets, materials targets and performance targets. For high speed IO, we have targets. We have link length targets, we have power efficiency targets, we have bandwidth targets. So I would say there is a partial response to what you asked for. Are there targets? Yes, absolutely, I believe so. And I keep emphasizing the roadmap for a very simple reason. It is a non-partisan, publicly available roadmap. There may be errors in it but almost everybody can look at it and say, you know, I can do better. I'll give you an example. I was at Georgia Tech a couple of years ago and I had five generations listed in my table. The Georgia Tech guys put three more generations beyond it. You know, wonderful. I mean, it just says if three years a generation and eight generations, 24 years of research. Ravi, I'd like to ask you a couple of questions actually but feel free to address them jointly. First is how do you see AI workloads driving packaging and heterogeneous integration? Do you see that? And if so, what are the major ways in which they are? And the second question is all the innovations in packaging, what upstream effect do you think it's gonna have on the way we design those chips or chiplets? So I use AI workloads as an example to say, you know, like if you were to look at technological advances, you have to take the most challenging problem and describe what technological, AI workloads today represent the most challenging demand. So in that sense, you know, some of your numbers are interesting. You notice I put in a roofline graph in my thing also. If they say this is the maximal, the only thing you have to be a little bit careful about is if you invest the bulk of your energy in making that manufacturer friendly, you have to ask how big is the market for this in terms of sheer volume and is there a scaled down version that you ought to focus on? In my mind, that is the kind of thinking that has to percolate, but you know, setting technology challenges and going after these so-called DARPA hard problems, that's the right way to do it. I'm sorry, I missed your second question. Oh, design, how do you think packaging and integration? By the way, the, you know, I keep, like if I were to use an extremely poor and low level analogy, packaging people can be thought about as the people who build your highways. We don't define the cars that run on your highways. If we build them right, your cars will run better. I would have loved to co-design it so that if we build a highway that is able to deal with only a 16 ton truck, you don't drive a 20 ton truck kind of deal. In other words, we could co-design. You could describe here is what the future is and we could collaborate to define an infrastructure that meets your needs. And my belief is that we are kind of neck and neck on what the demand is versus what the supply is today. And the directions we pick will be very much defined by the dinner. It was great to see your talk and great to hear the progress in technology, packaging technology, and also, for instance, you ended with Foveros and Ponte Vecchio, which is fantastic technology, all demonstrated in this wonderful product. What is the challenge that Intel sees for the next generation? I see 47 tiles, it seems like a jump relative to the other products that I've seen from other companies with smaller number of tiles. So what is the challenge that Intel has set itself? It looks like you've proved a lot of technologies with the Ponte Vecchio. What is the challenge that you said? There's many that I did not talk about. For instance, if you take a very simple exponential model of yield being an exponential function or yield loss being an exponential, if you increase the number of chips, the yield loss will go up dramatically beyond a point. You'll say, why am I doing this kind of, but then you look at entities like cars, they have way more number of constituent components and they still manage to build them with reason. So the first, not first, but one of the most important areas is how do you test, how effectively do you test and when do you test? I did not touch on any of this in there, but to me, being able to get known good entities and not completely known, but as well known as you can is a very, very big part of this equation. The second in my mind is the materials that go into the manufacturing, which you have to use them to build high yielding processes is another. The third, which would be an ideal goal is can you by design predict what you expect functional or thermomechanical reliability of a part to be before you build a part so that you can design your test chip. That is a fairly big challenge. Then performance and interaction. You know, I showed it in my graph, but I didn't really talk about it. If you take components and you put them on the same package and you try to cool them, they talk to each other in thermal crosstalk. How do you design it so that, then there's the core design for electrical, thermal and mechanical, the design tools which have a common language that talk with each other. All of those are areas where we have done well, but we can do better, is my general view. Great, thank you very much. All right, so let's open the questioning for the audience here. Who has a question? Thanks. Hi, great panel and great talk for that. I'd like to offer a counterpoint to the first question that was answered, which is the industry academia collaboration. Ravi, I thought you put it beautifully when you asked, you know, what will I need to get to the next node? And the counterpoint I'd like to offer is that you need a ton of super smart people, right? And those are the people, and that's what has enabled you to get from one node to the next node. And there was a lot of Zihong when you talked about technology transfer, you know. I've sort of found that the best way to transfer my technology to industry is to get my students in there so that they can do the transfer of essentially the thought process and the technologies that we have inculcated into the companies. So can you talk a little bit perhaps about that aspect of industry getting involved in the university, you know, training of advanced graduate students and sort of almost creating that pipeline to suck talent in? So speaking as an Intel person, we do quite a bit. We have Intel fellowships. We, at various degrees, engage with universities as liaisons, talk to students. We even had a requirement for our liaisons to make sure that we keep an eye on liaisons, figure out ways to do internships, facilitate that research. Now, like everything else that is well-intentioned, we do it in degree. You know, some people do it really well and some people. But we try very hard to do stuff of this nature. We also try as best as we can to talk to students as frequently as we can. I don't claim to be very good at it, but I do claim to put in a lot of effort in talking to different people in all of this. So I believe handshakes of this kind. And then there's practical things. You know, can you do internships? Can you figure out ways by which you facilitate that research by pointing them in the right direction? It's a matter of degree, not matter of desire in my mind. I confirm this part of the interaction. We have a new limit center sponsored by SRC and also other Intel projects. We have monthly reports and monthly discussions with Intel researchers. So the interaction is very intense, I would say. So I just want to offer an anecdote, right? Shekhar, another formal Intel fellow, Shekhar Borkar, you know, early on after I moved to academia, he said, you know, this is a beautiful analogy he gave. You know, think of yourself as the people with machetes going out and clearing the jungle and telling us where not to go. It's okay, you know, if you have a few snake bites along the way. But in the process, just make sure you train a few good students who can come and work for us. So, you know, you can imagine how I felt. But over the years, I've come to embrace the fact that a lot of value taught us, I think a lot, that the sponsors see is with the students and, you know, we try to get out of the way. Of course, we learn a lot from the students. I'll second what Ganesh said and it's a blast working with them. But I completely agree. I think that, you know, I've come to see that as a very, you know, primary way of actually doing technology. Just a quick follow-up thought and I'll stop. I know, you know, this panel has become, you know, let's call in Todd Session. But just to continue that for a second. You know, I do wanted to just, you know, give a quick call out to, I know that at the time when the jump centers were being formed, there was a very strong push that, look, you know, x number of students, 85 students or whatever it is, right? And that has to happen. And I think I thought, you know, things like that would, you know, sort of showed the importance of focusing on that, you know, talent conversion pipeline really. So thank you. But there's, I point to one more quick anecdote. You know, UCLA has a center called CHIPS, where Professor Subbu Ayer, who's an ex-IBM fellow, is building what he calls SIF, Silicon Integrity. So he invited me over and at breakfast, I was sitting down with a bunch of students. I tell you that breakfast was fantastic because they asked me all kinds of questions. They explored and oftentimes, I would think the reason I'm saying this is because this is how it has been done, as opposed to having a rational argument for why it is done. Or I would say it is more expensive to do it this way. And I realized halfway through the breakfast that just because things are done in a certain way doesn't mean that this sort of pool of thinking that has been generated, if I could harness the power of their thinking, I'd be a much richer individual. So I think that kind of discussion with fresher perspectives on the same problem always helps. So that's a very important point that we actually have to spend the time to have these deep discussions. And you can tell that Xi Hong is very excited, is committed to implementing this back into the line technology that Xi and her center have created. And we work with Intel and low melting point solders and we talk with them at least every two weeks. And so they're implementing them right now, but they may not get implemented in the end. So it's an interesting discussion here where they're competing technology, some things will work, some things won't. And we've just got to keep moving forward. Yeah, I agree. I mean, even if it doesn't, I like the machete analogy, not the snake bite analogy. Exactly. But if you clear some paths where you will not progress, at least you cleared those paths, you don't go there kind of deal. So that's wonderful. All right, we had at least two other questions. Hi, thank you for the talk. My question was actually about thermal management aspects. So as students, I am a PhD student and when we work about thermal management, we always think that it comes as an afterthought like after the system architecture has been designed and then we talk about thermal management. And it comes back to your point about core design that there's a lot of challenges that have to be addressed in electrical thermal and a mechanical core design aspect. So can you give us more idea about that as to how challenging it is and what can we do in that aspect? First thing, you should not believe when somebody says it's a afterthought. It's not an afterthought. When you do 3D stacks, for instance, it has to be intrinsically part of it. Occasionally, what would be different is the language people speak. For instance, all thermal engineers consider heat generation as a steady-state time invariant problem. Do you really think it is a steady-state time invariant? I don't believe so. It's a transient problem. So the first question we have to ask is, are we just solving for an envelope and then claiming that something breaks and then we say, oh, there is a thermal problem? But it would be much better if we found the common language that says, when I'm running a code of this nature, what is the different operating model on the dye that I really understand the power? Then if we ask ourselves, how much variation is there? Because each chip is not made the same. There is intrinsic variation. There is design variation. There is structural variation. How do we figure out what the variation is? How do we encompass it? We talk about things like thermal temperature measurements. You know, temperature measurements, actually, if you really think about it are not that easy. My view is that we have not yet, though we have done a lot better now than in the past, we have not yet found a common language to talk this out. And the modeling tools use different methods and metrics kind of. That part I think we could do better, but I do not believe that thermals is an afterthought, at least for people like me. And not just me. I was here in 2004 when we were trying to do a thermal co-design ERC. Even at that point, it was evident that co-design was intrinsic. It cannot be ignored. So it's not an afterthought. Thank you. Wonderful. Professor Shukuri? Question. You know, one of the issues is always IP and how sensitive is in the short term. Could you give examples of, good advances have happened through industry working together. I don't know example from IMEC, from Albany. What will be some cases you say, this is a good case. We could work and we solve actually an important problem together. You know, that used to bother me quite a bit. Till we came to today, look at when we sign a standard SRA for university research. As speaking as an Intel employee, if the IP belongs to you and is background, I don't want to quote unquote, take it without paying for it. If IP is developed during the process, if we have a common handshake in the beginning, and then we work it out, I don't think IP should be a factor in all of this. In fact, I have, now it's, I have believed that if we negotiate this and do it right up front, we would not have to and should not worry about IP. That said, what are good examples? I don't have great examples to quote you, where intrinsic IP for my university has been transferred to industry in packaging. Though I do know that there are fields like computer science algorithms or different points where IP has been a factor. And I know there are material science inventions which have come from universities which have been a sore spot. But I don't know in packaging where IP, and I'll give you a positive example of IP. I was telling Carol in a conversation, Nick Chawla, Professor Nick Chawla had suggested that if you put minuscule amounts of rare earth elements in a solder, you change the shock resistance of this. And he had done all the intrinsic work with it. We worked out the IP deals with ASU really, really well. And we even got to a point where we took those configurations to send you metals and started developing manufacturable solutions out of these. So they have been good examples where we have worked this out reasonably well. Now I'm speaking from a very narrow perspective because I have focused myself on thermals and there's a much broader conversation to be had. But from my perspective, I think IP can be resolved. Additional questions? Ravi, so this is a question to you as the heterogeneous integration roadmap author. You talked about high performance computing. There's a proud tradition of space here, other things. Can you talk about some of the challenges in automotive power electronics or aerospace, please? Yeah, let me start the other way around, Todd, because if in aerospace we include space beyond aerospace, kind of the broad one, then there's quite a few very, very interesting questions. First, the level of reliability they expect is different and in a number of ways, quite a bit more challenging. One approach to doing this is to take commercial solutions and extend them up. It is possible that we haven't found it. There may be points where the technology envelope breaks and we may have to figure out ways to introduce new materials to solve specific problems. For instance, if you have to have a part that is say radiation hardened and you may not be able to, I don't know if that really exists, but if it happens that commercial solutions are not truly radiation hardened or there are other non-technical issues, what could we do? So that is one thing. Secondly, the size-weight, the swap challenges could be quite significant, especially, I think I was talking to Professor Grohl last night about how size matters and weight matters because it matters to payload. That could be a factor that we don't pay a lot of attention to in commercial electronics all the time, so that could be another challenge. Medical is always environments that you work in are very different than the environments it work in and safety, reliability, all those kind of, so I have a feeling that we ought to, we do the normal things quite well, take today's stuff and extrapolate it to the best as we can. I don't think we have done as good a job of taking those environments by themselves and extracting out a new class and then how to develop it. There is a lot of work needed there in my mind. Additional questions? Hello, thank you for sharing with us your wonderful backgrounds and on that note, given that you all had a transition, so to say, from academia to the industry and for some of you all back to the academia. As a PhD student, I guess my question is, we spent close to three to four years identifying a key critical research topic and getting into the depths of it, getting into the weeds of it and now, when we are looking forward to getting back to the industry and contributing, my question is, what is the scientific thought process that you're looking for in us? Especially given that we have a mindset of getting into the depth of a problem, but when we get into the industry, the expectation is a very fast, quick turnaround. So my question is in your thought process, what is the strategy that we should be looking forward to? If you carry a very simple mental model that says if it is not done in time, it carries no value, I think you will succeed very well. And I was at NIST for 21 years, so I was one of the leads in advanced packaging at NIST besides being chief of metallurgy. So one of the things that I learned early on was I came there as a postdoc and then I'd done my PhD in four years. Well, I had to do basically another PhD in a year and a half. And then I had to do another PhD every year plus mentor other people there and work with them in teams. So we're creating two PhD theses a year as a team. So I don't think it matters where you are. And then if you're a faculty member, oh my goodness, that's even more extreme because you're raising all the funding to do that. Whereas in industry, we get, and in national labs, you propose the work and you get funded, but it's typically internal. So anyways, there's less of a distinction than you might originally think, but they're all fun. I'll just add a quote from a colleague, from a former colleague who's no very distinguished, he's the president of ASC Group, which is the largest packaging group. He was my colleague at IBM and I was discussing with him another fracture mechanics friend. So he said, if you give me, and he and I were discussing one day how we dealt with his customers, we had internal customers within IBM. So I asked him how he dealt with it. And he said, if you give me $1, or if you give me one day, I'll give you a $1 solution. If you give me one week, I'll give you a $10 solution. If you give me a year, I'll give you a $1 million solution. So I think the trick for many of us, the challenge for many of us is learning to develop this $1 solution. So not always look for a million dollar solution. And he was far more successful than I was. Thank you. Other questions? Well, I thank you all very much for participating and I'd like to thank the panel members for a really enlightening discussion. Thank you. Thank you. Thank you everyone.