 The literature on polar gallium nitride, gon, surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the gon growth technique and growth parameters on the properties of gon epilayers, the ability to modify gon surface properties using in situ and ex situ processes, and progress on the understanding and performance of gon metal oxide semiconductor MOS devices are presented and discussed. Although a reasonably consistent picture is emerging from focused studies on issues covered in each of these topics, future research can achieve a better understanding of the critical oxide semiconductor interface by probing the connections between these topics. The challenges in analyzing defect concentrations and energies in gon MOS gate stacks are discussed. Promising gate dielectric deposition techniques such as atomic layer deposition, coupled with more advanced physical and electrical characterization methods, will likely accelerate the pace of learning required to develop future GAN-based MOS technology. This article was authored by Paul C. McIntyre and Rathnate D. Long.