 It's about implementation of Project Oberon Machine on low-cost FPGA. The paper has appeared in Xilinx Excel Journal, that is basically Xilinx-based, Xilinx-made journal that popularized FPGA technology and There are other papers related to it that I will talk about later So what is the first project Oberon? Yeah, Project Oberon was realized quite many years ago. I think it started about 92 as the next version of Pascal and Modula familiar languages and Expanded into fully pledged operating system that was operating with one megabyte of memory on the standard setting It was servicing all the input-output devices by itself and By the standards of its era and still as a programming environment It was quite advanced So it had a lot of things that similar to plan 9 like inline execution within the editor so you could just highlight the module name and function name to execute it and Thus create macros or programmable editors It also had the Tiled the window manager basically multi-pane window manager So it was fully graphical interface for programmers Its main advantage was that it was still very small Thus, it's suitable as a handbook for construction of operating systems and compilers So it has operating system inside a compiler inside That you can examine including code generator So and that the most important part for some people is that it goes from the lowest level programming that was available at the moment To the high-level software like windowing system So it's about 9,000 lines of code I'm not sure if you are aware like this is something that you can probably do in 100 days if you know how to write it So in terms of minimalistic design It's awesome. Yeah, it's not one of these processors that I talked about that are realized in FPGA like in the 200 lines of code like fourth machines but a bit higher level and It's both programming language there and operating system again, so awesome What about if somebody wanted to make it basis for even more expanded cores? So there are non native implementations for Windows Linux ARM And surprise surprise, I also found one in JavaScript So we have full of early emulator in JavaScript I will show it to you so that you can appreciate how this thing works in real time so I have a demo part even without FPGA and I kind of understand that for me the natural question would be if we proceed that far into giving a self-contained minimal tutorial on how operating systems work We would like to say why don't we make a tutorial how computers work and work from gates up? Yeah as as soon as it is feasible for a student to construct the machine on their own It makes sense so I would not go like from basic physics to To know to use this transistors and the sample processor via it's a bit tedious That may discourage our students, but now we have FPGA technology you can upload Softcore so calls so the gate description in relatively high-level language like very long or VHDL and Execute your computer as it would be Similar to how it would be described when you had a high-level description of a chip Yeah, so the principles are the same. It's just a little bit slower. Not by much though Yeah, so you can simulate the whole computer system You can tutor people about communications about protocols used at the hardware level Some sounds great for the people that are interested in understanding this are making some low-level stuff or low-level protocols Yeah but at least Mr. Vith that wrote this paper for Excel journal told that oh Our old computer system on which we started the Auburn project got Faced out. It's not it's out of life. Yeah, we only only have non-native systems. So I thought hmm now We have FPGA maybe I will have like lasting system on which I ported and it will be native Okay, that may be also motivation and The fact is that this lasting system is about 100 under the hundred dollars So it's very similar in setup to Papillio. It's about the strength of Papillio pro actually a bit weaker so it's part and three with what basically one megabyte of static RAM and PS 2 port SD card for communication for permanent storage So that's like minimal almost Arduino. Yeah Okay, so I just made the links here The only part is some of the images in in this presentation need to be replaced by grafts To to be put on the github. So I will probably do it tomorrow And then you can also follow all the links if you want to pursue this subject But now we can try the demo How the oberon system feels in real life So maybe I will just click it so I will take the full disk image and I will start it in I think we will fit this resolution here Okay, we just started it very well It tells it's oberon version 5 initially it has this two paints I Forgot how to resize it Correctly, but what I can tell that we can for example, select this code here and Use middle button to execute it Then we should see the amount of free bytes for example, yeah or We can you select this one with the right button and Oh, yeah, show the modules that are loaded Where they are in memory or how much bytes actually they are you see So it's pretty friendly. I would say as a programmable basis for programmable editor for something Yeah, it's pretty extendable almost like small talk, but simpler Okay, so we can go back to the previous Yeah, I think I need to go back So you can try the demo it's interesting and Then we can go on with the presentation So that's how oberon system is structured. So these are the Pink are core modules So the inner system is I think Under two thousand lines of code Then there there are graphic user interface elements and below that I do not show application elements that are respectively large In the code size, but you can examine this there is also a book that describes it You can check all the changes in the oberon emulator and now the question How you think difficult it would be to make a computer that just supports this system so the I was expecting some very very minimal processor like this fourth machines and I was surprised. It is in a way minimal, but like minimal For a minimal system, it is quite featureful. So it has if you will look at it, this is the The modular diagram of the whole system that was implemented to host the oberon So the first is the risk five top references both the processor elements and Preferral interfaces, so we have the typical advantage of FPGA that we can implement all the peripheral URLs we want in FPGA along with the computing elements and These are just elements of the processor. So this is Very simple risk machine with I think 16 registers some of them are reused as stack registers or program counter or Reserved for some kind of global pointer to the constants But you still have I think 11 registers that are usable in the program code, which is good enough It's way better than The x86 it's more like x664 AMD64 architecture It's 32-bit because like if you have just one make RAM it's probably sufficient and if you Read mostly about the processors that are minimal you see that maybe they have multiplier and maybe But this processor besides the main control core has multiplier divider for integers Also flow full floating point operations other multiplier and divider It still fits with an approximately 2,000 lines of code of very low code So it's pretty pretty economic way of describing something basic processing unit That can already do all the arithmetic operations that are most essential because building over it Some transcendent on functions is not that difficult really And then the peripherals below are basically RS 232. So serial interface. That's pretty standard mouse and ps2 keyboard also appear pretty standard SPI for driving the SD card and The file system. So that's the storage instead of disk drives and so on. That's pretty modern pretty useful in the video controller Well, I can say this video controller is limited to one resolution thousand by seven hundred But I also played with this this kind of board. So unfortunately until Spartan 6 You cannot regulate the frequency of the monitor and you have only four digital clocks So Yeah, you would have at most for for resolutions for practical purpose, maybe eight So you have to fix on one so Later versions have tunable digital clock manager. So you can work around that But the way the VGA or visual signal generation works you need to adopt in VGA standard the Clock frequency for pixels To your resolution. So there is no way around it So that that is pretty pretty practical constraint just it's low powered or old FPGA board because CSI clone 4 Approximately the same price has regulation of digital clock managers So I was very encouraged so you can have full like C compatible or Pascal compatible or Oberon Compatible machine because in the terms of the programming model. This is standard C programming model, really All the flow plus floating point So you don't need to implement it. It's usually the most the slowest part and it's small Okay, so Now I Did dive into code? So I will show you what I've seen So I do load it the code for the project Oberon from project WWW project Oberon call I unpacked it so first Project Maybe here and we zoom it so that it's more up and yeah So most of these things are actually elements of operating system like up tools graph inner operating system Or is the compiler net is networking stack outer is the outer operating system? Including some of the graphical interface And besides that there is risk V or risk 5v. So there is S3 risk install This is like the self-contained way of installing it to into FPGA the risk 5 very log which is actually the code for the processor and W32 I'm I didn't check but I think it's some way of hosting the simulation So I just unpacked the very long And checked it what is so there is Some kind of programmable memory. It's just four kilobytes Maybe microcode. I'm not sure But here is the meat. So how complex it is it is to provide the floating point unit and so on Okay, let's check it with tools I think I have here slot count That usually check the complexity of the code. Oh, I cannot bring this Unfortunately, okay, so maybe just let's compute the number of lines of code Of lines generally in the module. So you see these module are pretty small Yes, exactly It's actually under thousand if you just look at the meat and Let's see a video controller Well, not so nice thing is that you could have more comments here. So it's not a bookie But I will talk about it in a minute But this is like standard very long basically is trick of to counter implementation of controller that basically takes the bit from the RAM and Generates the signal for this particular piece. So it's mono Chrome monitor Because of the memory string basically one make is not really a lot for graphics memory so for frame buffer and That's all so it uses one clock and To count that does the standard implementation. I think I could have already shown it to you in in the clash in Haskell Yeah, and I will probably show it on Wednesday as a demo by basically doing a demo How to make your first FPGA project? It's very simple Let's look at the things that seem more complicated. So let's see at FP adder Hmm Also doesn't look very complicated. You basically have two Inputs the clock input and so on check whether it actually does something and Whether it stalls because it uses too much time it's pretty standard and This doesn't look like too complicated code for for computing It is only it had a comment. So about comment that it was really really unhappy You could structure is a little bit better. I guess Okay, now risk 5v This is the control unit So it also basically checks the operation code Here and depending of it decides what to do. It's also pretty standard very low code So so like if it's 800 and maybe I should implement it in Haskell and check out how it will work Yeah, and host a burn on on clash and on on my latest story, which is cycle 4. Why not? That's that's that doesn't look like a complex complex project. I should be able to do it next month But without comments this kind of reversing engineering, you know, it can be actually one first month or first two months Just checking out But okay, then I looked for the hins in the book Because there is a book on it No, no, no, I just checked there are just two chapters about risk system about the processor and Here if you look carefully, it's actually As far as I can tell almost littered code. So there is a lot of description what happens. Maybe sometimes Redundant maybe sometimes not but it is there. So you are not wasting time, you know Like by recovering comments There are even diagrams nice So we have it like 800 lines of code plus nice book and nice diagrams quite exhaustive explanation of the mnemonics in the assembly How it works with the registers By the way, it works on 25 megahertz clock on 25 megahertz Frequency, so it doesn't really multiply a lot I think you can make it more efficient this recap But that's for the people that are interested in like making the FPGAs run a bit faster There is even explanation how to do floating for inter-earthmeting or some kind of logical operations I'd say That should be good enough, you know, if you know very well to to construct the machine by yourself And also this fragment of the book is like a chapter and it's 20 pages Actually, there are two chapters So I mean I have at least entertainment for the next month Doing a similar thing and hosting over on on clash Yeah, so I for me this paper has convinced me that I should definitely go into the book at least this fragment and go further so that I check how complex is It to make a real processor even without cash when with that real pipeline And they're not that much cheating because you need to make arithmetic logical unit first anyway And then stall and pipelining we can talk about it at some point of time But yeah, that's not that critical. That's not that difficult if you think about Optimizing it is that maybe just making it so these are my my My final thought so I I still prefer tech book because with tech book I always have the comments next to get the code and here you either have a book or the code So the book is pdf very nice, but the code is no comment. So or barely any comments so I would prefer literate code but in length and Explanation exhaustiveness I would say it's one of the best introduction to make your own processor ever So it's way better in many regards than one of some of these minimal instruction set processors Where people do a lot of optimization there a lot of trick, but they will never go to floating point unit here So that's this kind of practical problem is skipped over and The simpler structure and you then can build a whole operating system over it, which is great The only thing I think I miss is real multi-threading, but well, nobody's perfect I mean this was just like a one megabyte of memory system By the way after loading all the modules of the basic modules with the compiler. I think it takes only a hundred kilobytes So it's kind of Comfortable as this level Maybe without memory management unit Yeah No nine K lines of code is Oberon code That's runs on the processor this processor is as we checked just now. It's actually better below 1000 Yeah They basically unpacked the archive of very low code There looks less self-contained Because it even includes the the the memory which normally you have to have some kind of starting memory But is it just for the machine hardware part or 100 K lines of code 500 So I can tell you there are minimal data flow processors in class in Haskell that are like 200 There are also between 200 and 2000 lines of code Very efficient force machines like J1 That basically do everything like integer alzmatics basic logical operation, maybe not floating point and They are CPUs that that's enough to model it. So in a way Hardware is maybe somewhat more difficult to design, but these things that you actually want to design in hardware May take less Code on the executable where you spend most of your time is simulation and debugging So most the most debugging pipelines include this set up simulation rigor Check that your simulation is is good enough Possibly co-simulate or make simulation of your software environment along with hardware check that It proceeds through the states in an appropriate way Yeah, so that I didn't talk about simulator it's actually and those thing is provided So normally you would have to have possibly Another that that amount of code as a simulator But if you have executable operating system on which you can check that it runs That also may serve as as a reference test because you know when when it stops and when it breaks