 Last time we built this hardware to do division for us. Then we walked through this example to see how this hardware handled the problem. But, rather like with our multiplication hardware, this is not the most efficient algorithm. It turns out there's a couple of pretty easy changes we can make to this hardware to make it a little more efficient. So we're going to be making a couple of changes that are pretty similar to what we did for multiplication actually. First thing that I'll do is I'll point out that we can make a similar change to the divisor and the dividend as we did with the multiplication hardware. With our algorithm over here, we were shifting the divisor every time. Each cycle through we shift the divisor one more time over. But we can equally see that as shifting our running dividend one bit to the left every time. So we can go ahead and do that. Change the divisor to just being 32 bits instead of 64. The dividend can then remain 64 bits. This will also mean that I'll only need a 32-bit adder here. I'm still going to have a control unit here, and it's still going to do about the same thing it did before. It will decide whether I should update my dividend remainder register as well as what bit do I shift into my quotient register. So here's our updated hardware. Really all we've done is we've decided that we're going to move our dividend remainder register to the left instead of moving our divisor register to the right. The results now we only need 32 bits for our divisor, and we only have a 32-bit adder now. So we'll go ahead and walk through our example again and see how this hardware is working. Make sure it still does what we expected to do. So I'm going to start by putting my values in my registers. I still have six bits for my divisor. I'll be working with 12 bits down here for my dividend remainder register, and I'll have six bits in my quotient. I'll initialize my quotient to zero, even though there's nothing meaningful in there. So here's my initial state. I've got my divisor and my dividend in the registers ready to go. So the first cycle, I'm going to try to do some subtraction. I have zero minus 11. This is obviously going to be negative, so my control unit will say no, you can't do that. Shift in a zero, shift your dividend one bit to the left. So this is what my hardware looks like at the beginning of the second cycle. Now I have something potentially useful in the left-hand side of my dividend register. So I might be able to do my subtraction, but 11 is still larger than 1, so that's not going to work out. Instead, I'll shift in a zero on the right-hand side of my quotient and shift my dividend register one bit to the left. Now I have two interesting bits in my dividend register, but 10 is still smaller than 11. So when I do my subtraction, the result will be negative, and I will shift a zero in on the right-hand side of my quotient and just shift the dividend one more bit to the left. So when I get to the fourth cycle, I finally have something interesting I can do. 101 is finally larger than 11, just like I've got up here. So when I do 101 minus 11, I expect to get 10 out. So the left-hand side of my dividend register will be set to 10, just like I have here, but I'll still have this 100 part that's hanging around the second half of the dividend register. This time, because I can do my subtraction, I'll get to shift in a one on the right-hand side of the quotient, and then I'll shift the rest of the bits in my dividend remainder register one bit to the left. So this is what my hardware will look like at the beginning of the fifth cycle. I now have 101 in my dividend remainder register. My divisor is still unchanged. My quotient now has a one in it. Again, I can do 101 minus 11, and that will give me 10 as it did over here. So I'll put 10 in as the result in the left-hand side of my dividend remainder register. Since I was able to do that subtraction, I'll want to shift in a one on the right-hand side of my quotient register. And then I can shift everything in my dividend remainder register one more bit to the left. So in the sixth cycle, I have 100 in my dividend remainder register and 11 in my divisor. This time I'll be able to do the subtraction again, just like over here, and I'll end up with a result of one. So I will put one in my dividend remainder register. I'll shift in another one since I did the subtraction, and then I'll be able to shift all of the bits in my dividend remainder register one bit to the left, so my one will move from this position to this one. Now I've reached the last cycle of my algorithm. I have 10 in my dividend remainder register and 11 in my divisor. 11 is larger than 10, so when I do the subtraction, I'll get a negative number. That means that what I've got down here in the left-hand side of my dividend remainder register is, in fact, the remainder. That is the 10 that we get at the very end. I'll need to shift a zero into my quotient register, indicating that I couldn't do the subtraction this cycle, but then I'll be done. My quotient will have 1110, my remainder will have 10, and that's what I expect to see over here. So there we go. You might notice that I didn't shift the dividend remainder register at the very end. If I'd shifted it again, then I would have 100 for my remainder when I really just want 10. So I have to remember not to shift the dividend remainder register in the last cycle. Otherwise, this has given us what we expect, but rather like what we saw with the multiplication hardware, it turns out we can be a little more efficient with this. At the end of our algorithm, we have this block of 32 bits over here in our dividend remainder register that aren't being useful. They had the useful stuff before, but we gradually shifted stuff in and it became less and less useful to the point where, at the end, it's just got all zeros in it. So rather like what we did with the multiplication algorithm, we could use this for the quotient field. So instead of shifting bits into a quotient register, we could shift them into the right-hand side of our dividend remainder register. This will work great up until that last cycle where you notice that we still needed to shift something into the quotient register, but we didn't want to shift the dividend remainder register. If we shifted the remainder register again, we'd have 100 for our remainder and then our quotient would fit in. So if we do this, then we'd be shifting something into the quotient segment of the register and we'd want to either not shift the left-hand side or shift the left-hand side back one bit at the end. Either of those would work. They're both a little odd, but they'll do pretty much the same thing. But that would allow us to get rid of this extra 32-bit register then like what we saw with the multiplication algorithm, we'd have one 64-bit block of registers that's actually being used to do everything for us. Then we'll only need one other register to hold our divisor and our ALU will be just 32 bits instead of 64. This would provide us some improvement over our original algorithm. But again, if I want something even better, I'm going to have to find different ways to do my division algorithm that might not derive directly from the algorithm I'm used to.