 This time we're going to start building an adder. But in contrast to the way we built the multiplexer, this time we're going to take a more formal approach to it. We're going to look at what our adder would take as input and what it should produce as output and then try to find some gates that will be logically equivalent to that result. That way we can actually go implement that set of gates and have a working adder. So we'll start with something simple. I'll have two inputs say A and B and if I add them together I will get A plus B. So I'll start with this truth table. I will fill in all of the possible values for A and B. Now I can go through and do addition here. 0 plus 0 is 0. 0 plus 1 is 1. 1 plus 0 is 1. And 1 plus 1 will be 10 in binary. So you'll notice I have two separate input bits and I get a result of two bits as my output. So I'm going to need to handle these separately. I'm going to have to find one set of gates that can produce say the ones position result and another that can produce the tens position result. So if I look at this I might notice that hey, this line looks really simple. It's all zeros except for the last bit which is 1 and that kind of looks like an AND gate. So if I do A and B 0 and 0 is 0. 0 and 1 is 0. 1 and 0 is 0. 1 and 1 is 1. So an AND gate is logically equivalent to the carry bit from my addition, my tens position. So great. I can now calculate my tens position using just one gate. But I also need this ones position. This one is perhaps a little less obvious but turns out we can also do this with an XOR gate. An XOR gate is true when the two inputs are different. So when they're the same, either all zeros or all ones, then the XOR gate is false. So the result is true if exactly one of the inputs is true. So 0 XOR 0 is 0. 0 XOR 1 is 1. 1 XOR 0 is 1. And 1 XOR 1 is 0. So this matches up with the ones position. So those two are logically equivalent. That means that I can build this adder just using two gates. I will have an AND gate and an XOR gate. I'll have an A bit and a B bit. And both of those will go to each of these logic gates. The AND gate will tell me what my carry out is. And the XOR gate will tell me what my result bit is. So this could be really useful. I'm getting two bits as input. I get a result with a carry. I should be able to support multiple bits for each of these. Because all I need to do is add in this carry bit. And then I can just do the same addition for the next column. Except that I've built this hardware in such a way that it doesn't have a carry in. There's no place to have an extra bit for this carry outline to connect to. So I'm going to have to go back through and redesign this so that it can take three inputs instead of just two.