 Welcome to all of you, myself Ravindra Samant from Department of Electronics Engineering, Vulturen Institute of Technology, Solapur. So in this session, we will discuss ARM7 data processing instructions. At the end of this session, students will be able to demonstrate the ARM data processing instructions and students can also write different ARM programs using the different data processing instructions. Outline of this session, the first features of ARM instruction set, the format for data processing instruction and actual the data processing instructions. The major features of ARM instruction set are like this. In ARM7, all the instructions are of 32-bit long and most of the instructions execute in a single cycle because the length of most of the instruction is same. Now, this feature helps to implement the pipeline architecture. All the ARM instruction can execute conditionally. So we can write the condition in the instruction itself. And ARM instruction set is based on the load store architecture. Means while processing the data, the data must be kept in the registers. The memory operations are not possible. Now all these ARM instructions are classified in six different groups. The data processing instruction group in which all the instructions which performs operation or some process on the data. Group of branch instructions is used to change the sequence of execution of the program. In status register transfer instructions used to read and write the data from the status register. The load and store instructions are used to load the data from the memory into the register and to store the data from the register into the memory. And co-processor instructions are also there and to interrupt the ARM core, the exception instructions are also provided. So first we will see what are the different data processing instructions defined in ARM 7. So as far as the instruction format is concerned, all the instructions are of 32-bit long and these 32-bits are divided in various fields. So for the data processing instructions, the condition is placed from bit 28 to 31. The operation to be performed, that is the upcode of the instruction is put from bit 20 to 27. Then bit 16 to 19 is defining the source operand 1, bit 12 to 15 these are used to define the destination register where the result of the operation will be get stored and lower 4-bits 0 to 3 these bits are specifying the source operand 2. Now in data processing instructions, the different condition we can write in the instructions and these conditions are shown here. For example, EQ, if you are writing the instruction with prefix EQ, then that instruction will execute only when the zero flag is set. If we are using the condition NE that is not equal, then the instruction will execute when the zero flag is reset and some other conditions are also there. That means we can execute these data processing instructions on conditioning. Now these data processing instructions contains the different operations like the arithmetic operations, comparison operations, logical operations and they can also use to move the data between the registers. So first category of the operation is arithmetic operations. So syntax used for these arithmetic instructions are like, first there is need to specify operation to be performed, then the condition, then the S-bit, if this S-bit is one then status register will get affected, if S-bit is not mentioned then the status register does not get affected. Then the destination register source operand 1 that is RN and the operand 2. And in arms 7, the different arithmetic operations are ADD, that is the ADC stands for ADD with carry, SUB is used for the standard subtraction and SBC is used for subtraction by considering the carry bit. So say for example the first instruction is written here add r0, r1, r2. So the value in r1 will get added into the value in r2 and the result will gets reflected in r0 register. Similarly for the add with carry instruction r1 plus r2 plus the status of the carry bit will be added and the result will get stored in r0 register. That means for the subtraction for subtraction the operand 2 always gets subtracting from the operand 1 that will be the r2 will get subtracted from r1 register and the result will be kept in r0 register. Some instructions are defined for reverse subtract. So rsb r0, r1, r2 this instruction now subtracts the operand 1 from operand 2. So r2 minus r1 will takes place and the result will be get stored in r0. Similarly rsc for reverse subtract with the carry bit. Now you pause the video think and write the instruction to add r0 and r1 unconditionally and second to add r0 and r1 only when the 0 flag is set. Now to add r0 and r1 unconditionally we can write the instruction like this add r2, r0, r1 so r0 and r1 will gets added to each other and the result will be get stored in r2. Now to add r0 and r1 when z is equal to 1 write the instruction add eq now here eq is the condition now this eq condition will execute this instruction only when the 0 flag is set. So r0 plus r1 will takes place only when 0 flag is set. For arithmetic instructions next group is called the comparison instructions. Comparison instructions only update the condition flags that is why there is no need to set the sbit and the syntax for comparison instruction is first operation condition source operand 1 and operand 2. So comparison instructions can be used for different comparison like for the equality for less than for greater than and all these things. The different comparison instructions are the cmp which will compare operand 1 and operand 2 by subtracting operand 2 from operand 1 and result of this subtraction will not gets right anywhere only depending upon the status of the result of this operation the different conditional flags will be set or reset. Now cmn instructions it will take the negative of operand 2 and that will be gets add with the operand 1. And depending on the status of the result the different flags will be set. Now these flags like negative flag, 0 flag, carry flag, overflow flag all these conditional flags are located in the status register. Now the test comparison will perform the and operation then the teq comparison will perform the xr operation on operand 1 and operand 2. So as an example the two instructions are shown here compare r0 comma r1 so it will compute r0 minus r1 and accordingly the flags will be gets affected. cmn r0 r1 compute r0 plus r1 because the cmn instruction takes the negative of r1 and according to the status of the result the different conditional flags will be set or reset. Next are the logical instructions and the syntax is first there is need to specify the operation to be performed then the condition then the s bit to decide whether flag should change or not then destination register source operand 1 register and the second operand and different logical instructions in arm 7 r the first one is and which will perform the and operation between operand 1 and operand 2 then ur for xr operations orr is used to perform the orr operation on source operand 1 and operand 2 and the fourth one is bit clear instructions where the and operation will taking place between the operand 1 and negative of operand 2. So the references taken for this presentations are like this arm system developers guide bias loss arm system on cheap architecture by stew furber and the datasheet for arm 7 td mi.