 Hi, my name is Sarah and welcome to this video on using Solid-State Technology for INRUS Current Limitation. The focus of our video is our brand new evaluation board, the STAval-STR002V1. Let's start by looking generally at INRUS Current when you start an AC-DC converter. At the startup phase, the converter has a surge current that can be 10 times higher than the nominal current, as you can see on the graph, which can of course damage components in the circuit. So each AC-DC converter should comply with the IEC 610033 standard that specifies the requirements to limit the RMS current at the startup phase of the application. The STAval-STR002V1 evaluation board implements an advanced design for INRUS Current Limitation using STAV Conductor Technology. This board is paired with the Nucleo F-03R8 development board to drive the Current Limitation board. Both boards are available on ac.com and from major distributors. Please remember that this demonstration involves high voltages and you must refer to the setup and safety instructions in user manual UM2948 before you try this system in your own lab. Now let's get started. First, we connect the AC line and neutral to the correct pins on the evaluation boards. Then we connect the load in our test. The load consists of a resistance and capacitor to represent those of 1 kW power supply. We then connect the evaluation board to the Nucleo development board, which provides the enable signal for the STR driver. The microcontroller on the Nucleo board must be loaded with the firmware to provide the driving signal according to the application and load you want to test. We complete the setup by connecting the ground pin of the Nucleo to the ground pin of the evaluation board and then powering the Nucleo through an isolated USB power supply. We use a high voltage differential probe on the enable input to visualize the driving signal of the thyristor on the board. Another high voltage differential probe is used to visualize VAC and the current probe is used on the AC line to monitor the line current during startup. This board can be used in two different ways that we will be presenting, the bypass topology as well as the smart inrush topology. In bypass topology, current flows through the NTC during the inrush current limitation phase. This innovative design only requires one driving signal from the MCU, so when the capacitive load is charged, the MCU raises the enable signal high and the STRs bypass the NTC. The STR driver configuration with triac and two small diodes ensures correct current distribution to the thyristor. Thanks to this driver, there is no need to sense the VAC polarity as one thyristor is used at each health period. Our oscilloscope shows the power loss across the NTC during the initial current limitation phase. While capacitor is being charged, the enable signal remains low and the gates of the thyristor is not driven. Once the capacitor is charged, the enable signal goes high and the NTC is bypassed as gate driving begins. The advantages of this method include the fact that the STR driver reference is common to ground DC bus so no insulation required between the MCU and the STR driver. Only a single MCU input without current buffer is required. Also, higher reliability than mechanical bypass relays with the same power efficiency is guaranteed. Now, let's examine the innovative smart inrush topology. For this topology, we remove the NTC from the evaluation board and we use a pulse DC signal to control the enable pin. Inrush current limitation in this topology requires a feedback circuit to determine the zero voltage crossing points of the AC main. The circuit shown here presents one way to achieve this and it is connected to a GPO pin of the NTC. The circuit generates a square signal synchronized with the AC mains voltage and the microcontroller stores the frequency of the zero crossing of the AC main. Now that we can sense the zero voltage crossing frequency, we control the STR by augmenting the delta T at each half AC line cycle. We can set the delta T via software according to the load. Every half period we increment the gate pulse duration. The signal is represented in yellow. Inrush current mainly depends on the converter capacitor and the load. And we set the delta T accordingly. The red signal represents the smooth DC charging things to the inrush current limitation. The line current is in green and the AC voltage is in blue. The advantages of this topology include lower power consumption than bypass method during the inrush current limitation phase. Also, only a single MCU pin is required. It is a full solid state solution with reduced bill of material as no NTC or relays are required. And it is a software-based inrush current limitation solution with accurate and easy current limitation adjustment. And the system startup speed can be configured by the user. To sum it up, our evaluation setup shows how designer can use gyrosphere instead of passive components and aerial extra-mechanical relays to manage inrush currents. The two different topologies you can try with the board offer high reliability in the series of other benefits that will help you effectively manage inrush current limitation in your application. Our Evolution board STVL-SER002V1 allows up to 1kW, but you can raise the power level by using higher current rated devices. The product used in this board is TN-1605H, which is also available in 800V. This latter is a part of the 800V Tyrusur family that we are working on developing even more currently, available in SMD and through-hole packages. For more information on the TN-1605H high-temperature STR Tyrusur featured on this board and all our products, please visit our products page on sc.com. You can also visit our dedicated page for the Evolution board and be sure to download the EN4606 application notes for detailed information on inrush current limitation driving strategies.