 We are continuing with our small signal model before we start amplifier. Typically as we have so far solved equations, the equivalent circuit of a MOS transistor is shown here. This is your gate, this is your drain, this is for common source, this is your source which may or may not be grounded in some cases it may be and then there is a bulk and we believe that all capacitances are right now not relevant in the low frequency range. Essentially it means 1 upon omega c is such that it opens circuits everywhere. So assuming that you can see there is a input voltage of Vgs which is equal to input voltage of Vn and since gate has no connection resistively to the source, this is open and therefore Vn is equal to Vgs. At the output side and the drain side you have the current source which is gm times Vgs or gm times Vn plus and there is another current source which is due to the VSB substrate bias which will give me a gmb VSB term shunted by R0 as the output resistance. Now if this is the low frequency model and in many cases since we are interested in the MOSFETs or MOS circuits bandwidth which is the frequency at which gain is at least reasonably constant for those frequencies will require capacitances and this is an equivalent circuit which is called high frequency small signal models. This is most important all this analysis always has been done for small signals and the issue we shall raise little later if there is not enough small signal words satisfied what do we do that is one of the major issues right now in most due devices and circuits. You can see from here source has small resistance RS dash which is the source region resistance N plus region resistance RS dash similarly there is a drain region resistance which is R e dash the rest part is similar this then there is a capacitance across the Cgs gate to source capacitance which we declared as Vgs and there is a capacitance between drain and gate which we call Cgd then at the output side there is a gm Vgs as the one current source gmb Vgsb as the another current same as this plus and they are 0 so they are same now what is difference is there is a capacitance between gate and bulk sometime it gets screened sometime may not get screened but we should show it in case it screened we just remove that and there is a resistance which is associated for substrate okay there is called RSV and there is a resistance between source and bulk CSB then there is a capacitance between drain and bulk CDB and there is a resistance of the drain side which is Rdb now these these are essentially equivalent of a diode you know R into parallel C is what the RC combination so these are those resistances are normally they are very high so open circuited but as a logic we must put them and then say okay they are large small and many remove them out okay but this is total small signal high frequency equivalent model of a MOS transistor and in case you want to solve this the easiest way is to figure out the values of each of them and there are number of loops or number of nodes whichever way you want to solve Kirchhoff law you will be able to solve V0 versus Vn relation that is what we are looking for at the end gain V0 by Vn since I have enough nodes or enough loops I can solve as many unknowns as many nodes or as many and as many meshes therefore you can always solve this circuit will give a small example to show how do we solve that in all analysis please take from me that this may be a very good this at the end of the day we will not solve actually all the circuit by hand but to start something on CAD we need some hand calculations so in that hand calculations or more modern can be simplified because you are only trying to get the first guess okay in that case all these detailed values may not be required in many hand calculations though there can be some error in hand calculation I will list them out what happens if you do not take care enough in case of designs however this is the model which we will be using for a MOS transistor and this is shown common source but it does not matter you can tilt any angle to make it common drain or common gate whichever way the circuit remains or the equivalent circuit remains same let us say it is N channel all this device unless said otherwise devices are N channels if there is a CMOS part there we will explain that CMOS again okay there is a resistance associated with this region and there is a resistance associated with this region after all there is a semiconductor regions and they may have heavily doped so the resistance may be very small less than 5 ohms or 3 ohms sometimes depends on the area now that is where the problem started why we started looking into it if you see a roll by a as the R you may actually reduce row because of doping higher doping but this area also is going down because you are scaling so if you scale down this area may not be as what it was earlier may be 100 times 1000 times lower so essentially R may not be as small compared to what we thought in the long channel devices so please take it that why this new models are added these terms because they may be dominant term not never dominant but they may actually change the pole positions or zero positions and therefore one must take care in solving any case of law on the any circuit is that clear in normal case we neglect them we say it is few ohms the others are kilo ohms forget it if they are in series but if they are in shunting then they will be the one who will matter most of it so one has to take care of all this in writing as circuit requires comes will remove the terms which are not relevant in evaluation is that okay and plus this is like a three dimensional device a three dimensional register okay so this is a bar of semiconductor which will have some resistance rule by okay so this is what we keep saying you that this is needed because in case you are using accuracy then you may need them also okay so another method of solving the same amplifiers which I earlier did this is my method which I always say that you know you can look at the solving any equations or solving any circuit by very different small signal analysis not really very different but interesting way so I just always want to show you how do I can solve other ways let us say this is a common source amplifier which is biased by a constant current biasing which is constant current biasing is IDS is constant fixed current source right now I also assume it is a good ideal current source what does that mean the output resistance of that current source is infinite okay in real life if I replace this by P channel device as a current source it is already R0 will actually come into picture is that correct right now it is assumed constant current source ideal in reality they may have to be modified for the real R0 comes there so the analysis is I just this is a technique and there is nothing great about these solutions which otherwise we will get we know this current IDS flowing in this transistor is a function of Vg and function of Vd which is a standard MOS transistor theory I can use my partial differential kind of a partial differential of this to equate some terms I say okay change in IDS must be equal to red I mean delta IDS by Vg into delta step similarly for the Vd delta IDS by delta Vd into capital delta which is a step function we know by definition change in drain current with gate voltage is essentially change in drain current with Vd drain voltage is essentially G0 okay so we rewrite delta IDS is Gm delta Vg plus G0 delta Vg if I convert into differential forms it is delta divi IDS is Gm dVg plus G0 dVg in our case change in Vg is essentially the input signal AC signal so GA Vn is dVg V0 is dVd which is the output AC signal which is nothing but change in the drain voltage is because of the small AC signal which is applied at the input is that okay this is as I say many people believe that I know this is better way of explaining that 2 port parameters which you have must have learned or you must be learning now somewhere S parameter AV parameter H parameter how do we get parameters for any transformations this is how we get it okay so that is the technique I am showing you how do I get 2 port network solutions this is how one can try any 2 ports or any inputs in fact longer difficulty in solving. So now I have equation delta IDS is del Gm del Vn plus G0 dVd okay so here is that expression which will appear I put it now so I get delta IDS is Gm Vn plus G0 V0 as amplifier is biased in constant current source there is no change in current okay so G delta IDS is 0 which is equal to Gm Vn plus G0 V0 if I take a ratio of V0 by Vn it is minus Gm by G0 G0 is the output conductance which is 1 upon R0 so it is minus Gm that is the expression we derived this is called intrinsic gain of a MOS amplifier why it is intrinsic no load resistance was used instead of load we have constant current source with infinite output resistance for that is that clear so this is Gm times R0 okay now if we take the first order model using an RD now instead of constant current source the and let us say there is a series resistance with the source and then and let us say some capacitance Cgs is taken care and right now assume that Cgd is open circuiting at a frequency of my interest then I say Vn is Rg equivalence or there is a Cgs which is holding the Vgs voltage then it is Gm times Vgs R0 shunted by Rg so this is and in all these cases VSB is taken 0 that is source and bulk are grounded unless specified do not use those terms if I specify something or indirectly specifying it look for that value and substitute in GMB VSB terms and solve for it okay what is that you have to do is just add many times 0.6 1.1 plus 0.6 Gm is going up as a Gmb equivalence of that so you can need not solve many times just add instead of 1 put 1.6 and you can get rid of much of the solving this is for high end calculation so this much assumptions may not be very absurd but in real life you may have to calculate actual values given doping given everything and then figure out what is the Gmb values you get okay so if this is my equivalent circuit why I am doing it I want to give some numbers which is very interesting in designs and that is why I am trying to look for them is it okay this is equivalent circuit there is nothing great all that I put 2 terms here and additional term Rd here so this is still low frequency that Cgd is open circuiting 1 upon omega Cgd is still infinite infinite enough to neglect open it for the transfer function from output to input which is the gain function AVS which then can be written as Gm R0 parallel Rd I should have put a minus sign here because if face opposite now we can use some derived values for Gm Cgs R0 which we already derived in our device theory earlier we said Gm is 2 Ids by Vov which is Vgs minus Vt the excess voltage so those who have taken a course of my analog like should be is there and many others there is a difference in approach when I come to design a course the basic I cannot change I mean analog amplifier will give me gains but how do I derive and how do I am actually get designed for it is what I am now showing so it is nothing extraordinarily different from what we learnt in second year but even then it is worth looking at it the Cgs value we calculated other rate is two-third W by L C ox in saturation if you wish you can use once a while C ox term as well two-third can be made one but if you want to keep and I do keep sometimes so I am keeping it but as I say if someone puts it this is nothing very absurd will happen R0 is 1 upon lambda Ids which is the current then AVS and AV0 is defined as sorry it is minus everywhere is Gm parallel R0 RD you can see from here sorry I will just put it and come back the current in this parallel resistance of R0 RD is what Gm Vgs current is flowing through so minus Gm Vgs into R0 parallel RD is my V0 so that is what exactly is Gm R0 RD is my DC gain and if you say RD is much smaller than R0 it is minus Gm RD if R0 is much smaller than RD it is Gm R0 which case this will occur the second first one is normal resistive loads the second is the case when the biasing is constant current source in that case R0 will be RD will be much larger compared to this and in that case probably this term can be that is why say intrinsic so once we do this so what is the trick I am trying to show you I am trying to derive some expressions for Gm Ids and Gm Vgs Gm by Vgs and these are the two expressions I am going to use in my design so I want to get those expressions from what I am writing I normally use a term which I will show you later R0 parallel RD small R0 D which is R0 parallel RD and then you can replace it by either R0 or RD depends on the values or you do not you solve it and automatically one of the term may go if it is much smaller or much higher is it okay so having done this if ROD is R0 as I said in that case AV0 is minus Gm R0 then I can write R0 by AV0 is 1 upon Gm from this expression 1 upon Gm magnitude wise then I say Gm by Ids I know is 2 by Vov I know Gm by Cgs is to 3 by 2 I had derived last time uo V by L square then these two terms I will call them as figure of merit figure of merit for analog designers I repeat which are the two terms I am going to design for Gm by Ids and Gm by Cgs please take it this Gm by Cgs is essentially FT and we will see what that term is okay that is why it is called figure of merit Gm Ids is a figure of merit because it decides what it decides some with the power it decides the bandwidth and therefore the gain is well so that is the figure of merit okay so what is Gm by Ids and what is Gm by Cgs will decide every aspect of an amplifier so these two terms I call it as figure of merit okay so what is the major decision for any analog designer is to choose proper Vov you can see expression everywhere you are only seeing Vov so if you can choose proper Vov so that the power dissipation the gain and the bandwidth specs are met is that correct so what is the designer spec Vov is that clear Vgs- Vt how much excess voltage you want to keep for the bias requirements is all that matters in decision of making power dissipations gain as well as the bandwidth is that correct somehow though I am keep telling you all this and then I say I do not like this Vov term very much and I will revert back to saying I will not use this but initially I will say okay Vov is a great term which allows me to design every spec which I am really looking for the choice of Vov typically what do you expect the value of Vov should be in a smaller technologies now anywhere any idea let us say I am working on 1 volt supply what should be typical Vgs- Vt will be 0.2 volts so typically it will be around 200 millivolts is kind of Vov values you will have to choose so one technique is fix Vov do something or fix something else and let very Vov okay so we are we are trying to design based on these features okay so is that clear so Vov in my opinion is one of the major factor which decides the circuit performance what are the three parameters I am looking for an amplifier again the power dissipation and the bandwidth one term which I have not said maybe I will have separate chapter to that a separate talk lot many on that which is the noise part we are assuming as if everything is nice for us in reality the killing part will come from the noise part and also temperature part which we assume as if everything is fine all models are fitting into all our requirements which may not be really true okay so the whole why spice or why everything is because all such variations analytically solving for all of them simultaneously becomes very clumsy not that impossible but very clumsy so it is much easier to go on a cat tool to solve that okay so if we see this expression which I wrote here okay AV01 plus SRGCG same expression which I had now HS is one of GMR0 RD1 plus this so if I now substitute gain function as AV01 plus SRGCGS RGCGS has a some kind of a time constant means it is a pole sitting right there okay now please remember if we have done our secondary course well which we I hope so all of you have done so if I plot frequency versus gain and I figure out for certain frequency till certain frequency gain is constant and then of course it goes down and goes down like this of course this is a 3 dB point where the gain falls by 0.7 but as a Bode's plot we can actually connect two slopes and this frequency from where the gain starts falling is our bandwidth up to which gain is constant. Now few things I must know I want to increase this A that means I am really looking for something like this in real life I want larger gain larger bandwidth and also in turn power should not go up that is what I am asking myself and then I will say A, then I will say what I can actually work with so that the third parameter may help me to get what I want so to I can get maybe third I will have to give up so within a given range if I can fit that then I say I have designed an amplifier is that okay so my worries are bandwidth gain what is this term essentially if I plot in dB then this is 0 dB unity gain so this is the point G gain into bandwidth that correct and this point actually we may like you can do like this you are many ways of moving this point okay so we will see how can you play games that means how many capacitors are around and where they sit where this poles positions can be changed to suit your requirements okay sometimes you additionally put capacitance sometimes you see to it the capacitance are not really strong there which your way we can adjust we will see to it what can be done is that okay so design means given aspects how do you play with so we have already said that the gain bandwidth this RGCGS is related to bandwidth now because that is the only pole available to you so we therefore say in the case of circuit shown by me no CGD and no output capacitance the dominant pole or only pole available to US on upon RGCS and that is the one which will decide the bandwidth if we write now CGS as 2 3rd WL into C ox we can write also we know GM is mu C ox W by L into V O V we are derived this expression there from here I get I find out C ox from here and substitute in CGS what do I do from this GM expression I get C ox value and then I substitute in CGS value is that point what clear I use the second equation GM is C ox mu V O V evaluate a C ox something like this GM L by W V O V to the power minus 11 upon mu and then I play little game I say okay if you see carefully GM R0 or ROD whichever you say is the gain GM RO is the gain so gain by RO is GM so I replace GM by AV0 by RO parallel to ROD or you can keep one of them also into length RL by W which is the aspect ratio one upon V O V into one upon mu if I see very carefully now this W0 if I substitute back here now CGS I have calculated this expression long expression I substituted in my bandwidth terms 3 by 2 ROD by RG 1 upon AV0 mu upon L square into V O V this is the expression I get for my bandwidth why I did all this calculations I am looking for gain into bandwidth and I am also looking which term will actually vary for what I am looking for there are three terms there I will show you I will write down I will show you this if you finish this I will show you what I mean I repeat my worries are power gain bandwidth so I am trying to see expressions in a different form so that I will see which term likes a power which of the terms in power expression which will actually enhance the power or which will reduce then reduce the power but if I reduce this I will come back to the other expression see if that term varies here what will happen to the second expression which I use W for example so I keep writing expression for each which are of relevant for me and I keep playing games to see which term is dominating for me and when I can control is that design issue clear should be is that now you understood why second year to 4th year there is a issue here sometimes so the issues are that is the design part so please remember what why we have a separate course on analog design a VLSR design because there we only solve something okay and we say it is fine it comes like this now we are very given something how do I match it so this inverse process needs much thinking then because there are many possibilities which may do that which one is better but if you choose one then the other may hurt okay so where do we get hurt which terms are important is design okay so is that omega 0 term is clear so I write now same expression if I put it here you can see now W0 is 3 by 2 ROD by RG into 1 upon a normally these are specifications for the amplifiers gains are functions RG is external resistance of the source which is generally 50 ohms to 600 ohms depends on the source used ROD is normally RD if you are putting a resistor there that is something which you have fixed if you are put as a channel length somewhere you are fixing RO okay so this we say is essentially specs related first few terms 3 by 2 ROD by RG into 1 upon AV0 is a specs related the second term there is mu by L square this is not in my hand the technology people will say okay this is the best mobility I can give and this is the length of the technology node I have used 0.18 micron 0.13 micron 90 nanometer whichever technology L and mu is decided them we have no control whatsoever on them so this is whatever technology gives that is the spec for I mean you cannot change okay let us look at the power dissipation is IDS is the current power supplies VDD so the DC power dissipation is VDD times IDS if I substitute that IDS expression from the this I can rewrite please check it AV0 is related to GM please remember what is gain GM times ROD is that correct GM can be written in terms of what is that IDS by 2 IDS by VOV manipulate expression that is what I am keep telling I just manipulate few things so I get half VDD by ROD AV0 and now we observe if I want to reduce power dissipation what should I do this is all fixed we