 Hello dear learners, I am Antora Mohanto Borva, Assistant Professor, Department of Electronics, HBC School of Science and Technology. Today in this video class we will discuss about the combinational circuits. This unit belongs to the second block of digital techniques paper of first semester BCA program. This unit includes about the introduction of combinational logic circuits. Then we shall discuss some examples of combinational logic circuits like multiplexure and demultiplexure and codar and decoder. And then we shall discuss about the other and subtractor. So, first let us see what is combinational logic circuit? A combinational logic circuits includes inputs, then logic gates and outputs. The output is depend on the present inputs values and it does not have any memory and if there are n numbers of inputs then output will be 2 to the power n. Suppose this is a combinational logic circuits. It has n inputs and n numbers of outputs. So, if there are n numbers of inputs then the total combinations, possible combinations of inputs will be 2 to the power n combinations. And suppose n equal to 2 then total possible combinations will be 2 to the power 2 equal to 4. So, 4 numbers of inputs will be there and there will be m outputs. So, output is depends on the present inputs. Then let us see some examples of combinational circuits. Some examples of combinational logic circuits are multiplexure, demultiplexure, then encoder, decoder, then adder and subtractor. So, multiplexure and demultiplexure are the very important combinational circuits and let us first see what is multiplexure. So, multiplexure is a combinational circuit which accepts many inputs and it gives only one output. It is also known as many to one. So, multiplexure is also called as a data selector because it selects only one input out of several input signals to single output. So, first let us see what is multiplexure. Multiplexure it, this is the block diagram. It has n inputs and one output m numbers of control lines. So, what is the relation between input and the control line is n equal to 2 to the power m. That means, if number of input lines is 2 then number of control lines m will be 1 because 2 is equal to 2 to the power 1. So, m will be 1, this control line or we can say selector line it will be 1 when input is 2. Again if we consider input is 4 that means, 4 numbers of input signals apply to a multiplexure then number of control lines it will be 2 because 2 to the power 2 will be 4. So, similarly the some examples of multiplexures are 2 to 1 multiplexure then 4 to 1 multiplexure then 8 to 1 or 16 to 1 multiplexures. Here output is always 1. So, in multiplexure the selector inputs determine the outputs. So, in this case we check about the 4 to 1 multiplexure. So, first let us see the 4 to 1 multiplexure. So, now let us see the 4 to 1 multiplexure that means, 4 means there are 4 input lines and here we will use the 4 n gates. So, these are the outputs of the n gates here we add a OR gate. So, output is 1 as here the control line will be 2 suppose a and b are the control lines and the inputs are suppose data inputs d 0 these are the 4 inputs d 0 d 1 d 2 then d 3 and a and b are the control lines suppose a and b here a NOR gate is given. So, how we apply the inputs to these gates let us save it from the truth table suppose a b and output is y. So, for 2 bits the input combinations will be 0 0 0 1 1 0 then 1 1. So, first a and b is 0 0 that means, in the first gate this NOR gate is 0 then b is 0 this will be the input and the second case 0 1 that means, a is 0. So, from this line then b is 1. So, this line here both the inputs is 1 1 and we apply a NOR gate to make it a 0 input. Next combination is 1 and 0 that means, a is 1. So, here this is the line 1 then b is 0. So, it will be from the NOR gate and the fourth combination is 1 1 both inputs a and b are 1. So, from this line and this line and output is it when the inputs a and b is 0 the d 0 output is selected that means, the other 3 AND gates are disabled and the first AND gate is enabled. So, in the output of the OR gate it will be data 0 and for the second combination the output will be d 1 that means, the y is the value of d 1 input line then 1 0 it will be d 2 and for 1 1 combination output will be d 3. So, this is the truth table of 4 2 1 multiplexer and this is the logic circuit diagram for 4 2 1 multiplexer 4 means there will be 4 data inputs. So, we have to draw 4 AND gates and each data input is 4 input is applied to each AND gate and the selector line or the control lines will be 2. So, a AND b are the control line and we write the combinations for 2 inputs then accordingly we and given the this AND gates accepts the input combinations and output is that means, it selects only 1 input line at a time. So, this is about 1 2 sorry 4 2 1 multiplexer. So, multiplexers are used in various fields where multiple data need to be transmitted using single line. Some applications of multiplexers are communication system in telephone network, computer memory etc. Next we will see the demultiplector combinational circuit. In demultiplector it accepts only 1 input and it gives several outputs. So, demultiplector is also called 1 2 many. So, similar to the multiplexer the multiplexers can be 1 2 2 1 2 4 1 2 8 or 1 2 16 demultiplector. So, now let us say the logic circuits and truth table of demultiplector. This is a block diagram of demultiplector. It has one input signals and many output lines and m is the number of control lines. If the output line is n then the input control lines will be 2 to the power m. So, in case of 1 2 4 demultiplector that means output lines will be 4. So, the input control lines or the selection lines it will be 2. So, m is 2. Now, we say the logic diagram and the truth table of demultiplector 1 2 4. Since output is 4. So, there is 4 n gates suppose output is y 0 y 1 y 2 y 3 and 1 input that means suppose this is the d input d is data input and it applies to all the n gates. Then in case of 1 2 4 demultiplector there is 2 selection lines suppose a and b not gate is applied. So, let us first see the output truth table that is a b and 4 outputs. So, 4 outputs is y 0 y 1 y 2 and y 3. First combination is 0 0 then 0 1 1 0 then 1 1. So, when the input is 0 0 that means this 0 0 then the output this d is selected at the output of the first n gate. So, y 0 will be d here. So, what is the value is applied to the input that is reflect on the output of the first n gate and the other n gate are disabled and the rest of the output of the n gates are 0 0. For the second combination that is 0 1 here it is 0 then next is 1 then the output of y 1 takes the data input. So, d is here if d is 1 we can write here 1 1 and rest of the outputs are 0 0. For the third combination 1 0 that means a is 1 and b is 0 for this combination the output is reflected on the y 2 that is output of the third n gate. And the for last combination that is 1 1 1 1 the other 3 outputs is 0 here it is 0 and it is 1. So, this is the logic proof table of 1 2 4 d multiplexer. So, what is the value of input it reflects on the outputs for other cases it is 0. Similarly, same concept we can draw the 8 1 2 8 d multiplexer or 1 2 16 d multiplexer or we can draw the 1 2 2 d multiplexer. So, I have shown the 1 to 4 d multiplexer. So, now d multiplexer is used to connect a single source to multiple destinations. Some of the applications of d multiplexers are the communication system, arithmetic logic unit, serial to parallel converter. In the multiplexer receiver the output signals of multiplexer and converts them back to the original form of the data at the receiver end. Multiplexer and the multiplexer work together to carry out the process of transmission and reception of data in communication system. Next we shall see the encoder and decoder combinational circuit. Now we will see the encoder combinational logic circuits. Here the encoder is octal to binary encoder logic circuits we will see. Here if 2 2 d power n is the inputs then output will be n, n outputs. So, in the block diagram the block diagram of the encoder is like this. So, this is our encoder if 2 2 d power n inputs then n numbers of outputs. So, this 2 2 d power n into n encoder and here if this 2 2 d n is equal to 3 then 2 2 d power n is 8. So, this encoder will be 8 into 3 encoder, 3 output lines, 8 numbers of input lines. Encoder is generally used to encode the inputs, encode the informations. Now let us see the logic circuits and the truth table of 8 into 3 encoder. This encoder is just a opposite of decoder. First we will see the logic truth table, first we will see the truth table that is the inputs are 8 inputs. So, i 0, i 1, i 2, i 3, i 4, i 5, i 6, i 7 and outputs are given as po 0, po 1, po 2. So, here is po 0, po 1, po 2. So, first suppose the first input is high that means 1 is applied to the first input and the rest of the inputs are 0. So, in case of encoder at a time only 1 input is high. Then what will be the outputs? This output will be 0 0 0. Then for the next input 1 rest of the inputs are 0. Now this is a truth table of 8 into 3 encoder. Here what it is given that means at a time only 1 input signal is high and for the outputs will be similarly this are the outputs of the encoder. So, what we have seen the output o 0 that means first output is 1 when the i 4, i 5, i 6 and i 7 is 1. Then output o 0 that means first output is high and for the other cases the output is 0. Again the output second output that means o 1 what it is saying this output is high when the input i 1, then i 3 and i 6 and i 7 is high. So, the output equations can be written as o 0 equal to when o 0 is high when i 4, i 4 plus i 5 then i 6 and i 7. Then for the next output o 1 when this output is high first i 2 plus next is i 3 plus here for this combination i 6 and for the last combination it is i 7. And for o 2 it is 1 when i 1 is high next is 1 when i 3 is high plus next 1 i 5 is high and it is 1 when i 7 is high. So, this is the equations of output 3 outputs o 0 o 1 and o 2. Now, this is the truth table. Now, we draw the logic diagram of the 8 into 3 and put up here 3 outputs. So, these are the combinations. So, here they all are last to the inputs. So, we used 3 organs and in the 3 organs output is o 0 o 1 and o 2 and here one unable input that means to enable the cheap, cheap unable input is applied. And this unable input is applied to all the 3 organs. Now, for o 0 what are the inputs i 4, i 5, i 6 and i 7. So, here as i 0 is not when i 0 is high no one output is high. So, I have not given here i 0 I have started from i 1. So, for output o 0 this i 4, i 4 then i 5 and i 6 7. So, these are the inputs for o 0. Then for the second output o 1 what are the inputs i 1, i 3, i 6 and i 7, i 2 first is i 2. So, here it is i 2 then i 3, i 3, i 6 even then i 7. So, these are the i 7. So, 3 the 4 inputs then for o 2 combinations the input combinations are i 1, this is the i 1, i 1 then i 3 there already this drawn i 3, i 3, i 5, i 5 and i 7. So, i 7. So, this is the logic circuit for 8 into 3 encoder. So, I think it is clear now again I am repeating first you draw the truth table for 8 into 3 encoder there are 8 inputs. So, I have marked here i 1, i 0, 2, i 7 and 3 outputs o 0, o 1 and o 2 and at a time it is assumed that at a time only one input is high. So, accordingly this truth has been drawn here and when the output is 1 we have checked the inputs. So, when output o 0 is high the business inputs are high. So, we have combined it edited and then we get the 3 outputs. So, this is the logic diagram of 8 into 3 encoder. Next we will see the decoder circuit. Now, we discuss about the decoder combinational circuit. So, a decoder is the combinational logic circuit that receives coded information of n input lines and converts damage to maximum of 2 to the power n unique output lines. So, decoder is functions just opposite to a encoder and the decoder outputs will have less than 2 to the power n outputs when some of the n bits decoded informations are unused or are do not care combinations. Now, we see the block diagram truth table and logic circuit of decoder. So, now this is a block diagram of n 2 to the power n decoder. Here n numbers of inputs then it decodes 2 to the power n outputs. If n is 3 that is 3 inputs that output will be 2 to the power 3 equal to 8. So, 8 outputs it is marked as o 0 o 1 2 o 7. So, it is a 3 into 8 decoder. Now, we see the logic circuit and the truth table. So, since there is a 3 inputs a we see these are the 3 inputs and outputs are o 0 o 1 o 2 o 3 o 4 o 5 o 6 and o 7. So, for the 3 inputs what are the combinations first is 0 0 0 then 0 0 1. So, when all the 3 inputs are 0 then the output o 0 is selected. So, this is 1 and the rest of the outputs are 0. When the input 0 0 1 is selected o 1 output is 1 others are 0 for the third case o 2 output is selected for the fourth case output o 3 is selected and for the last combinations when all the inputs is high then output i 7 is high. So, this is the truth table for 3 into 8 decoder. So, these are the inputs and these are the outputs. So, now we see the logic diagram for 3 into 8 decoder. So, now since there are 8 outputs 8 numbers of n gates will be there and the 3 inputs a b c are the 3 inputs and it is complemented with the by using the north gate. So, for the first combinations 0 0 0 that means, when all the 3 inputs a b c are 0 that means, this one this one and this one 0 then output of the first n gate that is o 0 is high it is selected for the second case 0 0 1 that means, a is 0 a is 0 b is 0 here b is 0 then c is high. So, this is the high line then for the third case b is high a and c is low. So, a is low b is high and c is low for the fourth b and c is high a is low. So, a is low b is high and c is high. So, this is the c is high for the next case when output o 4 is high then the a is high then the rest b and c is 0. So, a is high. So, this one is high line and b and c is low then a and c is high. So, here a is high b is low and c is high then for the say sixth then output here the combination is a and b is high. So, this is high a then b this line is high and c is low. So, this is the c low line and for the last AND gate that means for o 7 output all the 3 inputs are high. So, this is a high line then b is high and c is. So, this is the logic circuit for 3 into a decoder. So, 3 means 3 inputs a b c and 8 means 8 decoded outputs. So, o 0 to o 7. So, first you draw the truth table by using these combinations 0 0 0 0 0 0 1. So, all these 8 combinations are there and then the 8 outputs o 0 to o 7 are given here that means the output only one AND gate output is high at a time and rest of the other output of the AND gates is 0. So, this is a 3 logic circuit of 3 into 8 decoder. So, the function of decoder is just opposite to the encoder. Now, the decoder is used in some code conversion circuits for example, b c d to 7 segment decoder. So, a 3 to 8 line decoder circuit can be used in binary to octal conversion and the decoder is also used in some code conversion for example, b c d to 7 segment decoder and another use of a decoder is that it can be used to implement any combinational logic circuit. So, we have discussed about the 3 to 8 decoder. Next we see the combinational circuit of adder and subtractor. So, first adder means there are two types of adder one is half adder and the other is full adder and first let us see a half adder. Half adder is a combinational circuit that performs the addition of two bits. So, in this logic circuit two binary inputs and two binary outputs are required. Now, let us see the block diagram of a half adder. So, this is a half adder so two inputs two outputs suppose a and b are the inputs and s and c is the output. So, here the output s equal to a b bar plus a bar b and c is also known as carry s is known as sum and c is known as carry. So, carry is a into b now from this sum equations the truth table will be a b then s and c. So, the truth table of the half adder for the two inputs a b that means, 0 0 0 1 1 0 1 1. So, these are adder so 0 and 0 is added. So, when 0 plus 0 be better 0 0 plus 1 the output sum is 1 1 plus 0 is 0 sorry 1 and 1 plus 1 is 0 carry 1. So, other carry is 0. Now, the logic circuit of a half adder is for two inputs that is a and b then two n gates and the output of the two n gates are added. So, there is a one organ this is the s input s output and the other is c carry output. So, here the input is a a naught b and b naught. So, for the first case when 0 0 that means, a 0 and b 0 for the second 0 1 0 when output is high. So, sum is when sum is high when the combination is 0 1. So, we have to put 0 and 1 for the next case the sum is high when the input combination is 1 0. So, this is 1 and this is 0. So, output is a b bar plus b a bar b and in the next case the c carry it is a into b. So, a is a high b high carries 1 here a high and b. So, this is a half adder half adder logic circuit. So, what is a half adder logic circuit? Half adder logic circuit is a combinational logic circuit which added two bits and it gives two outputs. Two bits is a and b and s outputs are sum and carry. So, sum equations is a b bar plus a bar b and carry it is the output is a into b. So, in the truth table for two bits the four combinations are there and the output sum is high when any of the input is high and when both the inputs are equal that means either it is 0 or it is 1 then the sum output is 0 and for the carry output when both the inputs are 1 then the output is high. So, this is the logic circuit for half adder. Next we will see a full adder. So, now we will discuss about the full adder combinational circuit. A full adder combinational circuit is a circuit which added three bits binary signals or binary inputs and there are two outputs sum and carry. It consists the three input consists a and b which we have already in case of half adder and the third input is the carry which is coming from the lower order bits when multi bit addition is performed. So, in case of a full adder two of the input variables suppose a and b represents the two significant bits to be added and the third variable that is c which is represent to carry from the previous lower significant position and the output variables that is s which gives the value of the least significant bit of the sum and the output variable c which is which gives the output carry. Now, let us see the truth table and the logic circuit of a full adder. So, here a full adder this is the block diagram three inputs a b and c and two outputs s and c sum and carry. The outputs sum it is represent as the relation by this is that means a bar b bar c plus a bar b c bar plus a b bar c bar plus a b c and the equation of the carry that is c is a b plus b c plus c a and here the truth table here is three inputs a b c and the combinations it is written like this and for the sum when a zero zero that means zero plus zero is zero again zero plus zero it is zero then for the next zero plus zero is zero and zero plus one it is one and zero plus one one one plus zero it is one then zero plus one it is one and one plus one is zero carry one so here carry is zero and for the fifth combination one plus zero is one and one plus zero is one one plus one is zero carry one then one plus one is zero carry one zero plus zero is zero then one plus one is zero carry one zero plus one is one so this is the outputs of the full adder what we have seen here that when any of the input is high that is one the output sum is high and when any of the two inputs are equal that means there one one the output is low now we draw the logic circuits here for the first is sum s first we have given four n gates then because four terms is there and one or gate so for the first combination zero zero zero sum is zero for the next when sum is high for the combination zero zero one that means a is zero zero and c is high for the next case when one is high a is zero b is high c is zero a is zero b is high and c is zero for the next this combination a is one b and c is zero a is one and b and c is zero then for the last combinations all a b c are one so here this is a high b high and c high so this is the logic diagram for the s output and for the c output that is scary when it is one when the combination is so this a b plus b c plus c a these are the a b c so first case when it is high that is b c so b c next it is high that means a c so a c then it is high a c then b c a b so k b so this is the circuit for the output scary c and this is the circuit for the output sum so now dear learners in today's class what we have discussed till now the first we have discussed the combinational logic circuit what is a combinational logic circuit it is a circuit which consists of some interconnected set of logic gates with some input variables and output variables and the some examples of combinational circuits we have discussed first we have discussed a multiplexer so a multiplexer is a combinational circuit where the binary information is selected from one of the two to the power n input lines and it is transmitted to a single output line if the n is a number of selection lines then the 2 to the power n combinations will be there so multiplexer is also called many to one next we have discussed the demultiplexer so demultiplexer in the multiplexer we have discussed the one to four demultiplexer so it is a one to many and after that we have gone through a encoder which is a combinational circuit which generates the binary code for the two n input variables that means 2 to the power n into n encoder next we have seen a decoder combinational circuit which receives codes information on a n input lines and transmit them to maximum of 2 to the power n unique output lines after conversion and next we have discussed the adder so there are two adders one is half adder and the full adder in the half adder it is a combinational circuit that adds two bits and next is the full adder which is used to add three bits so in the next class we will discuss about the substractor and then we go to our next unit that is sequential logic circuit so in sequential logic circuit the output is depends on the input as well as the past outputs so in sequential circuit our memory is used thank you learners