 to the session on RC coupled amplifiers. Learning outcomes are at the end of session students will be able to explain the operation of RC coupled amplifier as well as the parameters of the RC coupled amplifier. So, these are the contents. So, what this basically this RC coupled amplifier is? Here output signal of first stage is coupled to the input signal of next stage via capacitor and here a resistive load of the first stage will also be acting as a load for that particular stage and will provide the signal to the next stage. Here the stages of the amplifier are identical. So, each stage is identical that is using the same transistor and uses the common power supply. This particular coupled this RC coupled amplifier is widely used in the voltage amplifier since it has excellent of audio fidelity over the wide range, but here due to the shunting effect. So, shunting effect is due to the capacitor and as you know that when frequency is large at that time you will get the XC value small and due to this shunting total gain is less than the product of individual voltage gain and that is why here we will see the next. So, this figure one shows the circuit diagram for the RC coupled amplifier. Here voltage divider biasing is used this register that is collector register will provide the input to the next stage that is base of the transistor Q2. So, we are using here voltage divider biasing and emitter register is also playing the role to make the Q point stable ok. So, here Cm couples the AC signal voltage and CE will provide the low reactance path CE is the bypass capacitor and the coupling capacitor CC passes the AC signal and blocks the DC signal. Now we will see the operation when input signal is fed to the first stage which will be amplified by the transistor which will appear across the collector transistor further given to the base of the next stage. So, this coupling capacitor couples the output of first stage to the input of next stage. So, I can say the overall gain is equal to voltage gain of first stage into voltage gain of second stage, but as I told you before due to shunting effect there will be loss of the gain and therefore it will be practically less than the multiplication of 2 voltage gains. See this is the circuit we can represent this circuit in the simplest form for the analysis purpose and that we can do with the help of the H model ok. As you know well that H parameter is used to represent this transistor. So, here this is the coupling capacitor in between the 2 stages this is the input impedance of the second stage and this is RC which is the output impedance of the first stage. So, we can say as hre of the transistor is small therefore, hre into v out is neglected which is at the input side of the transistor and 1 by h o is very large which is parallel to this particular output part of the transistor which is also neglected the 4 circuit becomes simply with these particular arrangement. And R 1 and R 2 which are used for the biasing purpose which are large as compared to h i since we have just this particular representation. So, we have used the emitter bypass capacitor which is also small. So, R e and C e considered as short circuit ok. So, if we analyze this further we will get the frequency response of the RC coupled amplifier. So, here what I have done I have converted this particular current source into the voltage source. Therefore, it will be h f e i b into RC in series with the RC yes and this is shown over here. Now, one more thing capacitor as it is a mid frequency analysis we are considering for the X e c value is very very small as frequency is moderately large. So, we have this current flowing through the output path or this loop is equal to h f e into i b into RC which is a voltage source upon RC plus h i e. RC is the first stage collector resistance and h i e is the second stage input impedance. So, this is my i. Now, I can say i a i m that is mid frequency current gain equal to i upon i b that is output current by input current. So, I will get this particular equation since i upon i b will be giving you this remaining ratio. Now, to calculate i out I can say it is simply the current flowing through the path into h i e. So, I will just multiply the value of i with this h i e next v in equal to what input impedance into input current that is h i e into i b why I am calculating this because I am interested in the voltage gain which is a v m a v m is what voltage gain at the mid frequency. So, this is my a v m. Now, when I consider the low frequency signal is applied at that time x c c will come into picture we cannot ignore it. Therefore, same is the thing which we have carried forward just the additional part is I have minus j x c c part over here due to this coupling capacitor. So, see here when I do this calculation and I calculate the voltage gain for the low frequency I will come across this particular ratio. Now, with this I will also calculate my modulus of this gain which gives you this equation and through this I will now calculate the cutoff frequency lower cutoff frequency means from which particular point I will get the constant output voltage. See here this is the ratio of a v m and a v l that is a v l by a v m as you know that it is 1 by root 2 always that is a v l equal to or any lower cutoff frequency equal to what mid frequency range by root 2. Therefore, if I analyze it further I will come across this particular equation that is 1 by 2 pi c c into r c plus h i in the same way if I go for the high frequency at that time my inter electrode capacitors will come into picture which gives my inter wired capacitance. Therefore, I treat it as c d that is depletion capacitance and when I go it further I will again have the same procedure which we have done in the low frequency analysis and I will calculate my high frequency gain over there. Why it is so? Because only the c d will be changing over there ok this j omega c d will be extra in that analysis and when I get the ratio of a v h by a v m which is again equal to 1 by root 2 I will take it as the ratio and when I compare this part equal to the higher cutoff frequency. So, I can write 1 by 2 pi c d into bracket 1 by h i plus 1 by r c this is my high frequency gain. So, when I get the different identical stages one with the same values of r c r in and the voltage gain. So, calculate the gain in dB as I know that effective load for the resistance has to be calculated which is a parallel combination of r c and r in which comes to 333 and so I have the gain of 4 stage which is equal to 60 into 333 by 500 is what gain of the second stage is 60, but my gain of the first stage will be reduced due to the loading effect and that is why I will not get the 16 to 60, but 16 to 39 therefore, it is 2397. So, this is the frequency response over the mid range and high and low frequency range and the advantages of this is that we have the excellent frequency response over audio frequency which is giving the cheap solution and the disadvantages are lower voltage and power gain as well as noisy because we are using resistor and capacitor which also gives the poor impedance matching which it is used in the public address system. These are the references. Thank you.