 In the previous video, we looked at what happens during a read operation. We put our request on the bus, and the slave device fulfills that request. Unfortunately, things don't really work out quite that nicely in reality. For one thing, we've got three different pieces working here. We have our master device, which is making a request. It would like to start making that request at the beginning of the clock cycle, but the clock generator is not in the CPU, it's actually elsewhere. So there's actually a delay between the clock as generated, the clock as seen by the CPU, and also the clock as seen by the slave device. So now, none of these devices are actually seeing what's really being done. Our clock signal is no longer perfectly square. All of our various control lines are now taking some amount of time to change. So there's all sorts of things that are going on here. It's still the same diagram, we're still interested in doing the same thing. But now we've included all of the extra elements that we get from various delays in our system. The clock is probably going to be closer to our CPU. So there isn't a huge delay between the beginning of the actual clock cycle. And when the CPU puts its request on the bus, but there is a much bigger difference between the middle of the clock cycle and when the slave starts putting the data on the bus. As far as the slave is concerned, it's still putting this data on halfway through the clock cycle. It just sees a shifted clock cycle. This will produce a couple of problems for us. One is that, well, we have to make sure that the data from our IO device has had a chance to get back to the master and be stored. If the amount of time between when the IO device starts to transmit the data, and when the CPU actually writes the data is insufficient, then we'd end up having to lengthen our clock cycle a bit. So that we have enough time for this data to be propagated down the bus. We also have additional issues now with timing with data is not completely set. Some of our control lines have been set, but others haven't yet. We'll look at that a little more when we get to some of the more complex diagrams. For now, we can kind of throw all of that into one box because we just have one clock cycle to work with. Once we have multiple clock cycles or no clock cycle at all, then we'll have to deal with all of these little bits that can get us in trouble.