 So, the next topic is about the packet switching system. So, this is I will continue from wherever I left last time. So, we want to implement a packet switch and one of the possible options which I thought of is going to have a we will going to have a cross bar. Cross bar will have certain number of inputs and will have certain number of outputs usually they will be same in number. And we are going to assume that packets are coming on each one of these lines and they are all synchronized in time. So, these are these are the packets which have arrived on each one of these. There may be situations that there is no packet on certain line that is also possible. So, what happens? The first slot will come then second slot, third slot that is the input which is coming in inside the switch. We have a interface card setting on each one of these ports. These interface cards will read the packet at least the packet header. Usually every packet will have a header as I have told earlier. So, this is when this access is time. So, it will always will be received first. There is a possibility of a trailer, but we are not bothered about the trailer part. This is not a store in forward. So, we will not do CRC checking in this case. So, if there is a errors happen, this may be misrouted. There is a possibility of even doing CRC checking, but then whole packet has to be received first here. CRC has to be verified and then only the routing will happen. So, there is going to be one slot delay which will happen at interface board in that case. So, usually delay will be for reading of this only header part and then there is some processing time, worst case processing time. This much delay will be required. So, we have to introduce that delay here. I am showing it by loop. This can be a kind of a memory which you can put, but it is going to have a still more a better time granularity or it can be a delay line. It is going to be a fiber optic system. It is going to be easily a delay line. Now, all these interface information, this will be always after the interface card once the header has been analyzed, has been read out. So, these are all through the interface thing. Delay part, that is where the packet will come. Now, this has to all come to the central control processor. This control processor will then decide after doing appropriate computation that which cross points have to be activated. So, these are the cross points. So, cross points will be chosen like this. So, this is going to now do a what is called row and column control thing for this. So, they will be activating just before the slot arrives. So, usually there will be a guard bend time between two packets. So, packet actually is not going to fill up the complete slot. It is going to be only part of it, because you require a guard bend time for the activation of cross point and then another time, guard bend time for again what is called releasing of the cross point and setting up of a new cross point. Guard bend, you call it a GU, because it is in temporal space, it is not in frequency space. In FDM for example, if you have spectrum of various frequency, frequency division multiplexed signals, you always keep some gaps where there is no cross torque. This is also known as guard bend. In fact, this term because this is a frequency bend. So, guard bend looks like, but in time there is nothing like a bend actually. That is a guard time, but you can also call it guard bend time. So, you require a gap between them. That has to be kept when you are designing the system, but usually whenever you do analysis, we assume all these operations can be done at almost infinite space. So, you need not actually have a guard bend. On paper, it is fine theoretically, but in real life, you need to have it actually. That will depend on your circuitry, the time which is required here. What is going to be tolerance is in activating and deactivating the cross points. Remember activation also means you have to first of all do the row and then column and row has to go down and column has to be kept up for one slot period when the cross point is active and column has to go down. So, these just take time. They cannot happen instantaneously. So, as for this, now this packet will be passed down to the output and this scheme is going to work fine so far. Each packet is going to have a separate destination. No two packets will have the same destination. If this condition somehow can be satisfied, then this is going to work fine. This switch is going to work fine. And if you can, this is what is known as, this is a basic simple switch actually, but real life the switch will not work this way. There is always a possibility because the packets which are arriving are coming at there independently at each input port. So, there is a possibility that you will have more than one packet coming in and they want to go to the same destination. In that situation, what has to be done? So, one possibility is that in this kind of scenario is basically what will happen is, if there these two wants to go to for example, this for remaining of them, unique combinations are actually ok. For all of them, they will they are not having any conflict with anybody they are going through. Only these two want to go here, but I cannot pass, I cannot keep these two on. In row, I can actually have multiple cross point active, but not in the column. So, when you have multiple cross point active, this way it is a multicasting. So, since this cannot be done, so what you will do is only one packet will be allowed to go through. Second one will be actually in this case has to be sent to the blank one or you do not activate that cross point actually. So, second one will be read out, but it will not be going anywhere. Remaining one this line and it will die out actually. It cannot pass through the switch it is lost. So, that could be one strategy. So, we will actually essentially make an estimate of the throughput, maximum throughput which can be achieved in such a scenario ok. How to choose a vector packet? You have to decide an algorithm. If you say I am going to give one a higher priority and two a lower priority, always choose the one. First and drop the two. If all ports are having equal priority, choose anything randomly and let it go. If packets are lost is the higher layer which will take care of it. They have to keep track of the packet loss, I have to do a retransmission. There will be some data link control or flow control mechanism which will be sitting in there. Window flow control will be there which will take care of the retransmission. That is one reason why the packet can get lost. Now, there can be an alternative strategy. We can say, now before actually going to the alternative strategy, I can just quickly make an estimate of what will be the throughput for this particular thing. So, a packet is going to be there on a line is with probability p. So, that is the loading factor basically, utilization factor of every line, every input line. It will have a packet with probability p and there are n lines, n by n which I am assuming. So, this can go to any one of these packet with any one of these lines with equal probability. Usually what will happen again there is a input one and output one are connected to the same node. These are given direction line, but actual links are bi direction. So, it will not be choosing at least the output one. It will always be choosing out of the remaining n minus 1. So, you will have with p this power n minus 1 probability, the packet will be choosing any one of these which actually implies that. Now, if you look at n output, p is the probability that packet is there and then with equal probability it is going to be directed to have any of the outgoing ports except the outgoing port corresponding to itself. Each line, each input line is always paired with an output line because both pair will be connected to a node or another switch always. So, do not send a packet to yourself actually in the loop that is not possible. That I am actually precluding from possibility. So, take an output. So, how many packets will be directed to probability that i packets will be directed to it, I have to estimate that. So, from here you can give the simple combinatorics actually from there you can get it. So, probability that a packet from a line will come to this is given by p divided by n minus 1. It can receive only packets from all other lines except a line which corresponds to itself. This is the same situation you discussed earlier that if 1 is talking to then 2 is also talking to 1. Yes, means you will never send a packet to yourself. But in such a switching we will discover that cross bar when you discuss. Means we never do a looping. So, there I am sending a packet to you are sending it to me that is a different situation. You are sending a packet that may come through a different route all together to me. Each packet is going independently, but when I send a packet to a switch it should not be sent to an outgoing port which is again back connected to me. So, my packet itself will come back to me. In that scenario your voice was not coming back to you it was other persons voice which was coming to you. So, this actually means that i packets will be coming to this particular node in one single slot will be directed what is the probability of that actually. So, that probability will be p divided by n minus 1. So, from remain from out of the n minus 1 possible input i of them will direct it to me this is with this probability. The remaining one of them will not directed to me is this probability n minus 1 minus i and this will happen in combinations of n minus 1 c i. So, that will be this probability of receiving i packets. So, even if you receive anything which is when you will receive no packet in a slot when i is equal to 0. If you receive i is equal to 1 or i is equal to 2 i is equal to 3 you will always get only one packet remaining will be dropped. So, if I sum up all the probabilities which goes from p 1 1 packet received 2 till p n minus 1 I will always get one packet this is a probability of achieving getting at least one packet at the outgoing port. So, outgoing line will have in a time slot with this probability 1 packet there. So, that will be the throughput actually and this is nothing but 1 minus p 0. So, what is p 0 from here we can estimate this will be n minus 1 c 0 this will be nothing but 1. So, I can remove this this is 0. So, this will be 1. So, this is 1 minus p divided n minus 1 n minus 1 under full load condition actually in every slot there is a packet the packets are coming all the time p is equal to 1 then we will make an estimate from there. So, that will be the maximum throughput. So, I can divide by this by p minus p n minus p and this will be nothing but in this in limit when n goes to infinity this will become e raise power minus p. So, I want 1 minus p 0 to be estimated. So, 1 minus e raise power minus p is what is going to be a throughput S per line throughput per line will be this much. So, this will get a maximum value when p is maximum that is a negative term actually remember. So, I have to minimize on that since the exponent is negative. So, I have to maximize over p. So, p gets a maximum value which is. So, from here actually you can plot how the throughput increases with p and this will achieve you can plot this S this is the throughput per line as p goes from 0 to 1. So, e raise power minus p is this. So, this value is 1 over e. So, this is what will be the curve for S. So, when p is 1. So, initially throughput will increase as probability increases but then when p goes to 1 it means full loading condition at the input put that value it is 1 over 1 by e which is going to be I think 0.532. I think this value is 0.532 or something. But this is what you will get as a maximum. So far this policy is fine but I need to improve because there is a maximum throughput limit and I will also have a loss even if p is equal to 1 roughly about more than 40 percent the packet will actually be lost this is not a good switch in that sense. Ideally if I actually have even under high load conditions low load conditions it is fine but under high load conditions I ideally would like to have something which we which is almost 95 percent or 96 percent probability and as less number of packet should be dropped as possible then of course we will be interested in what will be the delay in the packet being transmitted out. So, now let us look at the strategy for buffering. What we did is we are trying to build up cross bar switch I have taken because that is what we know about and you want to build up a packet switch with this. We have taken at the input and we have assumed fixed slots at all the inputs are synchronized and I am actually neglecting all the delay and everything I am assuming that header can be processed control processor can process almost at infinite speed and can apply the control action. In real life there will be some amount of delay after this header has been detected there will be some guard band which has to be provided between two packet two consecutive packets and two consecutive slots. So, that this action of setting up everything can actually take place packet will only be transmitted when the cross point is connected not when it is under the process of connection. So, based on this various cross points are set and you get the output that was the first thing which we did. Secondly, I thought let me do a very simple analysis there is no buffering here packet just keep on coming whatever comes in the slots we just transmit if there is more than one packet trying to go to one single output we have no option, but to allow only one and rest everything will be dropped. I am not worried about I am actually taking randomly any packet will be selected in going out, but there can be a priority disciplines where you can say if the one and two are going to content packet from one will be given priority and it will go out packet from two will not go out because I remember I have not still estimated the probability that your packet will be lost I am only worried about the throughput part throughput is how many packet per unit slots are going out from an outgoing port. So, whatever is true for one port has to be true for any other port. So, under that assumption then we estimated what is going to the probability of having a packet here from an incoming line. So, the probability p the packets will be there in this slot this will be directed to remaining n minus one with probability one over n minus one equally likely chance uniform routing. There is one doubt. So, the probability of p should be 1 by n because equal probability n lines are there. So, it will be 1 by n or p 1 p by n. p is a arrival probability of having a packet on one single line each line is independent. If you want all the lines to have a packet that probability will be p rest over n only one packet one line has the packet that probability is p all other lines does not have 1 minus p rest over n minus 1. So, in general I packets will be present here that probability will be given by p rest over i and because they can be in any order any combinatorial. So, it is n c i n 1 minus t n minus i that is a probability that i packets will be there in a slot at all the inputs of a switch. So, t is a probability of having a packet on one line the same probability exists for second line also third line also. The case which you are taking it will be 1 by n there is only one packet which is going to come it has to go on any one of these lines then it will become 1 by n, but we are not all inputs are independent they are not dependent on each other. So, once we get a probability that this guy will get a packet from one line say this one. So, that probability is p divided by n minus 1 the input which is corresponding to this output port I am not bothered about that anyway when I take limit n goes to infinity that n minus 1 does not matter you can actually observe that I have used that thing. So, getting i packets from various combinations directed to only this port this probability has to be that i packets have been directed out of n minus 1 which could have come to this port the one which is coming at the corresponding input port corresponding to this output will never come to this. So, that I have excluded. So, n minus 1 c i this is a probability it is been directed here i of them remaining what will happen they have not come to you. So, it has to be 1 minus p by n minus 1 the remaining step simple binomial thing and then of course, we say let us find out what is a probability that no packet will come to me because either you find out each one of them in sum all these or you do 1 minus of p 0 both are actually same. So, we have found out p 0. So, when you put i is equal to 0 this will become 1 this term goes away 1 minus p by n minus 1 will become this I have multiplied divided by in the exponent by minus p and when I take a limit n goes to infinity or n minus 1 goes to infinity this will become nothing but exponential. So, it becomes exponential sorry this limit actually should be put here you will get e raise power minus p. So, what is a probability you will get at least 1 packet remaining will be drop diamond bother, but I will have 1 packet in that slot. So, if I have 1000 packets how many packets will come. So, this will be 1 minus p 0 multiplied by 1000 those many packets per unit slot will be going out. So, I have put that value it becomes 1 minus e raise power minus p of course, e raise power minus p will be shown by the line which is decaying and the growing line is what will be your throughput 1 minus of that. So, as p increases your throughput will increase, but it will saturate it cannot never be higher than this when p is 1 which is 1 over 1 minus e 1 minus 1 over e I think it will be 0.58 or something it must be around that value I think. So, you can compute that and then verify. So, that is a quite large number of packets will not pass through even when p is 1, p is 1 is saturation case when every input is going to have a new incoming packet in every time slot. That is what is p is equal to 1 packet is under full load and the complete saturation you will saturate to this 40 percent of packets will be lost. So, this which we will be happy, but we are going to have very high loss rate I have to minimize on this loss rate that is a question how to do it. So, we have to solve this particular problem. So, I have now moved from simple cross bar which was a circuit switch element that is why we have learnt it and we have converted into a packet switch, but my throughput performance is limited I have to now move one step ahead further improve the performance. Now, how we will improve the performance? So, what we can do? We can do buffering some kind of buffering can be done. So, let us see if we can do the buffering, but we have to do the buffering now question is this some people can say what I can do is I have this cross bar now I am cross bar output. So, I am showing on this side and this side not in the bottom. So, where I should put the buffer. So, there are four lines for example, this four by four where I should put the buffer I cannot insert a buffer inside a cross bar is up now cross bar is a cross point in every slot. I just snap certain cross points and this snap cross points sets will keep on changing in every time slot. So, we have to put the buffer can I put it at the output no we cannot do that. Because there will be only one packet coming at output and that anyway you will always have a chance to translate. So, this buffer will always remain empty packet comes it goes out packets are being lost here because the contingency is happening here. So, common sense will tell I think I can have the buffering here I need not have buffer at the output, but once you do this now if that packets are coming and they are being read out synchronously from the buffer any packet is of fixed length again that is assumption here. Now, there are two packets at the head of the line this is known as line this is head of the line is the first position in the queue and they both want to go to same outgoing port. So, what I will do is I will just read one of the packets and this packet will go out this one this packet I will not read this will remain in the buffer these packets will be read because they are not contending. So, they will be clear, but in the next time slot this is empty. So, new packet will come. So, a new packet will be coming here next time slot a new packet will come this will be in the back next time slot this packet will come a new packet will come again if there is a contention between this packet and this there can be many things which can happen. So, contention will always be looked into only in the this front packets the back packets we are not bothered as of now. So, again if there is a contention I will choose the maximum number of packets which can be transmitted and then of course, once you have decided on that maximum number of packets which need to be transmitted some packets which are cannot go through because there is a contention they will again be buffered. So, this buffer can keep on filling and keep on going out depending on this. Now, there is a problem actually in this case there can be a scenario there are variations on this now. I can have a case like this if I look at the front of the packets this is a current situation for example, this is a current situation there are two packets buffered here one here one here one here and if I allow only the packets which are at the head end there might be contention between these two if there is a contention I may allow this one. So, there are two packets in the buffer, but if I take this combination this one there is no contention all four of them can be transmitted simultaneously because there is no contention among that pair, but since I am using first in first out discipline here all the queues I will not be able to transmit this packet even when this could have been adjusted actually this would have improved the throughput. Now, this kind of blocking this is blocking is not because of switch this blocking is happening because of the queue somebody is there ahead of you sitting and he does not want to go through in this particular slot you could have gone, but you are not actually allowed to go this is known as head of the line blocking h o l. So, this is a one variant of buffering this will certainly improve, but this has head of the line blocking problem. So, next variation of this is you are going to have a situation where these buffers are not managed as single queue they can always be managed as a hybrid multiple queue for each input port I can have 1 2 3 depending on because they are end ports this is known as a kind of a different structure. So, packets which are coming in are buffered into multiple buffer corresponding to each output. So, this one at each input port you will have this particular scenario. So, there is no head of the line there is no first in first out for each output you maintain a separate queue. So, earlier you are having n queue now each queue consist of n queue. So, you require n square queue that is the only thing n into n minus 1 queue is technically will be required this guy will be maintaining a queue for all outgoing ports except the output port which is for which corresponds to itself. So, n minus 1 queue is here n minus 1 here n minus 1 here n minus 1 here. So, n into n minus 1 queue will be maintained. Advantage is that when you look at the slot you will now choose the combination in such a way. So, because for example, there was a contention here, but I can then look at the queue number 2 and there is no contention I can always find out a combination such that the maximum number of packets which can go to the outgoing port that is a maximal match problem actually. So, if you do not do maximal match you might have less number of packets possible actually. So, by just choosing appropriate combinations you choose any one of these. So, one of these n minus 1 has to be chosen in each input port. You choose such that the maximum number of mapping can happen to the outgoing ports. So, in every slot you are maximizing on the throughput. So, once you do that then you will achieve the maximum throughput actually and out of the line blocking can be taken care of, but you have to additionally now implement multiple queues and a separate algorithm has to be implemented inside the switch. Sir, here whenever a new packet comes it will go to each one of the n queues in maximum. No, if packet will come only at one port. So, it is directed to only one of the n outgoing ports it will go in that particular queue. Sir, then who decides in which queue you will queue? A priority is a problem here see question is you do not know that when there is no conflict for example, which one of the natural thing technically you should always go for first in first out. So, this kind of queue actually is not required you can the better strategy will be only thing it is slightly complicated to manage, but this way if you manage it is far simpler. But how many interface ports will have this switch? Only one interface one interface is there one packet will come and it will be directed to one of the ports. So, single buffer I am now strating into n buffers. So, one queue I am strating into multiple queues. In this multiple buffers if it is using round robin laying then we actually it is. So, there is a complication I should actually always the delay is the issue. One of the important thing is not only I should maximize the throughput I should also minimize on the delay of transfer. The problem is you get a packet for this particular thing it went to packet number 2 then the next one the packet number 1 has come. Now, only for packet on the only for output 1 the packets are keep on coming in and if by your strategy you are always choosing one this guy will keep permitting indefinitely your first in first out this one will not be maintained. First in first out you are going to have keep on this line if this out of the line blocking will happen. This is true the second packet is in first line packet has come and second line there is a contention. Again the first line you have given the priority to first line not second line. No, you choose randomly between them. You can choose randomly or first time has been given the second time you will start from the second one and third time you will start you can do around robin. Otherwise there will be a start. Because they are also maintaining queue. If first and second was contending first one was given last time last slot the priority this slot if there is another contention I will start from 2 for giving the priority. So, next time I will start from 3. So, I will keep on doing round robin that is also possible. Well there are various possibilities in the switch it is not that it is very simple trivial thing and there is only one possible solution. I am saying that at each input port there are n buffers. When a packet arrives there is one packet arriving in a slot depending on the outgoing port I will put it in one of these tubes. For output port there is a tube. So, n square complexity will be there for number of tubes. And then it is like I have to now map on to 1, 2 n possible outgoing things I found out 1 can be mapped here. Then 2 can be mapped here. So, I have to find out maximum maximum number of packets can be transferred in a slot that is a maximum match problem. The complexity of the switch as a whole will increase in this such a case. Yeah complexity of processing is increasing. Because you need a algorithm. There is something called buffer complexity which also comes into picture for the same throughput performance. So, it is not same as circuit switching because of this. Circuit switching you are only worried about computational complexity is one thing. If you have to do rearrangements or try to find out a path and second thing is number of cross points. A number of cross point complexity is not the issue. Mostly it is the processing which is the problem. A size gross processing complexity will increase. In this case again I think it will increase quite fast actually it is not desirable. Ideally I want everything to be O n or even lower than that. Every kind of complexity should be this or lower than this. The tendency of the switch is always going to have something O n square. You usually will not find anything greater than O n square complexity. That will be rare phenomena. If that is there I think that is a really bad design. So, you will usually are going to have something in between this. Something in between this is O n log 2 n. You have seen all this I think already. Remember you have got all this stuff. O n log 2 n square kind of thing. There are many combinations which exist in between these ranges. If you can get something better than this, wonderful. If you can get O log 2 n that is still better because that is better than this O n. So, all kind of computational complexity time required to make the decision, the delay part, the throughput performance, the switch cross points which are required. As n grows what happens to that and that is what is complexity. So, this has to be somewhere in between this and closer to this I think it is acceptable. If it can be even lower than this, it is still better. Yeah, it has to be 1 to n minus 1 actually. One of them will not be used. One will be different. If it is a height slot, height input port, then the height buffer will not is not required. You will not be buffering for yourself. You will never have any package directed to yourself. Now, I can further improve. This was one possibility to remove the head of the line blocking. So, usually and of course, there is a maximal match issue. That is another complication. So, people thought of an output queued switch, but we know that output queued switch is going to be difficult to implement. So, how that can be done? It is not that it cannot be. It can be done. What you do is you have 4 ports, one packet coming in every slot per line. So, there are 4 packets coming in. In one time slot, if somehow, because technically it is like a memory which is there, one packet being coming in is stored. While reading out the packet, if I read it at 4 times faster speed, so switch internally is working at not at the line rate, but 4 times the line rate. I am taking an extreme case. So, line rate internally or internally speed is 4 times. In this case, then all 4 packets I can read. I can analyze their header and all 4 of them can be pushed out to an outgoing port in one time slot. So, you will get all 4 packets here, but in one time slot, the line rates are assumed to be same on both sides. Only one packet can go out on the line. What you will do with the remaining 3? You can put a buffer here. So, all 4 packets will be queued up here. Remaining buffers will remain empty. Remaining buffers will remain empty actually in this case. Now, this speed up of 4 times allows this thing to happen, but who said the speed up always has to be of 1 or 4? I can have a speed up of 2 also who stops? So, if I have a speed up factor of 2, what will happen? So far, 2 packets are contending. I can push both of them to an outgoing port. The moment they are 3 which are contending, I cannot do that. One of them have to be dropped. So, 2 of them will be pushed out. One of them will be dropped. Again, some policy decision has to be there regarding this mechanism. Now, this I am now moving to a hybrid approach. If I want to even forget this particular loss, I can also have an input buffering. So, I can even have buffers here. So, when the speed of factor k, so the maximum value of k is always greater than or equal to 1 or less than equal to n, where n is number of ports. Actually, n minus 1 is good enough again. I have written n, but n minus 1 is good enough. And if I am using somewhere k which is not n, n which is greater than 1, I also require input buffers. If I want a lossless packet, there is no loss which is happening inside the switch. So, this is a hybrid configuration. Here, the input side is a normal FIFO. The input side can be a normal FIFO or can be this kind of system. So, there are various combinations now which have come because of in this hybrid thing. So, in this hybrid combination, there will be no loss. Is there a T? There is no loss. When all buffers are full, then what you will do? Like this have to be lost in that case. See, if you are having infinite buffers, there need not be any loss. But, there is a fundamental principle that when lambda over mu which is rho for a cube. This is the mu is the rate, lambda is the rival rate. What we call rho 1 minus rho is what is the average two length l bar. This actually explodes and goes to infinity when rho goes to 1. You require infinite buffer. So, if your buffer is only limited to some value, this is the maximum throughput which can maximum load which can be taken up. That is the average value, remember. So, statistically because this is an average, for this rho this is the average value. So, statistically there can be u which can exceed that average value. And if you are having a buffer only till this average value, like it will be dropped in that case. So, actually average buffer capacity which is going to be there is going to be lower. So, there is a probability distribution which happens for the q occupancy. So, next step I think after the examination we will look into the performance of the input q system when head of the line blocking actually happens. With that and if I remove the head of the line blocking, then what happens that we have already done 1 over 1 minus e. So, I will compare the situation for head of the line blocking and without head of when I am actually dropping the packet if there is a contention. These two scenarios and we will also analyze the output q system and delay is also for that. k is the speed of texture. k is equal to 1 was taken here when we did that full throughput analysis. k is the internal speed of texture. k actually means in one slot I can read two packets and push it to an outgoing buffer. If k is n, I can read all k and packets and they all can be read out to a single outgoing port. k means k time first and we are reading and k time first and we are writing also. Switches internal is working k times at higher speed then the line rates. See line rates are same, line rates are some r packets per slot is a 1 packet per slot. My switch can internally handle k packets per slot. We cannot break it, like reading is something different speed and writing is at this some things are different. They are at different. But both are same. Clear. Clear. How come this and this, the line rates are going to be same on this. If you want to do that you can do that. Then you certainly require a buffer. You cannot work without buffers. You are reading a packet. A packet is being pushed inside in one slot time slot. Here you might be reading out a packet in two time slots. That is the case you shall look. That is possible but I think that is really never used. An input or an output pair. Port pair is always related to a common entity on the other end. Within two for example switching nodes this output is connected to this input and this output is connected to this input. There is always a pair. There is always a bidirectional line. I am showing unidirectional incoming and unidirectional outgoing port on the left and right side but that is fine. But as far as actual systems are concerned they are always a pair. They cannot be unidirectional. With that I think I close today and we will move ahead from here for the analysis part.