 Hello everyone, today we will see direct form structures for IIR systems, the learning outcome. At the end of this station, student will be able to draw the direct form 1 and direct form 2 realization structures for a given IIR system. Now, I will see direct form realization structures for IIR systems. An LTA system is represented by a constant coefficient difference equation by y of n is equal to minus summation k equal to 1 to n a k y of n minus k plus summation k equal to 0 to m b k x of n minus k. So, this is a generalized constant coefficient difference equation representing an LTA system. Now, for implementation of this particular structure it needs the delayed values of input, output and intermediate results. So, for requirement of this delay elements need storage and also we need multipliers for multiplying these coefficients and adders. So, the basic building blocks required are 1 a delay as maybe if you are applying x n as an input to a delay represented by this gives output x of n minus 1. Similarly, you need a adder which has two inputs maybe x 1 n and x 2 n gives us the output x 1 n plus x 2 n and the third block required is a multiplier which is maybe x n we are representing this as multiplication by a which gives you a into x 1 x of n. So, we need a delay for as a storage elements then adders and multiplier. Now, consider this constant coefficient difference equation if you take a z transform this we get y of z equal to summation k equal to 1 to n a k z raise to minus k y of z plus summation k equal to 0 to m b k z raise to minus k x of z. So, by taking this term of y z on the left hand side and taking a ratio of y z by x z we get y of z divided by x of z is equal to summation k equal to 0 to m b k z raise to minus k divided by 1 plus summation k equal to 1 to n a k z raise to minus k. So, this is known as the transfer function for an IR system. Now, this transfer function h of z can be represented as h 1 z into h 2 z as where h 1 z is equal to summation k equal to 0 to m b k z raise to minus k into 1 upon 1 plus summation k equal to 1 to n a k z raise to minus k. So, now this particular system is h 1 z this system is h 2 z. So, it means we are now representing this h of z as a multiplication of two systems whereas, the first system is the all 0 system whereas, in the second system is a all pole system. So, for realization of h of z we now have a cascade of h 1 z and h 2 z. Now, I will draw the structure for h 1 z and h 2 so, the direct form one structure. Now, here h 1 z is equal to summation k equal to 0 to m b k z raise to minus k. So, this we can achieve as input x of n this z raise to minus 1 gives a delay here x of n minus 1 multiplied by b 1 here multiplied by b 0 z raise to minus 1 multiplied by b 2 and so on. Finally, there is to minus 1 b m adding all these together we get. So, this is the system 1 we can verify this as x of n into b 0. So, if you consider this particular difference equation. So, it is b 0 into x of n plus b 1 into x of n minus 1 plus b 2 into x of n minus 2 and so on if you are adding we will get this part. So, that is the system of all 0 system. Now, for connecting it in cascade with h 2 z consider this is y of n. So, with this delay it gives us y of n minus 1. So, from this equation when k equal to 1 it is a 1 y of n minus 1 k equal to 2 it is a 2 y of n minus 2 and so on. So, y of n minus 1 into a 1 minus a 1 z raise to minus 2 that is a delay further delay by 1 y of n minus 2 minus a 2. So, this way if you go on adding z raise to minus 1 minus a n. So, adding all these together with this multiplied by 1 we get y of 1. So, this is the second system h 2 z. So, this realization is known as the direct form 1 realization. If we consider the complexity of the structure. So, on this side we have m number of storage elements here we have n number of storage elements and so total memory requirement is m plus n. So, the total memory requirement is m plus f. Whereas, the total number of coefficients are m number of coefficients on this side and a 1 to a n number of coefficients on this side. So, m plus n plus 1 multiplies are a part for these coefficients. Now, as this is represented by a cascade connection of the two it is possible to interchange the order of the two systems. And so by changing this order and connecting h 2 z first and h 1 z after that we get another structure known as direct form 2 structure. So, now we are interchanging the order. So, z is to minus 1 minus a 1 minus a 2 z is to minus 1 minus a n addition of all. So, this is h 2 z whereas, z is to minus 1 z is to minus 1 addition of all here this gives us h 1 z. But now if you look at this intermediate value if I am representing as a w n here we have w of n minus 1 here also we have w of n minus 1. So, we can minimize one of the delay. So, the reduced structure which we get is z is to minus 1 minus a 1 b 1 b 0 minus b 2 minus b m. So, maybe we have a n. So, this is x of n this is y of n. So, in this case the total number of storage elements can be reduced and it will be maximum of m n out of which whatever is maximum will be the total number of requirement of memory locations. And this form of structure is known as direct form 2 structure. Here this is with a reduced complexity compared with direct form 1 structure. So, this is how the given I I system we can represent by direct form 1 structure and direct form 2 structure. Thank you.