 Welcome friends, this is the 10th session of on base development course. I hope so far you have been able to follow. I am very happy to share this information with you guys. Now today we will be going deeper into the addressing mode 2 and then 3. So, in the last session we saw how internally the ARM data path functions when this addressing mode is used. So, in this discussion we will see what all the different base you can provide the offset address which is to be added with the base to access the memory ok. So, this session will cover addressing mode 2 explaining all the format that are supported. I will be giving you sample programs and then what is the condition before the executor executing that instruction and what is the status after that instruction executed. And all instructions whenever we use R 15 we need to be careful and we have to be aware what is the difference when we use R 15 in an instruction. So, I will cover about cover that part of part of that here as well as what is the instruction time for executing on load LDR or SDR how much time does it take, what are the different cycles used by that instruction that will also be covered and then we will touch upon the address mode 3 for today ok. So, the addressing mode 2 is supported by 9 different formats. So, this is basically to calculate the address for the load and store instruction to use this number different kinds of modes are provided by the processor to compute the address where a memory read or write needs to be performed using these instructions. Now, there are 9 ways to do it, but in this particular mode there are 2 things. Now, you can either access a word or an unsigned byte. Similarly, store also can either store a word always remember word is a 32 bit value or it could store a unsigned byte into the memory. So, whatever I spoke about the different format they are all applicable for all these 4 instructions ok. One more important thing that we should remember that there is no S prefix for LDR or SDR instructions ok. You remember S is what is this instruction can it affect the condition flags of CPSR or not which is maintaining CPSR or not. If you remember inner risk architecture all the operations between the processor is done only when operands are from a register correct. So, load and store actually helps us in getting the data or putting a data into the memory which is not though it is operating one of the registers it is taking either it will be storing the value or it will be reading from memory and then loading it into the register. So, this is something though with the getting some data into the processor or out of the processor. So, there is no data processing involved in this case. So, for that reason the S flag is not affected by the SDR and SDR. So, it is only when some operation is done within two registers the S flag is S that is S meansthe condition flags in the CPSR will be affected only when you are doing a data processing instructions, but not during the data transfer instructions ok. Now, this is a format. So, if you see a DR or SDR optionally you can have mention a conditional statement EQ or NB or MIBR whatever and you could say whether it is a byte transfer or not. If you do not mention B it defaults to a word transfer and there is no S field you can see that there is no S is in a flower bracket like what you have seen in the data processing instructions and then there is a destination register whether this value in this register either stored into the memory or from the memory it is copied in ok. Now, what is this expression this part of the instruction is what we are going to be discussing in this processing mode that is how are we going to generate the address from which we want to access from the memory ok. What is the address at which we want to do this data transfer? The first example is bit complex, but I will explain you so that you understand this because this you are going to be using it in your simulator ok. So, if you want to try out different things with the simulator you should be aware of how to do it you know using these instructions. You might have not seen this equal to so anywhere this is something to do with the assembler. So, the implementation of this instruction is also partly left to the assembler also you can generate multiple instructions to achieve this job. If you remember I was mentioning if long 32 bit constant needs to be brought into the register the assembler could use different instruction it could use MVM or MOV or it could put a particular constant in the memory and then try to move that using a LDR instruction. So, there are different ways it could be done. So, I am explaining you one of the ways where instead of having it in a fixed location the processor is the assembler is trying to get the value using the PC value PC using the PC as a reference ok. What is it trying to do? In this assembly code ok always whenever I put it in the box this it shows the assembly code what is there in a dot s file. I am not showing the full file our we are interested in only this part of this instructions. Assume we have put a LDR R 3 comma equal to num 1 num 1 is what is a variable which you have declared. Where is it declared? It is declared in a data segment that is represented by a dot that ok. Let me take up time in case if it helps you. So, dot that is a segment a separate data segment it is something different with the code where you have declared a variable called num 1 and you are saying dot word please see that there is a dot before ok it may not be visible from long distance. So, dot word to say that it is a of take it a bit by and the initialized value is this. Now, what does the processor or sorry what does the assembler do? It actually allocates a space somewhere in the memory and then it loads it with this value when you when you are loading this in a program into the simulator in a there is a simulator is having you know some part of the you know memory is code result for code my handwriting is very bad sorry about it. So, and then some data it has to keep some space for data again you have to remember that I am writing writing like a child do not do not worry ok. So, this memory who decides where the code has to decide where data has to decide the loader which is taking the compiled binary output of this or assembled output of this file and then loading into the memory ok it is actually you know maintained by the simulator some part of the memory. So, in a typical our simulator the comms in simulator that we are having assumes the code is starting from at the 1000 hex ok it could be modified, but this is what it assume. So, now the code will be here now after the code you have put a dot data and then number. So, the simulator is free to you know use any you know area to start from and then locate this variable number ok. It is something to do with the internal organization of the simulator and what the loader is doing before loading the program into the memory for it to run. Now assume that it has loaded in some location and you do not know the address. So, internally in your program you want to use that address for operating on it. So, the the instruction provided is for is for that purpose is LDR R 3 equal to num 1. So, effectively the address in which the num 1 is located is loaded into R 3. So, there are different ways of doing it I will explain you one way it could be done that is with respect to the PC. See suppose if this data is kept within the address range of 32 megabyte and code is here ok and then maybe offer some gap data is kept. Now it is easy for the instruction to access the data with respect to the PC the advantage is what PC is already a 32 bit value which is available inside the processor ok PC PC 6 you know R 15. So, it has got a 32 bit value. So, if you maybe add some offset to the PC either subtract it or add it then you can relatively locate where the data is with respect to the PC address. So, what is the advantage we get? We get we do not have to have all the 32 bit value to be given to the instruction you can only give say take the current PC value and then either if you do press R minus this 12 bit offset ok which could be a maximum of this much y I am saying f there is a maximum value. I am writing 3 s it is each f is going to take 4 bits. So, 12 bits is reserved by the immediate offset instruction. So, I can mention this much of value into the instruction itself using just a 12 bits of instruction to generate any address which is within the range of PC current PC value ok. So, that is why it is used this way and assembler anyway it will know the locator you know will know that if it has to generate this the data should be alive within the frame. Otherwise the while assembling itself you may get a error that this is not possible to allocate you know write this way of loading this address ok. Maybe it may use some other way it may copy this value into one location you know exact address where it is stored and then it will access using a memory read. So, it will read a if suppose if it is you know you have a very big program which is you know going into few megabytes then what it will do it will reserve one space where it will store the 32 bit value ok. Prepare the address ok it will store the 32 bit value of value which is a 32 bit value which is an address where the num on is located and then it will say that ok you compute the memory you know this address and then load it from there. So, you get a 32 bit value loaded loaded into RT. So, this is another way of accessing the 32 bit into the register. So, this is the way it is done let me first remove all this ok. Now, so this is the way num is the data the address where the num 1 is stored is loaded into RT. Other way of doing other address you may be interested in it I want to jump to the label by loading that value into PC directly ok that is also possible PC is what R15. So, we could either do a no branch or I could assign a new address that PC has to be moving to. So, that can be done by a label followed by a colon then what will happen is the address at which this particular instruction followed by the label is there that is what it actually means. So, when you load this into the PC the PC jumps to this after executing this instruction it will start executing from here ok. So, this is also can be done using the LDR instruction. This is I am showing you that control flow can be affected by a LDR instruction also ok. There are branch instruction which we will be covering in the later sessions, but just by loading a new value into PC directly by using this kind of instruction you will be able to change the flow of the instruction ok. Now, these are the things which gets modified R3 is modified here and R15 is modified with the instruction where move is located. I hope this is clear to you this is PC related ok it is done using the current PC value and then adding an offset to that. Always you remember when we are using anything to do with PC when a particular instruction is executed actual PC will be plus 8 because of the pipeline ok. The PC would have advanced by 8 bytes ok because of that you have to comprehend that in the instruction you means that some that ok. Now, let us go to the next instruction next example. Here what we are trying to do I am saying num 1 plus 4 I am interested in wherever num 1 is stored or you know it is you know it is in this address and this is the value which is stored there please see that it is a 32 bit variable. So, you are initializing it 1 2 3 4 which is 16 bits. So, remaining half per 16 bits will be all 0s ok in the memory and then in 0 1 c which is a 4 byte ahead of it assume that I have stored a value like this ok these are the assumptions. How I do? I can initialize one more I can put a one more variable and then say dot word ok and then say 0 x a b c d. So, that will take care of initializing the memory with some value. Now, if I need to access this I could access it using num 2 also or I can just say num 1 plus 4. So, this is a fixed arithmetic done by whom it is not done by the processor it is done by the assembler and then the resultant value is kept in the as a constant please remember. When you see these kind of things even in C language if you are having a hash defined and then saying that 1 plus 2 plus 3 who is doing that 1 plus 2 plus 3 it is a pre processor it is not done by the program executable program it is done prior to that by the tools. So, in this case the assembler does it because it can resolve the value of num 1 it knows the value 4 and then it knows that you want to add. So, you can always whatever is suppose num 1 is 1000 then it will add 4 and then 1004 will be given as an offset into the instruction. Now, let me show you an example. Now, let us see what is this doing assume that after LDR instruction the next instruction is the move and this is the label ok. So, the label is actually pointing to the instruction which is next to the LDR which is which happens to be a move. And then my intent is label wherever it is pointing I want to say minus 4 that means, what I am doing minus 4 means it is this instruction. And then I am saying load the R 15 with that address that means, what this instruction is loading the PC with its own address it is like a function calling a function itself recursive function or suppose you say a while one now continuous looping. So, here what happens is when R 15 is loaded with its own address the pipeline is flushed and then it will access this instruction flush from the memory again it will execute it on execution it will again load the PC with its own address. So, what happens when you simulate this ok you will not go beyond this the simulator will come execute a single circuit you come here and then you try to single circuit it will not move beyond because you are effectively loading the same address into PC. So, that means, it will come back again access the same instruction. So, it cannot go anywhere it rather than executing this instruction continuously. So, I want you to try this out in the simulator and see yourself or what happens. So, this will give you a clear idea how these things work ok is very important to make sure that you try out all these examples that I am giving in the lecture ok. So, this is all about first mode it has taken little more time, but once you understand this I think you know you will be able to follow the other mode at easy let us go to the next one. Again I tell you this is we are trying to see what all different ways I can generate the offset that is this portion ok. Now, the offset is generated using this one this part of the instruction and what is this R n this is the base register remember this is base register means assume your memory is there ok. The base register R n is pointing at the one location here and with respect to this either you can go up by plus adding an offset ok by plus or you can subtract some offsets and access some locations which are below that is why the R n is called a base because you are accessing it based on this address you are accessing trying to access different locations around it. Now, there are different ways we can do that. So, to achieve that we are using this instruction now. Now, let us see what are the three conditions here I am saying R 1 is always pointing at this address ok. I have already taken care of using a lot of instruction I have taken care of initializing them and I have also taken care of initializing the memory also with this content. So, please for any example that I am showing going forward this is the condition ok pre condition before executing this particular instruction. Now, what is it I am doing loader load register which register I want to load R 5 with what a value from this address calculated by this. Now, I can give plus or minus R m. So, which is R m and which is R m R 1 is R n R 6 here is R m. So, I can give plus or minus. So, I can free to I am free to give a minus also here, but in this case I have given a plus ok. So, what happens R 6 is what is it having it is having 4. So, 4 is here and R 1 is already having this value. If I add 4 to that because I do not mention any minus then it is implicit that it is a plus otherwise I should have mentioned it as a minus. Now, because I have not mentioned anything it takes it as a positive plus. That means, I am interested in accessing the location which is 4 by R here or forward from where the R 1 is pointing at R 1 is currently pointing at plus 1 8. So, I will be accessing what this address. Now, what is the what does it signify and I am mentioning it inside a square bracket. I want the processor to do this addition ok or subtraction based on what I have mentioned and then use that address to access the memory ok. I am very clear if I am mentioning inside a square bracket please use what is inside what have I given you use the arithmetic operation whatever you are supposed to do that and use that address to access the memory and copy whatever is there in it into R 5. Now, how much I need to copy I have not mentioned the b here. So, it is a word ok I need to copy a word the whole word. So, in this case 1 c is there and then this whole word a p c d is copied into R 5 that is what I am showing. Please remember 0 x a b c d means it is not a 16 bit value please always whenever I say R 15 or any registers we mean that it is a 32 bit value. So, it shows that all 16 bit value is moved into it ok. So, in a et cetera you do not have to mention the 0s like whatever 0s here. So, I am just showing the you know the most relevant part of the value. Now, what happens to R 1 and R 6 which is inside which is used inside in this case they are not modified both of them are not modified. I will show you some example where it is modified. In this case both R 1 and R 6 are intact it only uses the value and computes the address and then use it for the you know starting a memory cycle and reading it from the memory and copying that value for R 5. I hope this is very clear to you very simple, but I am just explaining you more so, that any you know doubts are there in your mind. So, what is the name signified register offset that means the offset value is inside a register ok that is what it means. What is pre-indexed we are what is pre first of all pre is doing something before ok. So, before accessing the memory I want to do the calculation that is why it is called pre why is it called indexed because I am indexing the memory from the base that is something I am doing and then trying to access it. So, if you see in a typical C world suppose there is an RA with 5 what we call this 5 S is an index correct this is an index. Now, the RA A could be starting from this address ok which could be again I am very fond of 1000 let me write 1000 and then suppose if I am saying this is a type in in a 32 bit processor ok. So, that means what each element of this RA occupies 32 bits ok. So, A of 0 will be where it is will be it will be in 1000 A of 1 where will it be it will be in 1004 you understand. Now, suppose a compiler needs to generate assembly code where you are accessing for for loop and then A of i you are doing i is maintained in the i is a variable local variable which you are used in a for loop and then you will be accessing i plus plus and then A of i equal to 10 or you may say that j another integer is equal to A of i you may do any of this right. How does the assembler generate code for it a compiler generates a code for it? It will maintain this j variable in one of the registers it will maintain the index variable i in one of the registers ok and then it will be using this to access the RA. So, it can use this instruction by keeping a 4 here ok because it has to advance it by 4 bytes ok and then whenever you say I of 1 that 1 will be into 4 ok. So, it will put that value so that it can use this instruction to access the any element of the array. So, that is why these kind of instructions are provided ok. It is to enable the compiler to generate optimum code ok to access the memory. So, R 1 we can be loaded with the base address of A where the array A is start being this 1000 and then it will keep on modifying the index register to access any of the elements here ok. So, that is a very easy way of doing it that is the reason these instructions are supported by the processor and you may have seen in 8826 there are multiple addressing modes and similar to that here also multiple addressing modes are supported by ARM it is given here. Now, what is this write back ok. What does it mean? See whenever I am accessing the memory I am asking the processor to compute it a new address based on the value in R 6, but I am saying that please do not modify the original content of R 1 and R 6 why you do this that is what I am saying no write that. So, you every time you compute the address and then use it ok. Next if I have another instruction called LDR R R 1 R 6 it will act with the same location or you can say R 6 you can put increment by you know add R 6 with the 4 then it will jump one by one ok. So, that means, it will access one or that is at the upper another address, but it will not modify the values in R 1 R 6 in this instruction ok that is why I am saying R 1 R 6 no change. I hope this is clear to you let us now go to the next mode. Here if you notice one new word has come a scaled register offset p index and no write back. So, the whole thing is same except that it is a scaled what does it mean? Let us directly jump I have not explained about this anymore you are already clear see here earlier instruction we saw only some register mentioned and then a square bracket came immediately correct. Now, what is happening we have added one more. So, if you again remember this register is R n and the offset register is R n. So, what happens the R n you can make out write this is a i l b I am shifting I am showing it as like this. So, R n is coming from the register file R m is coming through a barrel shifter. So, now I can give some command to this a barrel shifter do I want to do this gov on whatever R m you are reading from the register file and then give it to i l u for generating the address. This is the address that I am interested in the processor accessing gate ok this is what a l u is it clear to you. So, what is the operation need to be done logical shift write logical shift write is you have 31 32 bit shift write logical shift write you will be adding a 0 here and then 3 3 bits by 3 bits. So, it will be shifted by 3 bits and whatever goes out will be thrown because it is not going to affect the carry flag because there is no possibility here because there is no s here. So, during the address calculation the conditional flags are not affected. So, it goes off now what happens you generate whatever is R 6 you are going to be shifting it by 3 bits. Now what is in R 6 now it is actually 1 0 0 ok or this all 0s if you shift by 3 bits what happens this 1 goes out of the register right. So, it R 6 the shifted value the whole thing becomes 0 and then whether you are adding here you see plus or minus is there. So, I have not put minus here. So, it is a plus. So, 0 is added to R 1 R 1 is already pointing at this location. So, effectively you are not doing anything here which are because it is as good as mentioning it as R 1, but for an example I have given you this ok and it will be executed the way it is intended because assembler or a compiler cannot optimize this code because it does not know what is the value of R 6 when it is executing it ok. So, there is no do not think that ok some optimization will remove this instruction and put only R 1 and then moreover you are not wasting any time also here ok. The same number of cycles will be taken by this instruction you will have to whether you mention any LSR or not it will be same. So, what actually happens is it isactually accessing from the same location I hope this is clear to you again here the values of R 1 and R 6 are not changed ok after all these operations understood that is why it is called no write back. We are not writing the newly computed address into the R 1 you are not writing it the address were just computing it and using it and then throwing that value ok later on you will again compute it got it ok another type of instruction. Here it is a immediate pre index and no write back. So, what does it mean? Instead of a register a immediate constant is given. Now what is thebit of this 12 bits ok and then you see here you please remember minus is here after the hash. So, this minus is used by the instruction while encoding this instruction ok, but the constant what is stored in the instruction is just a 0 x 0 4 ok it is not please do not think that it will be 2s complement of this will be found and that will be stored as a instructioninto the instruction no it is a incrementing or decrementing operation is performed by the instruction inside the processor. So, this plus or minus will be considered and then inside a one of the bits will be set or reset I explained here in the last class. So, what happened what happened is this 0 x 4 is stored as a immediate constant. So, effectively what is happening here it is taking the value stored in R 2 subtracting the 4 from there. So, what happened it is now R 2 that address is becoming a 1 night and then that is being accessed and it is loading. So, it is loading the value into the register. So, R 4 becomes 1 2 3 4 0 0 1 2 3 4 got it this is the way it is that. So, why is it called pre-intext because we are doing that arithmetic before accessing the memory and why is no write back because we are not writing back the R 2 we are not disturbing R 2 and then why is it called immediate because we are using an immediate constant that is it ok very good. Now, let us go to another instruction you may wonder why there are so many types of insert because it is the flexibility given to the compiler to use any of them based on the need ok. So, complex data structures of your high level program as I showed you how RA is accessed you could have an RA of structures. So, if you want to access them then also there are instructions to support it. Now, take an example here it is a register pre-intext it write back. So, that is the difference because you might have noticed this earlier, but this is I am introducing for the first time. So, you saw this R 2 R 6 earlier, but now I am showing you there is an exclamation mark ok this is a part of the instruction ok. Now, what is happening is it is doing the same pre-intext that means, calculating the address because it is within the square bracket. So, it is calculating the address to use the is it in a memory cycle, but now it is the processor is told whatever you compute write it into R 2 now ok. So, R 2 will be modified with what value because you are adding 4 to the existing R 2 value sorry you are subtracting 4 from existing R 2 value. So, it will become 1 8. So, R 2 becomes 1 8 after this particular operation. So, it will access the same value from the memory there is no change from what you saw. Only thing is the newly computed address whatever was used for accessing the memory is now copied into R 2. So, what is the advantage? Suppose if you are using this instruction in the you know the same instruction again. Suppose if I have put the same instruction in LDR R 5 R 2 minus R 3 if I do exclamation mark it will not access the same location ok. Now, it has access this after this it will access this. So, it will keep on going forward it based on ok sorry it is minus I am doing and so still forgetting about I am being a minus. So, it in this case it will go down. So, it will access some location which is below. If suppose if I have put up plus here then it will keep on accessing towards increasing address from the base ok. So, the base is kept on either incremented or decremented and that the new value is stored in the base. So, base is modified. So, earlier I showed the base is stationary and then opposite is added. Now, base is also moving every time when it is accessing by a fixed amount ok. So, it keeps on either moving up or down based on whether you have put plus or minus in the instruction. So, that is why it is called write back. So, the new value new address what you have computed is written into e base register ok got it. So, let us move to other one. Now, we are we are seeing an example of some write back it is a pre index. So, this I have already explained you it will do this shifting operation or whatever and then the new computed value is stored into register. Now, if you want it in the C R 1 is having a 1. So, it is logical shift left by 2 base. So, 1 will become what 001 if it is you are shifting it by 2 bits it will become to the left to the left ok. It will become 100 that means, this code. So, 4 is subtracted from R 2 again it is now brought to this address. So, you are getting 1 2 3 4 in R 5 and then R 2 is now changing to 1 ok got it. So, this is the way the accessing of this is done and just showing the different things. Please remember there is a exclamation mark that is why it is modifying the address of the base register very good shall we move. So, far I have not mentioned something will be different let me let me tell you. Now, we have seen only the pre index so far right. What is post index? Let us take an example first and then I will tell you about this. So, here see this R 2 is just sitting there this this is the immediate constant I am subtract I want to subtract, but I have moved this out of the square bracket. So, what does it mean? I want the processor to use the current value in R 2 to access the memory and then subtract a 4 from that address and load it into R 2 ok that is why it is called post index. It is then after the access is done ok see the difference if it was inside then it would have done the computation and use that for accessing. Now, because it has gone out it is given outside the inside outside of square bracket it uses this just an R 2 whatever is there in R 2 is used for accessing the memory and then it is changed. Now, what exactly happens R 2 is already pointing here right. So, it copies that A B C D into R 5 right and then it changes because you are subtracting 4 from it it changes R 2 to this. Now, you may wonder there is no exclamation mark here why it is also a optimization in terms of instruction format done by upon very innovative. See as a assembly programmer or as a compiler I have put something here ok doing some minus 0 4 or some operation I am doing I would not be doing this if I am not interested in changing this right. If I am not interested in changing it I could have just mentioned no LDR R 5 comma R 2 no need of mentioning anything or I could have just say 0 x 0. So, I have an option to say if I am not interested in writing back I have an option to either throw this out you know completely do not mention it or mention it with a 0 then it is same as that is saying not to change this value that is why the processor is internally does not say in the post index format it does not say it has to write back it always write back in post index format. That means, there is no need for you to mention the exclamation mark there is some number that if you do so it will give a error. So, I hope you understood this because if you are interested in doing something you are interested in doing this arithmetic operation on the address after the access only to save that otherwise what will happen suppose you do some value you know some testing or plus or minus or some shift and then you do some plus minus, but if you do not write into R 2 what is the use of doing this whole thing because it is anyway it is not used for accessing the memory because I have approaching the memory you are using the same old value then what is the need of mentioning this. So, if you are mentioning it that means it is implied that you are interested in changing the value that is why the you know arm designers have you know using it internally for some other purpose, but if you are doing this I will always in post index I will do modify the R 2 ok. So, there is no separate symbol for this and I do not treat so you know differently for a post index always I will update the base register if it is a post index. Now, post index how will it know it will know that if the constant or a shift operation it outside the square bracket. So, it is very easy for it to encode the instruction accordingly I hope this is clear to you. So, you also see the value what is being copied R 2 is already pointing here. So, ABCD moved into R 5 and then it is subtracted on 90 subtract you know before it subtracted it will come here ok R 2 is changed without exclamation mark R 2 is the base register is modified please remember that ok and the offset is 12 bit because immediate constant. So, it is always a write back in a post index format very good. Now, we are coming to the end of this different modes easy a register post index and always write back. So, you can as well mention a register also and you can mention press R minus. Now, what happens R 6 is 4. So, you access as is whatever the value it is R 2 is pointing ABCD is moved into R 5 and then you subtract 4 from it. So, make it 1 8 that is all very simple now by now you are very you should be very familiar that if I give any instruction which will be able to understand what is happening. Please try out different things in the last session and all the modes you should try out and see how it functions in the simulator. So, that you will have a better idea. So, what do you do like I did initialize this with the num 1 and the insert the LDR instruction that I showed you in the beginning use them to load these values with the proper addresses and initialize this memory with these values with a dot word and then 1 2 3 4 you can write you know I am writing 1 2 3 4 to just every byte is this know every nibble is different. So, I have chosen this value. So, that I can show you some examples. So, put this kind of values and then try to access them from the memory into the register then store some value into the memory. So, whole lot of things you can do using these instructions and different addressing modes. So, be familiar with this you may wonder I may decide to not to use any of this mode I will use only one mode. So, why should I understand these instructions please do not take that stand you can decide not to use some instruction which you are not comfortable and you are writing assembly programming, but if you are seeing a assembled output of a compiler you do not have any choice compiler decides what instruction to use based on which is optimal which is efficient which is suitable for the particular code that you have written and you are debugging it and there is a crash and you are looking at the memory and trying to look at all the instructions which are being executed and there is some when some instruction is executed there is a abort. Now, you have to understand the instruction flow which is generated by the compiler you do not have a choice you can leave some instructions which I am not very comfortable I do not like this instructions I will not learn about this instruction you may decide and you may not use that instruction in your assembly code fine, but you cannot take that stand when you are looking at the assembly output of a compiler. So, if you want to be a good programmer and and a good embedded programmer understand every instruction of a processor because you do not have a choice in which instruction is being used by the compiler and when you are looking at the code which is generated by the compiler you better understand all the formats of the instructions. So, please pay attention to every mode and try out every mode in your lab session so, that you are comfortable with all the instructions ok. I hope you understand the need for it I am not trying to sell all the instructions here ok good right. Now, you can say a relief we have come come to the last is now the session is not over, but this addressing mode is coming to an end this is the last mode because you see the 9 I have told initially 9 modes are there. So, I have not missed anything in between if you are keeping track of the number see here whatever you saw inside the square bracket now I am putting it outside and then I am not saying anything here. So, what does it mean whether I mentioned it or not the the you know the processor is supposed to first use this value what is in R 1 to access the memory and then compute this offset and then do add or subtract based on what is mentioned into R 1 and overwrite R 1 ok always right back sorry. Now, you see that here is this also I have given I am sorry I have given all LDR example, but you know in the later session time handling you know example. So, you can try doing that with anything it is not that you are do only all these parameters will be a LDR is simpler because I am not modifying the memory is showed easy to show you with the same example precondition, but I encourage you to use the STR also with all the mode. So, that you understand the implications of them you can do all the all of this mode using STR also ok. Now, let us understand what happens here by now you should be able to clearly see that see arithmetic shift left what is arithmetic shift left left is what this one right which registers R 7 what is R 7 is having now this having 1. So, 0 0 1 shift it by 2 bits it becomes 1 0 0 and then am I doing plus or minus R 7 I am doing plus ok for a change I am doing a plus here because I have taken R 1 here. So, R 1 is pointing here I am doing a plus 4 here to R 1. So, R 1 will start pointing at this location that is what is happening here got it and that it would have access this lag here because it is a post index it will use the value what is the you know what was there inside and then modify it with the by performing this offset addition or subtraction based on the instruction. I hope now all addressing modes are clear to you ok enjoy the last session with all of them ok. Now, let me tell you some how it is implemented inside with some example some more data. If you remember there was a W bit maintain inside the instruction format to say whether it is incremented or decremented and then this optional write back ok if it is 1 you modify the base return back into the base use for p index ok. The world value base value is not this type if it is 0 ok. So, if it is 1 the change the base address is return back into the base that means, you have mentioned this ok and it is used this is used for only pre index if you remember in post index you do not use it, but anyway it is default assume to be like that. So, in the post index just for your remembrance I am saying what is post post index. So, the calculation of offset is outside the square bracket that means, post index. So, default this is anyway written into it because if it is a post index it is since it is going to be written always the value the W bit is not new for a post index instruction ok in a post index instruction W bits purpose is different that is nothing of concern to you just I am telling you that this is the way the possible increment. So, write back bit is redundant for in a post index because there is a separate bit is maintained whether it is a pre index or post index in the instruction format. So, you do not need two bits to say to do the same thing because in post index we have already said that in a post index this offset what is computed has to be written write back in written back into our base register. So, do we do not want to say the processor they do not want to use the same function in a write by saying that write bit is also done. So, they want to use it for some other useful purpose. So, they made this write back bit is 0 in case if it is always they make it 0 in the post index format, but they will write back the processor will write it back into the base register please remember that ok. And if you do not want to actually write back anything please make this whole thing as 0 or do not even mention then it will not be disturbed the base register will not be disturbed. Now, you may wonder why form designer why they have have they desired decided to do this because they want to use this write bit for some other purpose in the post index data format in a privileged mode ok. So, what I mean by that is may be I will give you a slight explanation here later on when we are talking about MMU we will talk about it. See you know processor is here CPU ok CPU means the whole chip and inside that our ARM 7 PDM is sitting. It is accessing the memory using the MMU it could be inside also ok SOC MMU can be inside MMU is what memory management unit. Now, when it is in privileged mode it is in operating system is running and you know that if you have basic OS and then OS memory space is different from the user memory states. What I mean by that the MMU makes sure that user do not address the OS memory states because they can come and corrupt the OS data structure or a code by writing some erroneous code in the user space or may be by mistake they do or by intention ok malicious software can try to modify the OS code. So, MMU makes sure that if you are in user mode you are not allowed to access the OS space. That means, what MMU always make sure that in the system mode when the OS is running it will always map to the memory addresses generated by the processor to the OS memory states. Now, there are occasions where see the OS ok the OS needs to access the user space why suppose is a paging is involved and then you know some data one page of the user space is outside the you know it is not got a demand paging is there it is in the hard disk and it has to be moved into the user space it needs to be copied into the US user's memory space. So, when it has to be done it has to say I am not interested in accessing my own space, but I am interested in accessing the user space. So, to indicate that they have a use this W bit internally by the processor. So, processors have a which mode the processor is running if it is in a system mode it knows that ok OS code is running now. So, if the W bit is set then it can be used for informing the MMU to access the user space for copying some code from this to user space or something. So, for this kind of operation this is done we may spend some time on this later when we talk about MMU. So, I did not want the continue to be to be last. So, I am explaining you here ok I hope you got this. Now, I am going to talk about the addressing mode to access the unsigned right ok. We we wrote so much about examples we saw with the LDR. So, I have I want to show you using one of those modes to access the byte ok. So, if I remember LDR is just a word access LDRB is a byte access. Now, assume this is the way a memory is organized I have now I am interested in showing you byte level. So, I have put it this way and then please remember whether you are using this this whether it is written this way or not depends on the end endness of the processor. Assume the processor what I am having right now is you are doing little Indian mode ok. The simulator also what you have what you will be using in the lab session always maintain it in little Indian mode. So, what does it mean? Suppose you are interested in storing this value in starting from this address the least significant byte will be stored here and then the next byte 56 will be stored in the next address so on. So, one night is having a 7 8 1 9 has 5 6 the next address has 3 4. So, it is going in this order starting from the least it is a little Indian. Now, you know why I have mentioned different labels with a different value. So, that you can understand how it is organized in memory this is the way it is organized ok. Now, if you are interested in accessing a byte you have to say which byte also. So, in this case R 2 is having is actually at you know pointing to this address and then you are saying plus 1 that means, in this. So, you are interested in a byte access. So, only one byte stored here is accessed and moved into the register. Now, please remember register is a 32 bit value. So, if it is writing E f you should also make sure that other bits in the registers are all made 0. You may wonder why is it required? I am only interested in copying a byte loading a byte from the memory assume if R 5 before this instruction was executed was having some ok some value random value ok like this. Only if you if the load a LDRB modifies only 1 LSB what happens to the remaining bytes in the register because later on this R 5 is going to be R 5 or whatever the register you are going to use will be accessed as a 32 bit whole 32 bit will be accessed. So, you are going to likely to get into problem if you do not make sure what happens to the upper byte. So, if you are intentionally you want to only copy 1 byte you may have to double it out with 2 registers being used and then R it with the other values and all that, otherwise this instruction takes care of making sure that the higher labels are made 0. And similarly this R 2 is not modified because there is no this sign ok there is nothing like this. So, it does not modify. So, you I hope you understand what is the byte access. Now, if you recall I mentioned that when byte access is done if it is a store it will the same byte value will be put across all the you know 32 bit data bus all the bytes will be written with the same byte value. So, that memory can use it in a way it wants here anyway loader will also only 1 byte comes from the memory and then bytes into R 5 here ok very good. Now, let us see one more example here I am interested in third byte from base which is our base R 2. So, R 2 is still pointing here only. So, please remember these instructions are all independent ok they do not all of them assume the precondition is this there is no effect of this instruction on this instruction. So, it always assumes the precondition is true that is the way I have you know shown all of them. So, that you understand the different instruction to say this. So, here plus 3 means R 2 is originally here. So, 1 will be bring here 2 will bring here 3 will be brought here. So, you are interested in accessing a A B store here. So, that is what coming here R 5 and then the IR may be termed as B O brought it and R 2 is not modified because you are not you are not you I have not mentioned the exclamation mark ok. So, we are done with that let us see a few more examples where I am scoring a value ok. Store byte R 6 into R 1 when we say byte ok always the L S B of R 6 ok. Oh I am sorry here I am going the wrong direction it should be this way sorry yes sorry I will erase it I do not want to confuse you now see here storing means this way only we are doing the value in R 6 which happens to be a 4 here the L S B is 0 8 0 4 ok L S byte please remember a byte is 8 bit quantity. So, that will be a 0 4. Now R 6 is loaded into R 1 R 1 is pointing here. So, that is why you see that only this byte is changed got it store is always this way from register to this store. So, in the way register and store register show the register a byte value only. So, you are doing this one more example suppose R 1 you are adding it with the 0 1 because initially R 1 was our condition is R 1 is pointing at 1 8. So, I am adding it to at 1 and then using it here ok. So, R 1 is made point here that is why you see that only this byte is over written with a 4 because R 6 is having the 4. You suppose R 6 was having a value 1 4 you would have written you would have got 1 4 getting written here ok. So, the adjacent bytes are not disturbed please remember only the particular byte gets written into though I say that data memory you know all 4 8 bit values will be sent with the that 4 whatever is this is only used by the memory to extract one of the values and then write into the relevant byte. So, it will not write in all the places. So, only that location will get more written I want you to try out this. So, that you understand what is happening with the byte ok got it. So, I have given example square load byte as a store byte. So, now let us see what are the special conditions you need to remember with R 15 because R 15 is always our a special register right. So, the ARM architecture they say do not ok they say must not be specified the write back must not be specified is R 15 is specified as a base register base register is R n in case if you have R n as R 15 please do not mention this that is what they are saying, but our our simulator allows this, but it will result into undefined instructions or it could result in the erroneous execution. So, they advise that do not do it I am not sure whether simulator is always allowing, but please refrain from using R 15 as a R n ok there is no need for you ok that is what is suggested by the processors designer. One more thing we should remember that when using R 15 as a base register even if you are using a base register whichever write back you may use it ok, without a write back you can use a base register. You have to remember that the value what you will be getting is not the address of this instruction, but plus 8 that is because of the pipeline I have explained you one several times the pipeline because of free fetch R 15 would have advanced to plus 8. So, the operand is read only in the execution stage of the instruction it is not read ahead. So, because of that what you will be getting R 15 as a R 15 value is a not the current PC value, but when it is a current PC value means the PC value of this instruction, but plus 8. So, you have to comprehend this when you are writing assembly code or the compiler also will be aware of this and they will generate the code upon ok this we should be aware. And then one more restriction is there that R 15 must not be specified as a register offset also. So, R m is here. So, do not mention R 15 and do not when you say R m cannot be mentioned as R 15 you cannot do any LSL or any operation on this also ok because it might lead into a error on this execution. So, that is all these are the restrictions with R 15. So, every instruction will have some special restrictions for R 15. So, I thought you should be aware of it this is all what is mentioned in the ARM manual ok be aware. And then about store there is a one more thing you should remember ok. If you recall the data path for the load and STR in the last session what I mentioned, I told you that there is one more cycle taken for writing back the value into R 1 right. Whether it is write back is there the same value will be written back or the new offset value will be write back is a new offset value written back. So, one more cycle is taken. So, why R 15 in the you know when R 15 is a source register of a register store information instruction the stored value ok the stored value will be address of instruction plus 12. Why? Because if you recall the address generated by the data path inside the processor is always it generates the address for the next cycle ok. So, let us say let me explain you. If you recall we had shown a pipeline STR was here if you remember add to add was there one after the other ok. So, I told you that when STR is there it is storing a value from the register to the data memory. So, what happens is it will be doing on a you know internal cycle and then moving that value out through the data bus ok. Now, during that time the pre fetch for this register is already started because that address is generated and then it was put in the address bus because why the storing is happening ok the previous the sorry next address which is already starting. So, because of that the R 15 would have been modified to access the instruction of the add that means, what this is plus 4 this was plus 8. Now, when they actually you are storing the R 15 when you are accessing it from the register file. So, R 15 is already pointing at plus 12 that is why you are seeing this plus 12. I hope this is you are able to follow it is only a special condition where R 15 is used because another registers contents would have been modified because of any of the pipelining operation, but R 15 is a unique thing because it gets incremented automatically. So, if you use that value to be saved into some memory address you are going to access this R 15 only in the late part of the game. You generate the address for the memory and then you start pre fetching the next instruction and then during that time you are going to trying to save this value. Address generation is started and then you are saving this value that time what happens because you already generated the address the R 15 would have been incremented already by 4. So, you will get a 12 instead of 4 in this case ok. It is a very very unique casesome of the simulators may not simulate it fully. So, it depends on the implementation of the simulator, but please remember this is the way internalize the process of the so that you should be clear. So, that is why I have given examples for each of the cases ok mentioning about the different write back different ways R 15 could be used ok good. So, this is the very complex part of that whenever you use R 15 in your code you better be aware that you are going to cause some side side effects. So, be aware what you are doing, but I still encourage you to change this write out and see what happens because as I told you when you encounter this instruction it should be in a position to understand what happens. So, unless you try out some instruction you cannot understand it ok. So, we are coming to the last part of this address mode 2 is a instruction timing. So, what is that I am showing here ok. If you recall I have mentioned about this cycle, internal cycle is something which is like you know incrementing the offset value and then computing it internally data path is doing something nothing to do with the memory access that is called internal cycle. What is sequential cycle? It is a accessing of a PC you know it keeps on accessing the from starting from address and next the subsequent addresses are accessed from the memory instructions are accessed by sequential address. Similarly, some block of memory when you are doing a multiple load the data also can be accessed in a sequential address ok. So, why is it taking one as own internal cycle that is because LDR operation or is you know evenespecially LDR is where I will be coming here. So, LDR instruction has to compute some offset both LDR and LDR they compute the offset using one internal cycle. That is why you saw that after offset calculation the data transfer happens offset computation is one cycle and then data transfer is another cycle if you remember. So, one internal cycle is consumed by offset good. Now, why is it oneness? If you see the accessing the execution of a pipeline in a normal case ok when normal flow happens you get one instruction coming out every sequential cycle. Please remember the pipeline movement is a execution stage oneness cycle that is in a in this also decoding after that one you know one cycle is taken for one sequential cycle is consumed by the instruction when it is spending that in the execution stage. So, that is why oneness is given. Now, why is this oneness given? Because when you are loading or storing in a memory you are generating a new address to do that memory cycle ok LDR or whatever here we are talking about LDR or HDR. So, you are using a a new address you are computing every time it is not sequential from there the previous access was done. So, there is a non sequential access involved with the every load or store ok. So, this is also executed understandable. So, this is the total amount. So, you may wonder why is that separately they are giving S and N? Because the S sequential cycle and non sequential cycle they all exactly how much time it takes depends on the memory being used ok this not fixed. Suppose, if I in my system I have a 16 bit memory 16 bit data bit memory then everything I may use you know 2 2 cycles for doing the access similar compared to 1 32 bit memory. So, the processor does not know which what kind of memory is being used that is why it is easy to say in terms of this rather than saying exactly in terms of suppose ARM processor is running in home metal it is just an example nowadays no processor is running in this flow speed ok you cannot say that ok it will take you know 3 micro second or whatever you cannot call absolute number you cannot give because it is tied to the memory with which the processor is integrated with that is why they are giving it in this format. So, you can always deduce from the memory that you are using you can deduce how much time if this instruction is going to consume for execution ok. I hope you understand this now let us see again the PC is always unique it always plays a very important role here what are we trying to do we are loading R5 ok with address whatever is there in R1 into it effectively what we are doing we are trying to move the control show or wherever R15 is I will parent we we are moving to some location it may not be a particular location some location we are moving it to now would not it involve crashing the pipeline because pipeline has already been filled with the 2 subsequent instructions ok which was there after this LDR now they need to be flushed and a new instruction whichever the R15 new R15 is pointing at has to be put into the pipeline. How much of time will be wasted 2 sequential processors this much of time will be wasted that is why you see here got it now this what is this 1 internal I might have put some whether I put here whether offset internal or you know 3 index or post index 1 slightly anyway is wasted internal set is wasted for computing the offset. So, 1 internal set is done it has to be spent now what is 2 a 1 is suppose when you are doing a LDR you are not loading the value in R1 you are loading the value pointed to by R1 see suppose R1 is pointing at some address function again whatever is the content here is loaded into R15 that means, what this instruction is doing a non sequential access of a data non sequential access this is 1 non sequential access and another non sequential access is to go to the new R15 and access the code. So, 1 non sequential 1 n cycle is for accessing a code and 1 n for accessing a data pointed to by R1 got it that is right 2 n is here. If you do not understand listen to this particular explanation again you will realize know everything makes sense ok these numbers it is very important you understand this. So, that you completely you are you are clear about what is happening in the processor very good done. Now, a store is a little different from LDR only slight different you can see that 1 9 is same as this this is also same this is also same it is an additional same while this is a due to store okthat will be because of the store operation is involved the data value has to go out. So, that takes care of this particular additional cycle involved in the storing of value ok because the data path is consumed by for loading that value data path ok. So, this ends the summary now let us see what happens just I want to summarize this offset from base either 12 bit unsigned binary or a second register offset could be a pre index or post index base from the base ok. So, the stored base value may be written back this is a base or kept as is and LDR SDR has a byte offset which is affected by a ndns of the processor ok. So, and then one more thing which I have not talked about so far fine extension is valid only while loading a byte and not while storing them I will explain you ok this is will be explained in the next section, but just suppose you are storing a byte value into the memory you are interested in writing only one byte ok. Similarly, if you are signed byte if you are loading ok signed byte ok that is what I am going to be explaining in the next lecture now immediately after this section. If you are loading a signed byte signed byte into a register ok you are occupying that the byte which is being copied from the memory occupies only one byte, but if it happens to be a signed byte I want the processor to extend the sign so that it preserves the value ok. Any signed value will preserve its value if the signed byte is extended to any amount of it even if it is a 64 bit value if you extend it all the way it will be the same thing ok. So, that is why when you are loading a value from memory to the register because we are moving into 32 bit register we have to make sure that the byte is sign extended into the upper part of the register ok. Please remember this is on uniqueness of story I will explain you anyway in the next lecture. Now addressing mode 3 ok this is something to do with the half word and the signed byte what is the difference so far whatever we have seen in LDR and XDR we saw how to store or load a word how to store or a word and unsigned byte ok remember unsigned byte. Now we may be interested in storing a signed half word or half word ok or signed byte these are the different things that user or the compiler may be interested in doing. So, ARM processor supports it, but this is supported by a different mode which is called addressing mode 3 let us see. So, this is the kind of instruction format you have to say LDR XDR conditional square and then you are supposed to say any one of them whether I am interested in doing a unsigned half word or signed half word or a signed byte. Now what is half word 16 bit ok. Now what are the other combination word and byte unsigned byte if it is a word you would have just said LDR or STR if it is a byte you would have said LDRB or STRB. So, these two formats are taken care of only this three things to be taken care of. So, they have introduced another instruction where you can say with the LDR STR followed by these values ok. These are all like similar to what you used to do yes for whether to affect the conditional flag or not you have to mention this. Then accordingly it will generate the proper instructionit will encode it in such a way that the intended transfer happens. So, I have shown this it is only possible with a pre index ok this is a pre index format you can make out right and then the optional write back is there ok and then this is a decision register. So, this is the complete format of the instruction and if you use this format if you are using a offset to post index format the same thing is true with the offset going out ok and there is no exclamation mark here because you are not you are always this instruction will be over writing back the value into the offset register you got it. So, if you are using pre index format this post index format this, but actually this is remaining the same ok you have to append it with the one of this values. We will see an example then it will become clear to you only thing what you have to remember is that the octet value is not as bigger 20 you know 12 bits earlier instructions it is only a 8 bit value or you could also and then register offset is also allowed and then this two bits there are internally used for giving the data type. So, effectively it means load sign write ok. So, it is fit into load and store a load this or this or this ok only in loading you will be doing this, but in storing you will be doing the half word ok. So, when you are storing half word storing only is done and then store byte if you are doing you would have used a str byte instruction ok. So, you will not be using this instruction for a store byte because I told you store byte does not have a byte you know unsigned or signed it is only unsigned when you are storing it into the memory. So, str you could have used it. So, this instruction that is why it does not support storing other bytes only half word is supported because the str instruction does not support half word store it only supports byte or if you do not mention a byte it is only a word. So, this is what are the different things supported in the this particular mode 3 instruction. Now, let us see we have a precondition I am having this now let us choose a pen here for. So, what happens here I am using a load half word. So, load is what this one right. So, what is 0 2 you have to add whatever is r 1 plus 8. So, when you add 0 2 plus the byte it is this one right. So, 34 comes to the lower side and 12 comes to this. So, what happens is when you are loading a half word ok you are loading into a 32 bit value if you are only loading a 16 bit value it is always moved into the lower part of the register in this case it is r 15. So, this value which is pointed to by this address this 34 6 year ok and 12 6 year is the little Indian. So, 34 and 12 6 year. So, this is the way it is done similar to byte if it has a byte was loaded it comes to the lower part of the byte and then it was doing a sign x 1 you know it was back filling it with a 0 when you are doing a LDRB ok you saw the example last time. Now, LDRH we are seeing here which actually copies 12 34 and then fills the upper portion of the 16 bit to 0 ok. Now, let us see this what is it doing r 2 r 2 is this value this value and plus 2 you can write either just a 0 ok at that time you do not have to mention a offset otherwise you have to say 2 because it is a 2 byte aligned addresses right half word means it has to be 2 byte aligned. So, you will mention it as this one. So, what happens this is loaded CD AB and then please remember here I am using FCA it is a signed half word. So, when I say signed half word if the loaded value the MSP is set the 16 bit value MSP is set in A A means what 10 can be represented by 1 0 1 0 this is 8 this is 2. So, this is A correct. So, the 16 bit value bit 1 is the highest MSP bit is 1. So, that is extended here because the user is saying the assembler programmer is saying I am loading a signed value which is stored in this address ok. So, in this address. So, I want the the signed to be preserved. So, when it is copied it will be signed extended ok that is a LDRSH works LDRSB is the same thing, but it is for B byte. So, when you are saying R 2 plus 3 1 is here plus 1 plus 2 is here plus 3 is here R 2 is pointing here. So, AB is accessed AB is moved here into R 5 and then signed extended ok. So, check whether all the simulator does this you know sign extension properly, but, but this is what is the intended purpose of this instruction. So, if you see a difference of between address 2 and 3 address 2 was only supporting word and unsigned byte address 3 supports byte the signed byte and the half word accesses and the signed half word accesses that is what I have given you an example ok. So, I hope this is clear to you if suppose if it was in big big indian mode then the organization of the data in the memory would be would have been different means the 7 8 would be sitting here and then because it will start keeping the value here. So, big indian what how it will be 1 2 will be here 3 4 will be here 5 6 will be here 7 8 will be there in a big indian mode ok. So, because the simulator is a little indian I have given examples all over little indian mode only, but you should have a if there is a big indian mode how the memory will be configured and then this instruction when you execute they will pick a different values because it is stored in a different order in the memory. If you remember a big indian and little indian is something with the way it is stored in the memory very good. So, now another set of examples with a store what are you trying to do R 7 you are trying to store it in R 2 R 2 is here ok and then R 7 is having a value 0 1 and then it is a half word. So, that is why 0 1 is stored like this over written by this value why one comes here because that is the LS byte it is a little indian mode. So, the LSB comes in this way by a part of the memory. So, please see that it does not sign extend or back you know with this 0 or 1 or whatever it does not do because there is no way it can be done along on the memory. So, far is it possible for the process to do this? If it does it it will be wrong first of all you are over writing into some the case where the user was not interested. But even if user is interested in doing it they are supposed to get this value into the memory and write back or they should have written a whole word with a all sign extended and written back, but you cannot do it inside the memory like this ok. So, whenever you are doing a store it does not impact the adjacent byte or word half words in the memory. Only when you are loading from the memory the register adjacent bits are to be modified because later on this program is going to be consuming this value as a 32 bit value. So, if you are copying only one byte you have to know what is the you should tell the processor what to do with the remaining bits in the register. But that is not the case when you are writing into the memory user has some data in it and I am interested in only over writing a particular part of the memory. So, you do only that and leave it. So, do not do any sign extensions or we cannot be done also, but it is not done. I hope this is clear to you. Now, one more example we will see what happens? I try I want you to please it and then see what exactly happens and then see whether what I am showing is correct or not it will you can evaluate you know validate whether you understood the problem ok. Now, this instruction what does it do? This store str r6 r1 store the value in r6 how much as it has to store a byte or a word or a half word or a signed half word or a signed byte what is it supposed to do? When you do not mention anything what does it supposed to do? It is supposed to store a word ok. So, the entire r6 which happens to be 4 is written into wherever r1 is pointing. So, so it is supposed to write the whole word you agree that is what it has done. So, 4 is written and the higher by now see the higher words are also bytes are also modified because your intent was to store a word it will do only what the instruction is supposed to do. So, it has done that now tell me what happens with this ok. Let me clear this and see what is written here. So, we are trying to get whatever is r1 is having ok and then please remember this two instructions are within the same box. So, the beats impact is there on the memory what we see ok it is not like this code and this code this code is together. So, it is executed one after the other now you are storing a again you are doing a store, but this time you are storing a half word in the location starting from r1 plus 2 that means, this address correct half word is ok you are doing a signed word or a you know it is there is no sign or understand right in the scope. So, you are doing a half word with whatever value in r6 what is r6 having this same r you know it is having 4 nobody has changed it this instruction also did not change it this instruction did not change it ok this is independent anyway this this instruction has not changed the r6. So, r will be having code. So, now what happens that 4 is written here now again you see this byte is also changed because your intent was to store a half word. So, it has to be a complete 16 bit value got it. I think with this we are coming to an end I hope all these nodes are very very clear to you I took little more extra time to make sure that I do not rush through and you understand the complete things what happens here. So, please try out all these instructions try out all nodes and make yourself clear with the examples ok with the simulator and read up some books also so that you are understanding becomes clear. Thank you very much for your attention wishing you all the very best with the assembly programming enjoy the course the sessions which are coming up later. Thank you.