 presentation, video presentation on memory organization of microcontroller 16F877A. Myself Mr. Vipul Kondekar, the learning outcomes of this video session are at the end student will be able to differentiate between Harvard architecture and one Neumann architecture for microcontrollers and then you will be able to identify describe the program memory organization as well how stack operates for the peak microcontroller and third outcome will be student will be able to describe the data memory organization for the peak microcontroller. These are the contents in this presentation, Harvard one Neumann architecture we will see then we will go for understanding how program memory is organized how stack operates and then at the end how data memory is organized for the peak microcontroller. Now let us try to understand what these two architectures are Harvard and one Neumann. So if you look at this block diagram here you will find that in this image you got CPU and memory and that memory has program as well as data present. So program data is available in the memory itself and it is interface to the CPU through single bus and then if you look at Harvard architecture you find that CPU is there but the memory which is separated into two parts one is called as program memory another is called as data memory and then to separate bus connectivity is available between CPU to the program memory and CPU to the data memory. So now what you can achieve with this architecture called as Harvard architecture is you can have parallelism you can have pipelining of the instructions where you can have overlapping between the fetch and execution cycles and that is possible in this Harvard architecture where it expects that you should have a separate program memory and data memory. So you know the block diagram of peak microcontroller they will find that program memory and data memory is separate. So the architecture used for the peak microcontroller is Harvard architecture and hence let us try to understand how program memory is organized for the peak microcontroller. You recall how much program memory we have got for the peak microcontroller in the features we say it is 8 kilobytes 8k into 14 is the program memory available. Now how you can access that program memory so basically there is one register called as program counter register. So that program counter register is a 13 bit wide register 13 bit or 13 bits are sufficient to address 8k locations. So this pc can be used to access any of the location available in the program memory. So program memory addresses are starting from 0 0 0 0 h up to 1 f f f h. So these addresses are again divided into four pages page 0, page 1, page 2 and page 3. So paging is done here and then you find that some addresses are very specific addresses like address 0 0 0 0. So this is what this is a reset factor address whenever you apply some reset signal to the microcontroller. So the instruction which gets executed which is stored at this particular address as well you have got one special address location called as 0 0 0 4 h. What you got here is a interrupt vector as we know there are many interrupts around 14 different interrupts are there for the peak microcontroller. And you find that all these interrupts are vector interrupts whenever interrupt occurs the program execution sequence changes to this particular address 0 0 0 4. It will be very interesting to know if all interrupts are occurring an interrupt vector address is same then how microcontroller will understand which is the cause of that particular interrupt. Now talking about the additional facility in the microcontroller along with the program memory and data memory is stack. So you have got eight level stack available inside the peak microcontroller. It is not part of program memory nor neither program memory nor data memory it is a separate hardware stack available. And then you have got four pages each page is of 2k so 8k memory is there. Now look at how stack operates. So you said eight level stack is available. See stack operates stack basically is used for what whenever you are executing some call instruction or some interrupt occurs after execution of interrupt service routine or any subroutine you want to come back to the main program. So how it is possible you can come back to the main program if and only if the PC contents are stored somewhere. So you use stack for storing the contents of the PC. So when call gets executed or at the end of subroutine when you write a return so this stack is used. Now one important thing only eight stack locations are there inside the peak microcontroller. So if you can push for eight times only. If you try to push nine means if you try to have nine successive calls what it does is that nine push overrides the value that was stored from the first push. So if you are going just writing call instructions and they are storing the contents of PC so eight pushes are possible. But if you go for nine so then that first push address will be overloaded by this push nine. So you cannot come back to the main program in this particular case this you have to remember. So it's like cyclic buffer stack basically this for peak microcontroller acts like cyclic buffer. So as such there is no status bit which will inform you that stack is overflow. So you have to make sure that that stack overflow is not occurring because of your program as well there are no instructions like push and pop. So you cannot access stack from any instruction only that call and return instruction as well that return from interrupts. So these are the instructions which can only result into usage of stack either for storing some data on to the stack memory or retrieving the data from the stack memory. Basically it will be an address and that will be contents of PC. Now let us try to understand how data memory is organized as it is a hardware architecture program memory and data memory is separate. So data memory for the peak microcontroller is organized into four different banks bank 0, bank 1, bank 2, bank 3. Now how we can have selection of bank? So there are two bits available in one spatial function register called as status register RP0 and RP1. These two bits are used for selection of the bank. So data memory is available in four different banks and then the bank selection can be done by using the status register. Each bank is of 128 bytes. You will find each bank is of 128 bytes. One important thing is all implemented bank contents spatial function registers as well as general purpose registers. But you will find that some frequently used spatial function registers from one bank may be mirrored. So you will come to know with the next slide what is happening here. So this is again data memory organization. So it is organized into four different banks. But if you look at this organization you will find that let us look at the status register. You will find that status register is available in all these banks. So why they are done like this? So it will avoid the time for changing the bank because if you are in bank one and if you want to access status register and if it is not available in the bank one then you have to write code so that you will go back to the bank zero. Then you have to access that status register to change the bank select. So repeatedly used registers are mirrored into almost all banks so that if whatever bank you are working in you can use that register directly. Now again in this particular data memory organization you will find it is divided into two parts. One is called as general purpose and another is called as spatial purpose RAM. General purpose RAM and general purpose registers and spatial purpose register. And if you look at just this general purpose register in bank zero you have got 96 bytes then in bank one you have got 80 bytes. Again in bank two you have got 80 bytes and again here you have got this 80 bytes per 16 80 plus 16. So this 96 plus 80 plus 16 plus 80 plus 80 plus 16 that will result into 368. So this is what you say data memory available as a general purpose register is 368 bytes. So that's why in feature we say 368 bytes of RAM is there. But along with this general purpose register you have got some spatial purpose registers also. Now this as your general purpose and spatial purpose registers are the two parts of the data memory. Here we will find that that general purpose registers are directly either directly you can access or indirectly by using the two addressing modes available direct and indirect indirect addressing will be done through the register called as FSR register. Now talking about the spatial function registers as we know that there are so many modules available. So those modules require some registers to control and then for that you will be requiring spatial function register. These spatial function registers are again divided into two parts. One will be called as the spatial function registers which are related to the core operations like status register and the spatial function registers which are related to the peripheral like ADC is one peripheral available. So there is one register spatial function register called as AD con 0 or AD con 1. So these are the spatial function registers which are related to the which are related to the peripheral features. Now this is just overview of how you can have different spatial function registers. So these are the different spatial function registers. These are the addresses possible for few spatial function register more than one addresses you are finding because it is available in more than one bank and in that case again you will find what is the significance of each and every bit of a particular spatial function register. So this is just a summary of few of the spatial function registers available inside the peak microcontroller. These are the different references used for this particular presentation. Thank you.