 న్లార్లార్లార్, వందింది. మార్లార్లార్. అధిమ్ల్, క్ఎలినోస్లి. ఇరందరిక్ సిమిస్ పెయార్చిసి. అందిందార్పెత్సి. పాస్త్యార్చిస the course intent is to give you a good overview of processor architecture by taking ARM as an example and then running you through various features of ARM and then explaining the assembly language programming part of it so that you understand the concept behind the ARM architecture and how it has been evolved and give you a good overview of embedded systems as well and tell you how to use various modules and peripherals and to implement a embedded system which is to be ARM based but this knowledge what you gain going by going through this course you will be in a position to understand any processor of particular as well to design any system based on any processor become your and I hope to I hope this will be very useful to you and I will go through this course let me go through the introduction it involves knowledge on processor architecture concept provides deeper study of ARM architecture as an example and gives you how to write assembly language programming how to use the support provided by a single language of ARM and it talks about what is architecture developed by ARM and memory hierarchy and cache systems will also be covered here and peripherals which I mentioned earlier this basically has around 40 hours of lectures along with last sessions using an ARM simulator which will give you a good hands-on experience of using the assembly language of ARM and it helps taking up any ARM based design or any other embedded processor with embedded systems going further the focus of this first session is to give you a top level view of what is a digital computer architecture and what are different types and then we will talk about some instruction set architecture and two types of them which you might have heard about earlier in this concept and then we will give you a brief overview of ARM and then where this ARM core IPs could be used and how the whole ARM ecosystem has developed over the last 30 years and which has in fact overwhelmed the embedded market and it has reached a stage where whatever embedded products you have in fact if you are holding a mobile or laptop or iPad we have mentioned now most probably that it is going it is built based on ARM based devices let us talk about computer architecture all are to aware where computer has some CPU that is central processing unit and a memory associated with that and the CPU and memory are connected to two buses instruction bus sorry data bus and address bus now the CPU uses the address bus to access the instruction store in the memory and this instruction are understood by the CPU then it comes into the CPU then it interferes and reforces the instruction and executes the instruction which will perform a useful function now for an example here a program counter is in pointer which points at a address of instruction and it fetches the instruction and executes it and according to the instruction it shows some results back into the application so here I have not shown the instruction and data memory appropriately which we will talk about it as we go forward basically the computer architecture has evolved there are two basic differences one is one environment model who is the person behind this he has designed a system with memory and CPU attached to the single bus this is the data bus and this is the address bus now the memory is holding both instruction and memory and data together in a single memory system and whenever the CPU is sending out the address for instruction that is especially the same memory and based on the instruction if any data needs to be saved into the memory that same data is also using the same address and data process to access the memory to put back the result or read any data for any information that the CPU is processing is also read from the memory as you see in this system the limitation is that the same bus carries both data what is needed for the process of the as well as the instructions to the CPU because of this at a single memory cycle both cannot be happening simultaneously as you understand the instruction fetch and the data fetch need to happen together and in this case because of the limitation of the physical bus connecting the memory and CPU they cannot go in parallel let us see the same memory holds both data and instruction the CPU fetches the instruction and data from the same memory using a common bus code and data accesses cannot happen in parallel which reduces the speed due to this instruction the PC which is a program counter pointing to the instruction which is being accessed by the CPU gives out the instructions this is the access one of the instructions and we put it by the CPU now as I mentioned because of the common memory there are some limitations the hardware mark one is another as the processor architecture design which avoids from the online architecture by splitting the web data bus and the instruction bus and data bus it is two different locations two different buses and then the data and program are set into different memory because of this the access to the program as well as access to the data can happen in parallel as you can see this improves the parallelism and this computer which is based on hardware architecture can perform more operations and it can do better than compared to one of the architecture which we mentioned earlier now just to give you a brief overview of hardware architecture there are memory and signal copies are different for both instruction and data the CPU can read both an instruction as well as perform data memory access at the same time a hardware architecture computer can thus be faster for a given process because it can do both connection in a hardware architecture we do not need to keep the same memory configuration for both data memory for an example instructions need not be changing so that can be saved in ROM memory which is a read only memory and data can be kept in a random access memory which is supposed to be modified by the program so we do not need to keep the characteristics of the memory same for both instruction and data so that gives a freedom for the system designer to keep the choose the memory which is required from the instruction point of view or from the data point of view in terms of access time or in terms of the read we can decide which memory to use for instruction and data and that can be used in the embedded system that we designed using the hardware architecture based on CD so because of this flexibility most of the modern computers in the architecture are hardware connected based now we will talk about instructions and data you might have heard about ASB in your earlier courses on computer optimization this is the programmers view of their machine and which is different from the answering the following five questions how are instructions encoded now I spoke about instructions and data now we are going into the detail of how are we going to encode the instruction what operation the CPU needs to perform if it can add operation or new operation or if it is supposed to do any multiplication or it is supposed to perform a door or store of the data is the data memory so how do we encode this information in the instruction format so that is the part of defining a structure for this is part of the ASB that is instructions and architecture now how is data represented as we know in a computer world we use both integer data as well as real data wherever scientific applications and graphics and other various data data needs to be processed they happen to be in 14 points and we need more precise and high precision data to be handled by the CPU so there is a representation for integer and there is a representation for a floating point as it is so how this data is represented in the system how they are used is also decided by each file and when we say data is stored in a memory there are many ways that we will be able to and we will be talking about that in the comment section so this process design based on the is defined in the ASA and if we say that a processor follows a particular instructions and architecture they all do the same thing we have the same way only thing is these different architectures may have different models and how data can be accessed which is stored in the memory and what operations can be done on this data let us see one by one what they mean now ASA refers to the programmer we do the instruction set it defines the boundary between hardware and software and we say that ASA is identified by the processor and when we go into details of the metro architecture it talks about how a separate internal organizational process is designed so ASA does not talk about the internal organization the microprocessor process and metro architecture talks about it whereas ASA only talks about the detail here and how the data needs to be represented and how it has to be accessed and how the coding of the instruction will be done now for an example if a data needs to be and we have three types I can mention integer of the things there are different integer data format both signed and unsigned we will talk about this we might have heard about once complement once complement and signed into format these are all the different way an integer can be stored now which of this format is being used by the processor is designed by the in sessions at architecture and we have heard about BCD numbers which is binary coded design if you have seen LED displays where the numbers are displayed on the digital talks or any of the digital systems they represent numbers from 0 to 9 so how these numbers are coded so that you will be able to access the binary coded design in the architecture it is also different in ISK now floating point which I mentioned this is the IEEE standard we will be touching upon this format also in the coming lecture in multimedia data there are three ways the graphical representation as graphics processor will be defined here and it could be a specific floating point number used for 3D graphics or it could be a high position numbers of 64 beta now we talk about representation of data now we need to store it in the memory that there are two ways of storing it which are called between the end and the middle end let us not go into detail, we will talk about it in the next lecture about this new representation and then in any typical program there are different phases used you know that there are spaces required for a program that is called sports phase and the data space that requirement and speed requirement if you have done any programming if you have heard about all these things anyway even if you are not aware of these specifically why they are used what they are used for in the next lecture I will be talking about how to use these phases in a program and how they are all tied together in building a complete software program I will be talking about the next lecture and then the ISK also defines the register part this is the place holder for all the data which is accessed from the memory while the CPU is processing them so this is the registers which are inside the CPU and we talk about the sub support of it and apart from this the floating point numbers there are different you know 32 or 64 bit or 80 bit floating part these are the requirements of the procedure except for the registers we are all are attached with individually we are not going to contribute in many other stages in the memory let us now having discussed the flow of the data let us discuss on the how the data can be accessed from the memory as you know when an instruction is getting updated there are different nodes in which the data can be accessed and for a critical processor architecture there are so many ways these addresses could be accessed from the processor and these are all the some of the addressing nodes we will not go into the details of them and when we talk about ARM architecture and when we talk to the data processing instructions we will go into the details of each one of them now all the address in nodes which are supported here are also there and we will go into the details now having talked about ISK there are two things basically the major differences are there you know the way the architect are defined there are two school of thoughts and earlier in 1980s the SISC type of instruction ISK was evolved and from this is the processor architecture let me explain what ISK ISK is a complex instruction set concept the instructions are much more complex what do you mean by complex means there is a one single instruction defined which will perform multiple operations so with that now there are many addressing nodes supported both involving registration memory and support for many complex operations there are many data types as well as strings if you have heard about 8080 processor you might have come across string operations which perform comparison of strings and then when you give to founders when they do the comparison one instruction is there it will compare to each one of strings so the time taken for executing that instruction varies based on the number of characters in the space instruction set architect that tries to keep so much of operations in a single instruction and because of this every instruction might take various number of cycles to be for completing the instruction because of that there are data dependent as well as particular operation is being performed so that is the reason why it is called complex instruction now the data processing instructions so there is a common instruction and there are a given where the operands could come from a memory or a register when you say operands just for an example if you are adding two numbers and then writing the result into under register those two numbers are called operands and we could read it from either a register within the CPU or other operands could come from the memory now what will be the variable instruction as I mentioned because of the complexity of every instruction the amount of bits are needed to encode what needs to be done by the instruction and what is the record data along with the instruction need to be given varies compared to what the particular instruction is designed to perform so because of this typically in the complex instruction system you will see in the instruction then that is the binary bit and then held by the instruction occupied by the instruction varies from one instruction area because of the complexity in the execution of each instruction vary and as you understand because the instructions are complex the logic the digital logic needed to be implemented within the processor but decoding the instruction to know what it is supposed to do will also be complex when you say a particular design is complex that means the decoding logic or understanding the instruction is going to occupy new real estate within the chip that means it needs more digital logic within the chip to be built to understand the instructions coming from memory now this is complex there are some advantages because multiple operations are included in a single instruction you get a better core density when you use those instructions in the application what I mean the core density is the amount of state occupied by the core when you compile your high level language or assembly instruction when you assemble it and then get a binary that will be much smaller because the compiler or assembler have chosen correct instruction for performing your job and effectively we get a better core density because of that now whether the state exists has less number of developers or a given technology the reason being because we have already spent a lot of chip area designing the decode logic as well as other required digital security within the chip to perform these complex operations the effective space required are available for keeping the general purpose registers in the chip you have come down because of that normally you tend to see for a given technology the general purpose registers which are available on a sys processor let us now try this what I mean the given technology is that you might have heard about 190 nanometer or 19 nanometer or even 28 nanometer this is the coming of now these are the different technologies to which enable keeping a digital logic building into the chip so as the technology improves the complexity as well as the number of transistors that could be built into the chip is going up in millions in millions now when you are comparing a sys and a sys processor we need to keep the same technology in mind and then see whether the number of registers supported by these processors are the same or not when we see that we normally tend to see that sys processors support less number of developers because of its space is occupied by other complex circuitry in a system a very important thing that is the decoding of the instruction the logic required for decoding the instruction and examples are the earlier X86 primary processor and Motorola 68K now let us talk about reduced instruction this is the this architecture is actually the ARM is also based on this and the data processing instructions only support the operands registers what I mean by this is that when you have an ad instruction in the RISC based system the two operands come for an ad instruction need to come from full registers which are within the state there are no ad instructions or any other arithmetic instructions or brilliant instruction supported in a RISC based system where one operand could come from register and another operand could come from memory you would wonder how does it reduce the decoding logic of this instruction if we need to encode information about the two operands in an instruction if suppose a particular processor gives 1660 general processor registers we hardly need code this to represent where this operand is coming from whereas if the instructions need to support operands coming from memory also then we need to say where this operand is in the memory suppose if memory is what the maximum physical addressing capability of the processor happens to be specific bit then we need to mention in the instruction to say where the other operand is coming from basically what I mean by that is that when you have operands coming from memory we need to know this in the instruction to mention where this operand is coming from and because of this our decoding logic also increases and our instruction becomes changes based on the operands so RISC is the second later on hence you may wonder if all the operands are coming from registers for data processing then what is the need for a memory so then the memory is holding the operands but prior to doing any operation on it that need to be brought into the CPU and then other data processing instructions need to be used to operate those data now it can really easily you can see that because of this we are adding more instruction suppose if you want to add three numbers one happens to be in the memory and another one is in the register using a RISC processor we cannot perform this operation you can do this so we need to have one instruction to bring the data which is in the memory to a register and then perform the operation that we want to do so RISC to perform the same operation we need more instructions so but the processor that need to support the number of instructions in the encoding have come out because we are not giving only options for operands to come from memory once you give multiple options to take the data from memory we need to support all the other three more because of that the number of instructions explore more when we support operands structures from memory now how does RISC manage to have six lengths of instruction because the operands are coming only from the registers we know how many registers are in the CPU then the number of this required to configure the operands source locations or the destination location is fixed so the RISC computer can afford to have six lengths of instruction when we have six lengths of instruction the decoding logic becomes simpler so the amount of space or the logic spent in decoding the instructions have come down that quickly now as we simplify the decoding logic it also increases the speed with which that instructions would be decoded and because of which any instruction I would say can be completed in a single cycle of execution now as I mentioned to perform the same operation we need multiple instructions naturally for a given functionality the code size increases in the RISC process now you may wonder if the code size is increasing how is it better than this but the reason being inside the CPU we are able to run it faster and we are able to complete the instructions in a single cycle most of the instructions in a single cycle even if number of instructions are more in a RISC processor the effective performance output that we get from the RISC is always better compared to other complex instruction system then more advantage of RISC processor is that we have simplified the complexity in the coding logic and decoding logic so because of that we have more barrier to be used for keeping lots of general purpose registers in the processor and what is the advantage of having more processors in this chip we we can afford to keep the operand that are coming from the memory for longer duration in the CPU register because of that the need for the program to go back to the memory is coming down because we have enough number of registers to operate so effectively this reduces the memory accesses and increases the performance of the RISC and some of the examples of RISC there are many architectures but there are many so let us now catch up on ARM support RISC and give you a brief overview of ARM and where ARM processor is in terms of the embedded system and then we will go into the details of the the technical system so a ARM computer is a first company which has been established in Cambridge working on processor architecture and they came up with their first CPU which is in the and this was the characteristics of that processor which came out of the ARM computers in that as you see it is came in 32 and during that time the processor architecture was revolving from the 8080 to other high-end processors in the Intel family and the other processors were also revolving during that time so the speed as well as the size of RAM and RAM what is being this for a general ARM computer is much much lower than what are needed are required because of the requirement of the processor performance so a ARM computer is ready to set up advanced research and development sessions specifically to a ARM RISC based system that time RISC was in the research institutes they were debating that why not go deviate from this way of implementing processors to a RISC where you simplify the processor architecture and increase the performance it was a revolutionary idea that time and exactly put on that and it was successful in coming up with the first CPU and it was big with just 25000 transistors in it and that was the first commercial system which really revolutionized the architecture computer architecture area arena architecture and it thought I will share the core ARM core that was designed by Akon here and let us see from there it went on to start a new company which is for this advanced RISC machines in 1990 and the goal of the company was to build a low cost low power high performance CPU why do we need low cost and low power because we wanted to build chips which consume less power so that it can run on batteries and the mobile phone the laptop that you are building and you might have them running for longer duration before going for charging them more often and this particular RISC processor help you in making that build come up now ARM decided to build processor cores but they were not making the chips based on their cores they did not have a path what ARM that is they concentrate all their energy in coming to the new architecture innovative architecture in a low power low cost for a low power low cost market and give that processor design of an IT core to other chips companies who integrate that ARM core along with their other peripherals and application specific core processors and build a chip so ARM is not building any making ICs but they their persistence is there in every chip that is coming out in the hardware market now what is IC all of us know that it is intellectual property but how is it used by ARM so IT means that it is owned by the company designed that chip ARM which is coming up with active design for a processor which owns the IP with it and what it does is it makes those designs and it used to be IT design engineers and other companies who build the chip based on ARM and the ARM core IPs are integrated with their put of some other set up with low logic error which could be provided by ARM or it could be developed by individual companies who buy the ARM core IP and the chip is built using that the core IPs could be a microprocessor like ARM or it could be other special function co-processes like DSP or Ethernet or ARM and there are two types of IP one is a hard IP code what I mean by that is that the chip is completely built even exploring the plastic package around it so this can be used as a single entity into the any other design so because of this the electrical package is perfect when this IP code coming out of the ARM or it could be any company doing business in a hard IP and their type and functions are fixed because they are used for building the chip is already done and the chip is ready so the shape the shape means the you know how many millimeters or you know square millimeters of size that is also fixed and the process, silicon process I mentioned about a 99 meter or 48 nanometer so that technology they are used for building the chip is also fixed so the company which built the hard IP code similar technology to build a chip around it now we want the customers to have much more flexibility then we give any product out so ARM also thought of giving a soft IP code so that the customers will buy this IP code and do some changes to that but they can change only the size and shape of it but not as a design that is the characteristics of the design that means this soft code though it is given in a soft code format they are not supposed to be modified by the end customer who is taking the soft code IP from the company which is providing it so there are no legal rights so what are the hardware the source code of it and often the source code is encrypted so you may wonder what is the flexibility that we get from soft IP code the when we are integrating any third party IP into a chip the flexibility that is acquired not to change the internal design because if we are going to do make any changes to the internals of IP from other third party company then we could have that could have been done in the company itself so when we buy any company does not want to change anything and even the company which is providing the IP does not want the company to modify anything but the flexibility here is that we could place those IP based on other the intervals or other process application specific security in the chip and we will see if the customer is able to make any changes to the size or the shape of the IP and the value into the chip so that the final design is coming out performing well in terms of speed and power dissipation so this advantage is bought by providing the soft IP code now there are some reference metrologies which ARM is providing by what is the tools company so it is not that we can just buy the IP and build it with the chip so we need to make sure that there are tools supported for that so ARM already has a high effect on the when you own any company and they already make those tools available and libraries available so that the end customer to buy the soft IP from they could integrate with their chip now let us just touch upon ARM design philosophy how they have the first and the rest of the customer companies then philosophy is that it is very simple and powerful and the whole family of process sharing is a design principle that is the ISA is mostly common across different families of processes and there are so many designs which are architected by IPs it is a bought by well known names in the nut tech and IPs are integrated by other vendors in their designs to build a SOC along with their preference now this is to just give you a naming convention that ARM follows may be when we talk about the details but how to realize what are the features supported by a particular chip when they say that these are the name of the chip that is now as I mentioned ARM service based system is having powerful instruction but most of them I say most because some of the instructions in ARM I will talk about that why they have deviated from the RISC to get a better performance and the requirement of application now there are basically some support high level design guidelines instructions there is a reduced set as I mentioned about RISC and most of the instructions for complete in single cycles and they are all fixed and the pipeline the decoding is done in one stream as I said the RISC decoding is simpler so it could be done in single cycle so micro code is another which takes more cycles to understand the complex instructions but because this is a service based system there is no need for a micro code which is again a smaller set of micro program written to understand the particular instruction to execute them inside the processor which has got large set of registers and this is very important thing to remember that all the memory accesses are done using only a few classes of instruction which are called loadings though that is the typical of any RISC based system and because the simple design can run faster and as I mentioned there are some deviations if I talk in the later session it is a smaller processor for load or consumption to be used in RISC system is the target market for RISC system and it can also ARM also has a separate mode for thumb mode which is as a 16 bit instruction whereas the typical ARM or technical bit instruction so this high code density design is for thumb mode where the instruction which is produced which are supported also so which are suitable for a very low power recovery memory system environment and this also provides different types of memory can be interpreted because the way the memories are interface with the ARM code there is a lot of flexibility in the programability supported in the ARM which helps in configuring or building a system using any low cost slow memory faster having a reduced size for a particular manufacturing and the cost of the manufacturing is also less because of that and there is a lot of support given by ARM for developing real-time application what I mean by that is that when we need to develop real-time applications we need a lot of support in debugging them and trying to make sure that the application that we developed sticks to the real-time requirements and there is huge support gives you all the flexibility actually the architectural supports are also given to the taking care of the RTAs real-time OS requirements of course with no process can be successful in the market without the proper support and ARM has worldwide support network as well as a whole lot of an ARM ecosystem build which helps in coming up with ARM with these systems before we end the session I just wanted to show you the ARM ecosystem which is there in this market now this is there is a ARM technology access program basically this is a framework for collecting and enabling completing competent design center which are capital of buying the SOC from ARM and building the system on getting so ARM has a method of doing it and there is a whole lot of companies who are part of this program this is one of the strongest support network in between the design industry and we have ARM community which is there lots of partners and the support is also coming from ARM as well as for the partners doing a design services support so if you spend some time on those you might see every company in the embedded domain either from OS or from the companies you could see them here maybe I can point out to some of the companies which are well known so in short there are plenty of semiconductor companies as well as RTAF vendors like QNAS and Wind River these companies are there you are part of ARM and you are using the ARM base in their file so what are the market landscape this is the latest news in 2004 that over 50 billion ARM power have already been shipped so far this is one of the key achievement I will say that in the ARM so now you understand ARM is how important because it is all over the world and knowing ARM process architecture and understanding their features and knowing how the program is in ARM will certainly help anybody in this embedded area to be successful in the market and this is one of the most licensed processor course in the world and it is used in any embedded products that you come across GBA as all of you may be interested in gaming and you would be surprised that these are also based on ARM base so we are going to learn more about ARM 7 which is in particular between architecture and there are subsequent family and ARM family processors once you know internals of ARM 7 knowing them other processors would be easier helpful for you to know this so that you know you understand the future project also in this lecture we will concentrate more on the internals of ARM 7 as well as some of the specific features supported by ARM 9 then there may be one or two sessions maybe to talk about the future ARM processors and how they are evolving into the support required for 64 bit processing and other processes those things will be forward in the last session and more than 70% of the 32 bit embedded processors are ARM base maybe it could be more at this moment and it is especially important because of its key design criteria that ARM wanted to build a low power so which has helped in terms of achieving 50 billion because you know that number of mobile phones in the world is increasing the mobile connection and mobile equipment so the company which has designed the processor specifically targeting the low power is able to do well in terms of the noted position and these are the latest products which have come out which are all ARM based and some ARM source and for this course I will be referring to two books which are given here and I will also be referring to the manuals which are available on the ARM website and we will talk more on ARM 7 assembly programming and then we will talk about other ARM 9 systems in this course and this is just to give you a summary of what we have covered today and looking forward to an interesting session to talk about more into details of ARM and how it has captured the market as you have seen in the slides today and it was fun talking to you see you in the next lecture thank you