 So far what we are talking about mass capacitors, this is also will be taught or may be being taught right now by Professor Vasi. The books he may have been following or may not be I am not sure but these are some listing where you can read mass capacitor theory, practice, measurement, technology, everything the best of course for the mass physics and may be measurement as well is by Nikolay and Bruce. They are the first few people who first time made a mass capacitor in Bell Labs 1960. So they are the pioneers of mass capacitor business. Bruce is the president of get take that is Georgia Tech University, Nikolay is no more. Solis State Electronic Devices by B. G. Streetman, this is a second year, this is a book which I teach or most of us teach for the second year course on solis state devices, electronic devices. If you are really working on mass capacitor related or Professor Vasi or someone who is doing only mass, the best book probably is C. T. Sa, it is very difficult to read and understand. It has some 8 kinds of fonts, underlines and everything. So first run you have bold letters, then you read the next one, then you refer back somewhere. So it is a great book. C. T. Sa is very famous person. As I said last time he missed his Nobel Prize, Goodsberg and Sa. You know long time if you leave Bell Lab you miss the Nobel Prize, they did not realize that time. Okay. Okay. So let us talk about what we were talking. So this is just for those, someone asked me after the class. So I thought maybe I will inform and of course my notes have nothing to do with any of these books or maybe all of these books. Okay. Either of it. Okay. We were discussing last time something about the equivalent circuit of a, so why I am spending so much time on mass capacitor because that is my brilliant butter for microelectronics. If you are working in microelectronics area with any of the faculty and most of the faculty is now working in the technology or device area, barring few in circuits. They will be keep hampering on this. Okay. So I thought maybe it is better if I give one more perspective of mass capacitor. Much details can be obtained by books or as well as discussion with your perspective or otherwise guides. Always seniors who probably still do not know. We are talking about when the VGS becomes minus value, the accumulator in a for a p semiconductor substrate the mass capacitor is called enchanter device or electrons are going to come in inversion if you have a p substrate and sorry holes are coming to the surface and therefore we say accumulation mode and in accumulation mode larger the charges near the surface more will be capacitance associated okay. So essentially what happens that in accumulation none of these capacitors come to picture because the none of them is related to minus VGS only CP is related to minus VGS however the as the capacitance starts increasing because charges are very high in the accumulation. So one can see dq by dv if the charge is very high with a small change in voltage obviously the CP will be larger and if CP is larger one upon omega c will be smaller. So in fact in accumulation I said earlier day that it is only oxide capacitance which dominates is also visible from this however in a weak accumulation CP term may appear which may be comparable to C ox value okay. Normally accumulation goes plus VGS to minus VGS VDD and at those places the accumulation charge is so high that dq p by dvg is very very high and one can say CP acts like a short circuit actually and the other capacitance anyway do not exist and therefore in accumulation we say the oxide capacitance is all that we measure or monitor that I repeatedly tell you very close to zero value where with minus VGS CP term will come into picture and then you will have a series combination of C ox and CP no one really interested in that area very much and therefore no one measures too much on this but in case someone wants to do yeah that measurement is also possible with minus small VGS you can do some measurements at least HFLF measurement and for figure out what is the CP value but say CP value keeps changing it is not very crucial for us near the zero value where it starts depletion later so we do not measure this any time but it is not said that it is not there it exists okay. So I always say what is possible and what is reality okay reality no one does anything that is more reality okay no one does anything but here is something you have to do once the inversion sets in maybe this figure I kept I will keep separate so that I keep coming on the figure once the inversion sets in you are already a depletion charge which I described a bulk charge then there is a QP which is essentially 0 because there are no whole charges in the when you go plus VGS however we will generalize the terms and whichever term is invalid will say leave that term okay right now I keep all charges accumulation all others will go away only QP will appear in case of this so I will keep writing all charges and whichever are not valid I will just leave them out okay. So in case of inversion so okay so I already said so now let us say if I say the gate charge which is QS plus QID in case there are interface states in the silicon silicon dioxide interface then the gate charge or the total charge in the metal is equal to QS plus QIT where QS of course is QB plus QN plus QP but as I say QP will not be there when QN is there when QN is there QP will not be there so either way but we write all of it. So if I differentiate this QG then delta QG is minus delta QS plus delta QIT differential simple then capacitance is defined as change in charge at the gate as function of gate voltage so delta QG by delta VGS is the net capacitance from gate to ground and that is what we are trying to monitor okay. So please look at it just before you I am measuring this capacitance total from gate to the ground okay since I am measuring it I also write down so I say delta QG is essentially delta QS plus QIT slightly this very some here also the way we should define is QS dash where QS dash is now sorry QS dash is QS plus QIT the oxide voltage is essentially decided by the semiconductor charge which is QIT plus QS divided by C of that is by which law D is Gauss's law D is epsilon E and this we substitute or D is minus QD epsilon QS is essentially yes is proportional to Q and therefore this is the Gauss's law. So if I differentiate this D V ox is minus D QS dash by C ox just differential of this and then I collect the terms I divide this whole of D QS by DIT or QS dash in that denominator have you noted down this please note down do not take snaps because snaps do not record my of course there are mobiles which records as well these days but please do not do it because writing is the only solution for understanding whatever technology people may say I am in charge of what we call national program of technology enhanced learning where we are giving video talks and this is one of them okay the idea is that people who have no teachers of this area are not so-called experts in that area at least the other university teachers students can see what is going on okay so these lectures are not necessarily for IIT but you can also use I am not denying and these lectures are essentially made for people who are probably have no access otherwise of a teacher and therefore we create video lectures, web lectures but these are something cannot be replaced by the kind of things which we talk here is that clear to you. So writing down is the simplest way of understanding thing over hundreds of years has been proved irrespective what technology people say because if I am talking as an NPL coordinator I will keep there I forget it I say just look 10 times you can listen everything you can understand all statements are fine okay when I am in the other camp I will be something I will say but in reality as a teacher I would say the best possible understanding is when you look at me I look at you you write down you probably should ask questions I hope you will someday okay and then this interaction probably may help you to understand better this is what essentially the teaching one to one is okay so if I divide DQS by DIT both DVOX and the those terms I will get DQS plus DIT is all this full charge I did not write QS here all of it in this I wrote but I know DVOX by DQS plus DIT is 1 upon C of just now I divide it just a minute DQS dash by COX is VOX DVOX so DVOX by this is essentially 1 upon COX so this term is 1 upon COX this term DQ by voltage is a capacitance so these are this is accumulation capacitance this is inversion capacitance this is depletion capacitance and this is interface state capacitance so all 4 capacitances are now coming into so what is the suggestion you are giving that the CP plus CN plus CB plus CIT means what all 4 capacitor should be in what mode parallel because they are adding okay however this 1 upon COX is in series with all of them is that clear 1 upon COX plus 1 upon this means COX is in series with some of all this which are all in parallel so if you just a minute I will come back to that you can see from here COX is series with all 4 parallel capacitances is what we said equivalent circuit and we also have derived from our theory that yes indeed this circuit equivalent is fair enough why you want to do this because in real life I will only measure anything on the circuit all that I can do measurement in a lab is on a circuit so I must know what I am measuring and how it means okay so to prove this I showed you that this equivalent circuit is same as what one can even derive from basic principle and what is basic principle in electrostatics the gases learn nothing more okay so in accumulation we will say there are there is no depletion there is no inversion and there is no interface state of course there are few interface state but we they are called acceptors and they are very few in numbers and difficult to charge them for a PCM conductors so one says that all other terms are 0 okay so this this terms actually 1 upon infinite 0 means infinite means that does not react into picture they are all short circuited so if you see this circuit all of them are short circuited except this so one gets value of this therefore one can say C is C ox so in accumulation we always monitor C ox okay in case of depletion one now finds it that there are no whole charges because there is no accumulation inversion has not set in so there is no CN and assume right now during depletion there is a very little QIT but it can happen you can may add that term if you wish so for a age of depletion where inversion starts per se one can see this even assumption of CIT 0 is not very bad but it is not correct okay somewhere it actually changes okay where in inversion we say PCP 0 but all other terms are available to you okay so what is that we are going to do now we are going to find out from a given equivalent circuit which we have I will say a equivalent circuit we show something like this C ox in accumulation depletion CS plus C ox in series with CB parallel CIT if you wish okay I mean some CIT will appear so you may solve with CIT but these terms are much smaller much higher and therefore open circuited where as in this case when the weak inversion starts all of them are present okay in weak inversion the depletion charge is there depletion capacitance is there the inversion charge capacitance is there and also interface states are responding so CIT is also present there so this is an equivalent circuit where it is weak inversion starts prior to inversion where the CV I will show you CV there is a change in capacitance stronger than that near depletion at the age of other side but as it comes down interface states reacts okay and you see a stretch out the capacitance curve moves away from the ideal value okay so this how far how do we know about this we realize some theory and we figured out that this is possible to monitor in some measurement techniques in which I can basically I am interested in bulk charges so I will be able to find if I just be below inversion only in depletion region or close to inversion then I can only measure CB so I know C ox and CB together C ox I know so I will always find how much is CB CB means I actually know the concentration of the substrate itself okay so I one method of measuring some concentration is measurement of CV itself okay. However as I keep saying you when I am inversion there are two possibilities after you one age you still increase the voltage there are two things can happen and that depends on the measurement frequencies if we say CIT actually responds to does not respond to frequency that is AC signal which you have applied to measure the CV if CIT does not respond then it is only CB which will be CB bulk charges in series with C ox so maybe I will show the figure so that you may have better understanding I will come back to that sheet again but this is my high frequency CV I have plotted normalized value C by C ox so from here of course accumulation it is constant so we do not care so this is my depletion here is my inversion but if the CIT does not respond that is interfaced state do not follow the charge may change in the due to the bias polarity change then CIT is neglected and you see a constant capacitance after inversion okay that is the C minimum which is series combination of oxide capacitance with bulk capacitance or due to the depletion okay. So this is essentially we knew that if CITs are not responding that means we can forget about them and this can happen in the measurement system if the measurement frequencies are very high 100 megahertz 1 megahertz 200 megahertz the interface states are unable to follow this change in voltage is that clear to you if they do not follow so at high frequency there is not much CIT effect of course slight stretch out as I said you will be seen here inversion because CIT there is not really infinite but it is some finite value so small stretch out to see even in high frequency but it is very small and can be neglected in most cases however the problem starts something you have noted down this of course they will come back to the sheet I just wanted so for high frequency one of the most standard high frequency measurement is something like telling you theory CV equivalent of theory CV with other parameters which we know so it is some kind of equivalence whenever I measure high frequency I know it is a theoretical CV as if equivalently I got okay Seahawks series to the CV okay. So this value is known to me by first measurement which is by say high frequency measurement okay. However if I have a frequency of measurement as very low 1 hertz to 10 hertz then everyone will follow the frequency variation by charges can follow interface state can follow every charge can change the charge with the because the source so slow so they can actually change the charge as per the voltage you are applying if that happens very low frequency signal you apply here is a figure since the inversion charge is also following following which is and CN is the strongest charge term the largest in strong innovation what is the charge density maximum carriers are in innovation so if they can follow the capacitance associated with inversion layer is very high very very high is that point clear that means equivalently what is that 1 upon C is very low or shorting or something so as soon as you become higher than VT value and you keep increasing your VGS one figures out that all these capacitance are equivalently saying shorting itself because their values are larger equivalently short which means you are actually measure Seahawks okay in between this inversion and strong inversion CIT is responding and so is CB is everyone is responding so this just a minute you can see from here this at low frequency of course there are 2 because I draw one is due to without CIT and the theory and the other is with CIT measured okay so till the voltage is large enough what is this large enough voltage means the inversion charge is strong enough there so that dqn by dvg is very high which means it will short circuit all other capacitance also so that means only Seahawks will turn so you can see as you increase this you finally go back to Seahawks value in between inversion and strong inversion the capacitance will keep rising towards Seahawks and as strong inversion is reached dqn by dvg is large enough to short everything else okay and in that time what we will say Seahawks is reached so low frequency curve is essentially you can see inverted you are rather due kind and that is why we now we have 2 cases one is high frequency CV other is low frequency CV and I know in low frequency somewhere here CIT is responding is that correct in high frequency except near the inversion there is nothing much is happening in CIT there it is happening but much smaller happening so if I monitor theory of this by theoretical low frequency curve if I know and if this is due to the interface states which have moved out because of the it is responding charge now so difference I will be able to find and that difference will be due to the interface states this is called quasi static technique which is what I will write down this is called Bergloom's quasi static technique what is quasi static why it is not static static means what time independent no actually it is time slowly time varying and therefore it is called quasi static thermal equilibrium can be attained okay and therefore it is called quasi static lot of physics interesting physics may be professor boss he should tell you more about it I should not keep telling and I will be teaching his course and he will certainly not teach my part so we will be missing something else okay so having shown you the graph of fields this left we want to write down something okay this expression is if you need you can this figure you can write this is given in different books in a different form I tried to simplify as much as possible so that at least it gets into your mind why low frequency CV is going back okay there are some more theories to be involved and more mass this is second order equations will appear off game goes on okay when you solve continuity equation with Poisson's equation fun is very high okay solving fun is very high we I just wanted to give you physics on what is happening the real value calculations are not trivial people like professor boss he should explain you how why that has happened how it can be valued it for I am teaching a boy I will also do it but right now I am not okay. So this figure which I brought is that okay now please note down this is very important for people who are working on micro electronics labs they are every now and then they grow some insulator these names are changing but at the end of the day you will measure some CV IV TV whatever possibly CT and there this capacitance is one of the major experiment we do okay and it does give us almost everything what I am really looking for from see off I know T ox okay so I am actually measuring the CV to characterize all of my oxide okay and therefore it is one of the strongest measurement technique which allows you to monitor your oxide and why we are so much worried about oxide last time I said you if there are a variation in oxide properties then many things can happen one is VT may vary the other it may vary mobilities it may vary also breakdown of the oxides okay so at some we just may break down. So there are many possibilities this mass circuit may not for a function okay or at least not function to your spec okay in this scenario we must understand if I am making a circuit or I am making a device I must know whether I will be able to achieve a circuit performance at the end of the day I am least bother whether see at the shots or doesn't shot but if my mobility goes down then I am coming back and say where is the possibility of mobility going down okay why it has gone down why ideas VDS characteristics does not show good slope okay then I am worried because that is decided by my circuit performance I want the speed and I am not getting it so I will look into it where is the problem. So all this micro electronic theory is related to finally circuit performance and I want to tell my other colleagues on the other side of the building that they also should tell something about the circuit because we are actually doing circuits and we are hampered by their process not being correct okay and they keep saying no no you are not doing well your models are not correct all statement but if I want technology I will say the same thing okay this is a game okay another thing which I did not say but maybe you can read in a book where do you monitor your capacitances this the shift in this at what capacitance I should monitor the shift so there is a capacitance called flat band capacitor what is flat band whatever voltage initially apply there may be band bending so opposite of that voltage will bring the bands back into flat band so any shift from that is called shift in flat band voltages so this flat band voltage is given by 5 s minus q oxide total charge by C ox and can be derived as of course it is not very accurate maybe I should yeah engineering a little bit of equivalence one upon 136 t by 300 by T ox divided by any or indeed depends on p substrate or n substrate so I can always evaluate for a given oxide thickness what is on given doping of substrate what is the CFB and at that CFB by C ox I should actually monitor all shifts is that correct because flat band is the natural point from where every voltage everything was measured so flat band capacitance is also monitored and from there evaluated and from that CFB by C ox I actually monitor all variations how much from that flat band I am away from this okay and that is the measure of any measurement I do I must therefore know this theory theory means I must know without interface states how much and what is CFB so I know okay at this point okay theoretically there are no DIT so I am here but now I am going here so this voltage shift is essentially q by related to charge in the interface states and therefore we know how much are the interface states so this monitoring is very very crucial because we will able to know and of course if this is too small is it good yeah smaller the DIT better for us we are very close to theory that means it will not change mobility is very much not change thresholds very much so that is what we are attempting and when we make any insulator on silicon or any other substrate okay the interface is very dominant in the actual mass characteristics so please remember why so much papers millions of them are published in this so-called oxide system is because of this that every time we do something or change something something else appears and then you have a paper okay so well depletion is q bulk no no in fact band is essentially the before you apply this you want bands to be flat and this I will come to this 5ms and Q ox I already said this is only additive term so that will shift the CV by Q by C ox value but this additional term 5ms will come to it so this is called flat band voltage so if you apply this voltage before you apply even with without VGS applied this bending will start and I want to see how much bending equivalently already I have achieved so that difference we call it as flat band voltage okay so if I monitor how do I monitor real life I measure what is called quasi static measurement in which both high frequency and low frequency CVs are monitored and we know DIT CIT by Q so one can say of course I will derive a can but I do not this DIT is 1 upon Q C ox CLF by C ox minus CLF minus CB plus CN plus CIT where the low frequency capacitance is given by this expression okay you can always derive this I have derived and written it if you someone wants I will send that derivation but I think I have given you references so read somewhere so I can monitor CLF and I can this is theory because this is what I this at theory I will lose CIT I said CIT is 0 in theory but in real life CIT will appear and I will see how much okay using the high frequency CV we know in high frequency CV what is the net capacitance oxide parallel to CV plus CN okay because there is an inversion so CV plus CN so in weak inversion CN is 0 but in a strong inversion CN presents itself so one can say CV plus CN from this expression is CHF into C ox minus C ox minus a this is small algebra this expression is rewritten to get this is that clear for a mass curve is whether law is whether law is 1 upon CHF is 1 upon C ox plus 1 upon CB plus CN as a corner this is essentially equal to 1 upon CHF is equal to 1 upon C ox plus 1 upon CB CN now you subtract other side and get this expression okay. So I got CB plus CN equal to this which is what and as I said CIT is the additional term which I will monitor so right now I am only looking for this CB plus CN so if I substitute have you noted down please that is CB but is actually CB QNAX in a flat band voltage that theoretical we are measuring every from the theoretical curve without any bias initially okay. So initially is CF no I am interested in CFB what I am see actually is the plot but at what point I should measure I showed you I measure from at the VFB where the capacitance is CFB I am not calculating delta V from there I am only trying to tell you that where do I monitor deltas so I monitor everything at CFB as if there are no effects of work functions as well as the fixed charges only semiconductor is present whatever charge I put on the metal is reflected in semiconductors in case they are present I must first say they are not there equivalently so how much voltage equivalently they are already getting you present there is VFB so at that point whatever is the capacitance at that point any other change is monitored from that value is that clear because then when I apply QS QS will change I want to show initially where we are where so from there what is the shift okay okay is that okay yeah the series make capacitance is equal to 1 upon C 1 upon C no plus no minus okay either now we have mass thola jaldi kersa ko to jada achchaya baba is time. So I monitored I can now say CHF is very close to theory because we have already said it the DIT effect is very little there so what I actually figure out from DIT is this this expression is available in Nicholas book hopefully so COX by Q into CLF by COX 1 minus CLF by COX this is essentially COX minus CLS COX cancels so I actually divided COX why I divided COX everywhere and here I am measuring ratio so from COX I just divide everything COX this is CHF by COX 1 minus CHF by COX CHF you can monitor CLF you can monitor and therefore DIT can be monitored is that clear that is how interface states are actually monitored okay and I repeat why why we are so keen about DIT I keep saying you my worries are threshold voltage and mobility is if they do not affect me I damn care whether the states exist or do not exist whether chocolate was present if chocolate states are there fair enough okay we will take care somewhere else in theory but nothing to do the experiment but in real life they affect so much then we are worried about okay is that point clear so why HFLF this is the simplest CV there are I will list now some of them there are n techniques available which are more accurate sometimes they are quicker sometimes this like if you are in circuit area sorry state circuit journal very famous for us it does not publish a single paper on any simulation unless you have a actual chip measurement data HFCV for fixed charge density evaluation purely only HF measurement can be done and we will show why then HFCV HFCV measurement for mobile charge there is another measurement technique for DIT which is very popular technique actually and this goes further technique it was very famous is called conductance technique any capacitance will also have along with it is conductance is that less sigma plus j omega as we say so there will be some resistive part and some capacitive part so actually instead of capacitance you can also monitor conductances and that is a very popular technique in many industries they have mostly conductance technique to monitor this somehow we have been more enamored by CV so in our lab mostly CV measurements were done but it is not true that conductance measurement conductance measurement little more thinking has to be done because it has to be matched the matching sometimes is not right and therefore it may give wrong results okay but all said and done this is not that this statement is not valid really everyone must do correct then there is another technique which is called Terman technique okay for DIT measurement it is a DT time dependent measurement then there is a technique called gray brown which is temperature measurement like you can cool the capacitor and you increase the temperature shift in this also can be used to measure the CVs and there is a most popular among all the current lab people is called charge pump technique we just pump it and see how fast it discharges okay and we from there the time constants we will be able to find what is the capacitance this okay charge pump technique is related to capacitance transient technique CTs okay so these are as I say those who are actually working in the lab hopefully few of you okay someone was asking about 5S and I said 5M minus 5S is equal sorry is 5S the difference of work function so this comes from the fact something like this let us say I have two materials separated by right now insulator this is the Fermi level in the metal what is Fermi level in metal defined the fluid band up to which all electrons are available is called the Fermi level where as in semiconductors maybe you have somewhere here and then there is a this is my EV this is my of course these are not exactly same places where it should come I am just drawing randomly right now you see then there is a level which is called vacuum level what is vacuum level the energy required for a metal to be heated to come out of the material in a vacuum is called that is why this energy is picked up from here and this is called metal work function semiconductor work function is measured let us say the p semiconductor is measured from here to here so this is 5S however 5S is a function of 5F Fermi level how much is the doping will decide you are away from that okay however one knows in semiconductor at least in silicon from the various band to the vacuum level this energy is known 5.25 okay if this is aluminum this will be 4.1 EV this vacuum level to the this is 0.9 EV so actually if you see both the aluminum work function is given 3.2 electron volt but from the vacuum level it is 4.1 EV okay now if I have two materials and I join what will happen the carriers must go across for what reason that the Fermi levels get aligned there is no current to be flown in the system so as soon as I join this EFS has to match this okay now if A5 is lower than 5S then where the band bending will start if 5M is equally where it will go please remember that this value between met Fermi level to vacuum cannot change okay that cannot change okay okay that is the work function so where do you expect band bending if 5M is 0.4.1 fires is how can you derive fires from here tell me now for P channel this is 4 5.25 okay this is EG by 2 is that okay so minus EG by 2 plus 5 or maybe now if it is all energies okay is that okay 5.25 minus EG by 2 will bring it EI plus EF fires so it is the so the work function of semiconductor is derived from the back whatever is your Fermi level depend if it is n channel n substrate device your EFS will be somewhere here so then how will it be 5.25 minus EG by 2 minus fires will become for n substrate is that clear so any substrate doping given to you you should be able to evaluate fires the metal will be given to you gold or aluminium or any other titanium or whichever it is titanium has a band gap I mean this work function of 3.2 electron volt so it is very close to aluminium it has its own properties good or bad both so gold has 5 so it is very large bomb this that is why gold is very stable it requires very high temperature to actually operate gold aluminium can be at 1800 to 1850 both 3300 okay so that is the reason why it takes energy to actually take the carrier out okay so this minus this is what you have to evaluate and I will not now that I have taught you must see we think of it how bending will start okay where actually join them whether this will be like this or whether like me like this whether this will go up or whether this will go up think of it equivalently what I am doing okay but so initially itself there will be a band bending irrespective whether you apply bias or you do not. So the already bands are bent now I always measure everything from the flat band so I apply opposite voltage to compensate for that that difference is the flat band voltage initially whatever has happened I compensate the opposite polarity voltage so it comes back and that voltage we call it VFB the similar argument I already said if there are positive charges here the semiconductor will already receive negative charge what does that mean the bending has already started down so to come down again you will have to apply some voltage and that voltage plus this 5s is essentially called flat band voltage is that correct so given a mass capacitor with some doping you should and material of gate you should do if it is silicon then what happens that is a very important question if I start with silicon will there be 5s will there be 5s or will there be 5s it will always be there the reason is something different which he said in correctly but not exactly it is slight difference there the normal n channel devices the source gain are n plus is that correct and the substrate is P the gate poly receives the same doping doping as source and drain so poly will be n plus but the substrate will be P if it is a P channel device the source drain will be P type so is the poly will become P type and substrate is n type so it will always be opposite to each other is that clear of course there are some technologies and I make P on P on n on n but some other day okay in most silicon gate technologies this will be awkward whatever is the gate doping it will be opposite to the substrate because source drain doping will be same as what will go on the poly okay. So if it is n type P type and then if it is a semiconductor let us say here this is exactly same now okay even if EFS is same the Fermi level now is here in the case of matter in the case of n substrate so there is a difference between Fermi level of n semiconductor to Fermi level in P semiconductors okay and that difference is 5S so 5S always exist do what you okay also catch up something that normally n substrate show lower 5S P substrate show much larger or vice versa think of it okay yes if okay now I will have to do one more page so that you will understand okay I have semiconductor both side poly is also treated like good semiconductor though it is not okay so my Fermi levels are aligned in P substrate this is EF in n n doped poly okay they are all aligned now for example so now of course initially they are not aligned but after the I am saying so if it is n type this is the conduction band and this is the valence band is that okay if this is P type this is the conduction band this is the valence band is that clear so this please remember the work function difference if they are aligned this is the situation but in real life they will not be aligned because EFN will be higher compared to EFS so if they are little here and this is your EFN now this has to go down to match to EFN equivalently saying let us say just for this if this is your semiconductor this is 5.25 eV from the valence band let us say forget about right now going up only this how much is 5.25 this is your Fermi level sorry EFN abhimath kharia EFN low V n substrate or your valence band so this is 5.25 minus EG by 2 minus 5 minus EG by 2 plus 5 so 2.25 difference so even if you are having silicon both sides there will be always pi minus present to you the idea is the poly gate always will be opposite polarity to the substrate because of the technology we do but it is not 100 percent true now we do some initially monitoring and may change what is the disadvantage of having N on N you VT can be adjusted that is the work function engineering I am doing but the problem there is additional mask because when I am doing source drain I cannot open gate so I have to do another mask to open the gate and this takes extra mask 1 million dollars okay and now more okay so this is something cost wise otherwise it is much easier now because if nothing is working cost is what so I will put money so that it works so in technology something like this if things work at the most cost fair enough it does not then pay okay so this finishes of course there are many more things can be told this finishes oxide okay thermal oxidation with all kinds of measurements all possible technologies drive a drive everything I shown you pressure oxidation I gave you some formula that if you pressurize the growth rate increases okay steam it increases so I have given you a general idea of silicon dioxide growth please remember this is silicon converting to silicon dioxide so therefore it is called growth if I deposit I any substrate may be silicon and I deposit something that technology is different from this okay which one will be better if I am depositing silicon dioxide or growth growth because all bonds are possible to be satisfied in the case of depositions that is major worry half new oxide sitting on silicon does not give you a good interface states I mean they simply because they have not grown out of each other is that clear so there is issue in other insulators being deposited on silicon okay though you know high case very good and one of the problem is mobility so you do some other game to improve the mobility okay some stress you stress you apply and so that you get additional mobility enhancement okay so the technologies keeps growing because of some failure some success so match which is more success okay so this finishes basically the oxide technology which I was talking about thermal oxides are one of the ideal oxides but now oxides itself has to be given up 65 nanometer process still uses silicon dioxide the next ox equivalent oxide which was tried or equivalent insulator was not half near or something we tried silicon nitride which is also grown out of silicon silicon nitride has an advantage or disadvantage whatever you say is dielectric constant is not 3.9 it is more than that it is 6.2 so it is higher high K than this was the first attempt to go for higher K was due to silicon nitride but silicon nitrides is a stressful thing because silicon nitride creates hell of tensile stress on the silicon okay so it improves mobility for some other reason but decreases mobility for some other reasons so how much to match okay so there is a then this come with a word called stack silicon dioxide silicon nitride or silicon oxy nitrides all games are played in technology and a paper Harkesat okay this is called bias temperature stress measurement very important measurement which we do particularly this is true for mobile ions concentration to know how much sodium okay so what we do is the following you have a capacitor this is your SiO2 or any insulator and this is maybe right now we will talk about P or N whatever it is okay this is your mass capacitor and there are sodium everywhere but if you follow Poisson's equation properly that is rho of X in the oxide the charges which are away from the interface do not because it is proportion to the distance the effect of this charge here is practically 0 T by T of as I say so it will be 0 and maximum effect will come at the interface if the charges are at the interface they will have immediate reaction to the semiconductor far away from that they are the least and at the this side will have no effect okay at metal silicon dioxide interface any charge sitting there will have minimum of 0 effect on the semiconductor charge theory now this gives me idea but sodium can sit anywhere okay it is not in my hand that oh please go here okay I agree I agree but metal has infinite charges so they do not really very too much the interaction that is very quick and very fast okay okay so sodium come from Na2O bond and this Na is very easily released at some temperatures okay even at thermal temperature room temperatures so what we do now that I want this all this sodium ions to go to the interface so what polarity of voltage I should apply sodium should come here so I apply a plus here minus here okay so if I apply here positive the electric field is direction from positive negative so all sodium ions will try to go towards interface okay but they will not remain there because they are thermal energy with them they will keep moving firstly how many will be available also we do not know because they are whether broken bonds are not so the first thing we do is we heat this wafer okay around 100 degree centigrade the mass capacitor is heated around a 100 degree centigrade most of the mobile ions are mobile because they will now leave the Na2O bond will break and most sodium is free now okay I have applied sufficiently high field across this capacitor so almost all sodium ions will come towards interface here is that clear but as soon as you cool them they may go back as soon you remove the field they are still heated so they may go again I mean there is no one to stop them sitting there so what is done is that first time you keep the field on when all the ions are moved to the interface hopefully so you actually let the wafer cool with the bias on is that clear you let the wafer cool till bias is on and once that cool to room temperature then you can remove them because now they cannot be mobile because at room temperature they are very few who can move go back okay so all the charges are now left at the interface like a fixed charge okay so if I have a some charges at the interface and I measure high frequency CV let us say p substrate so like this so this is a positive charge where CV will move minus Q ox by C ox towards left side so actually this is initially this final and if I know my CFB this delta V essentially is a measure of sodium charge because prior to that we assume hardly any sodium was there so that was initial I heated the wafer applied bias cool the wafer remove the bias and measure the CV okay and please remember so the electric field when I apply I should be larger than the measurement electric fields because I will come out okay so that is the way it is very highly voltage was 10 volt we have to apply push everyone there okay once they get pseudo bonds at the center face then we actually remove the voltages and then apply at much lower voltage CVs okay so this delta V Q is equal to C delta V is that clear so I measure C I know the Q I mean see this delta V so I know this Q must be proportional to Q and A into that distance typically it is brilliant and I am strong so this how much is sodium concentration there is now known and we do not talk of concentrate what do we call density per unit area forget about how much is the thickness per unit area is how much is sufficient to know Q by Q is also density C ox is also CF is also density this delta V is the measure of the sodium same measurement can be done for fixed oxide charges why fixed oxide charges are always present so we instead now there this is not initial but theory CV theoretical CV so you have a CV which is theoretical first and then make actual measurement on a capacitor the shift is because of what Q ox so that Q ox is also monitored by taking a theoretical CV and compared with major high frequency CV the shift is at CFB is the measure of Q ox by C ox is the shift so Q ox is monitored from HFCV by same technique no temperatures just make a theoretical CV let us build CV with no Q ox that is Q ox 0 5 s 0 and then with this this will give you some idea of 5 s plus Q ox by C ox 5 s is again calculated by the work functions available and then you figure out how much is Q ox so this is the same HFCV can be used to figure out the fixed charges as well as as well as mobile charges so this is the technique which we know it does not because the charges do not really come they are a time constant associate never do that theoretical CV just draw you are perfectly justified in theory but in real life charge does not move at all all of it ok 90% will go then that 10% will be error for you your your thinking is very good but thinking to reality has to be verified ok in case in your case measurement comes same as very good nothing wrong that means your oxide has very few charges they could move out but larger density will nothing 90% will at best move ok ok so this is HFCV HFCV quadratic static everything is available in number of books number of journal papers as I say in till 2014 maybe this number is million or so in the oxides ok so you can see the last part in this why this there is a word which was a Mahabharata keeps talking these days of course now he has moved to graphene so earlier when he was working on flash he was keep talking of NBTI NBTI everyone asked me sir you have never studied in class I said NBTI now in the flash it started in the escape from the programming that is writing and reading is through a thin oxide of this through is the carriers are brought back by tunneling one one is for one or the other is tunneling now if you do a number of such read writes programming and reading the oxide does not is does not have a free of charge it actually retains charges all charges doesn't come that's what I am saying and that this charge is inside the insulator which is a floating there is no way I can move them out and these charges are sitting there they make when I actually apply charge voltage to read I figure out that these charges are now contributing ok this is called bias temp because the device starts working at higher temperatures which start working and at since the temperature rises they move and because of that there is a instability in VTs and instability in actual measurements of the EPROM data E-square PROM data so flash because you keep writing erasing everything in one way you want all things to tunnel down it does not happen ok and if it does not happen then there is a what is called bias temperature instability which is essentially negative because of the positive charge sitting there transiting there so that is why it is called NBTI there is a PBTI also holds possibility with other kind of substrate which is smaller effect and therefore not much talked about ok there are some hundreds of theories whether NBTI is really what I am talking and that's another area you can talk to Prasimah Padra now let's start another new topic still 15 minutes so we can introduce it please there is a lithography which is the actually this word would not have been there no IC could have been made ok so if you really want to make an integrated circuit or any semiconductor device per se you ought to go through this process lithography this has felicitated making ICs and this has also now hindered process of enhancement ok the lithography techniques are the major very some part now when we are looking for 7 nanometer 11 nanometer nodes ok we will see it why they are worried about and what is the solutions ok Intel is still struggling to go for 7 nanometer you extended UVs and it may at the extended UV machine may cost roughly 100 million dollars in making first machine and still they are not successful there are 7 companies trying 5 given up only 2 are not trying ok so you can see the more and Intel is only one who are still trying to make extended UVs I know now in my time whether it will succeed the only hope it succeed because my son is also working on that so maybe ok at Intel so I hope for the best for him ok photo lithography there are 3 kinds of lithography maybe 4th also but at least 3 e-beam lithography x-ray beam lithography photo world suggest that there is something has to do with photons or lights so it is something light related lithography e-beam instead of light if I have extend electron beams to do that job we say e-beam lithography and if you do instead of e-beams if I use x-rays and it is called x-ray beam lithography and if I use ions it will be ion beam lithography ok we still do not want to work on e-beams x-ray ion beams you want to work on photo lithography that is the large amount of papers we can be produced by these are all not manufacturable technologies that means the throughput is very small if the throughput is small cost is higher ok in photo lithography the throughput is very very high so cost wise and industry thinks that photo lithography this so we are now trying to improve photo lithography as much as what e-beam can do ok or of course we may never reach 10k x-rays but at least we will try to come closer to e-beams ok that is the effort what is we are now looking into but once you talk of photons the optic starts coming into your mind because there is a light and light actually is essentially governed by optics so lithography techniques require lot of optics ok some idea of diffraction some idea of Rayleigh fringes some idea of final fringes many things are required to actually understand how why certain things are not happening and certain things are happening then whatever lens system you put there are seven kinds of aberrations there then how to avoid some of them some may never stigmatism will never go so how do you take care in your wafer on that so all the problems of lithography are related to optics ok this is one aspect so what is we do actually in the lithography the actual process of lithography is very simple ok the basic idea litho means something a some kind of statue or some kind of body if I transfer as it is on somewhere I say lithography ok a picture answer here ok same if it is a copy it can be sold as a original and make my money out of that painting many people are actually sold the such varieties so if you are a connoisseur of arts please do not buy things which are copied which are much cheaper in fact from the originals lithography does that so transferring an image from somewhere on silicon is what our job is this image is essentially called pattern ok so this pattern transfer from some other place which we call mask on silicon is essentially called lithography ok why do you want to do it just a minute a quick this we want to do this just a bit of a may a problem with the other I want to do selective diffusion let us say only this region but what a process of solid state diffusion we did what was that if infinity start they will not see anything they will go everywhere this is called isotropic ok so I must protect the regions where I do not want n to go ok so this is called selective area diffusion that means I must restrict this area from the rest so the rest of the area is called mask it does not allow n to impurities to go ok for silicon dioxide is a thick oxide which is Fox the word I use their field oxide thicker oxide actually does that job ok and when I diffuse now so first thing I must do I must have a refer I must have grown thicker oxide called Fox ok then do some patterning on this such that I quote something some this is the word we will use is called photo resist I create a pattern through a mass on a photo resist and H photo resist only from there is called developing and then a silicon dioxide since this photo resist will not allow anything below to be etched so this is a mask for silicon dioxide for a etching so this resist resist etching ok here there is no resist so the silicon dioxide is exposed so I put it into any ion beam or hf liquid and this silicon can silicon dioxide can be etched so window is created in so what should be the kind of mass you should look something in the center I want this the rest should be should not allow anything to happen is that clear so this is clear field mass we will see this later so we have to create this pattern this is a pattern now so in a mass transistor if you see there are so many area source rain gate and there are number of contacts elsewhere you are doing so every time you are going to do a process for example if I want to make a NPN transistor PNP transistor I now want to make inside this N region AP so I must again somehow protect this by another process and get inside this this is called alignment and there will be millions of such on the wafer so everywhere this this window should get inside the earlier window then only I can make a PNP there this is selective area processing and that is only possible through a method of transferring patterns on silicon to do this we will put some resist which is called photoresist and these photoresist will allow us to do selective area etchings and therefore selective area processing so question is what kind of resist it should be which are responsible to allow this so there must be some light initiated process light activated process which this photoresist see before we go I just name the two one is called positive photoresist the word is positive all resist are essentially resins one of the thing which all environmentalists keep saying that you know this plastic is one of the worst thing to happen to this society which is true to some extent from the environmental point is non-destructive however polymers are the invention of this century 2000 okay this was the invention because it changed all concepts of us all airplanes to everything you if you don't have plastic you can't survive including the wood for this formic are you everywhere you have a plastic so much of the problems of human race was solved by plastics but we keep saying on keep hearing from environmentalists how plastic is the worst thing to happen why so people in chemical engineering must be shouting day in and day out they are and everyone is abusing us okay so recycling is one possibility and they are not biodegradable so one of the research in resist if you are working there are many IBM people are working biodegradable resist okay so they are something which bio people can as you put some and saw some something which will eat away that something you know I'm a hint they're on me yes I'm a circuit wallop of all the battery research go back to care in battery care problem sub-jagabar bar bar charge karna smaller area larger ampere hours okay so this resist are essentially positive photo resist positivist I will come back to it later but I just want to name them today a positive is one when the it shines this is light it actually okay first I must say reasons are essentially cross-linked carbon chains CS3 CS3 CS3 CS3 CS3 CH and they are open chains okay but if the combined chains are connected to each other then they become cyclic chains and cyclic chains are very difficult to break that is why they are unachievable whenever there is a cyclic chain of resin or carbon chains they are unachievable benzene is very difficult to age because there is six bonds on that five bonds on six atoms so this etching property is essentially decided by linking of the carbon atoms so what we do now if you shine a light and if this if you are a resist which is already cyclic and you shine the light and it breaks the bonds okay these resist will be called positive resist so whenever light actually brings the breaks the cyclic bond then we say you are positive resist then there is a negative photo resist which essentially is open chain resist and wherever you will shine the light it will become cross-linked is that correct what is the difference between negative positive is when it is a cyclic resin shine light this is energy photons and it opens the brain chain and opens it so it is achievable if you have open chain resist and you shine light wherever it shines particular way length where energy is received absorbed that building that that energy this linking process will happen okay so those areas will become cross-linked and there those area will that then be non-achievable because cross-links are very difficult to etch out okay so negative photo resist hardens the resist when receives light hardens means unachievable positive photo resist softens the resist when receives light is that correct since we are going to use two kinds of masks clear field and dark field we should know which resist to use when or if you are using only one kind of resist then the mass should be keep change or if you are same kind of mass you should keep changing the resist every second different steps okay so we will see tomorrow tomorrow means next time the therapy first I will give you a simple photo laser of a technique which you should follow in the lab generally later I will show you actually what are our issues in 14 nanometer 30 nanometer what is the problem going through so optics learn optics