 mass amplifiers and we are still watch to model the mass transistor. Last time I do some figures, one of them I said that in saturation the id s which is the drain to source current is equal to half Vov square half beta Vov square and we show that if it is not a function of Vds and we later showed that it is a function of Vds through a lambda term. However if you look at this expression you can see it is like a voltage control current source. So a typical amplifier has a schematic diagram one can if you wish to say, I put an input AC which is essentially delta input delta changing the drain, I pass through Vccs that is Vgs minus Vt is what we are now looking into which converts into change in current because this is the current and this current is then passing through a node which gives the output voltage Vout. So essentially a typical amplifier which we are going to use will have a current source which is a function of input and then it goes through a load to give me an output voltage and the change in output voltage will give me AC voltage. So AC voltage by AC input is essentially the gain that is what an amplifier is likely to do. So the essential part therefore was to get this expression correctly and also we like to see whether the node which we always talked about is that really resistive load or there is something else which we can do, we will see little later that typically in the case of integrated circuits, there is no resistor as such is employed because of the area it will take, we will show you how much it may and therefore you use transistor itself as the resistor or equivalent current source. So we will see that means we need to create a current references or current sources. That is one of the activity of this course. So we will see how to create a good current source. What is the property of a good current source? The impedance across it should be infinite, ideal current source. So how good we reach there are good and that is the most important and that is the design because otherwise you can create anything and you will say there is a good current source but the output impedance across that should be as high as possible preferably infinite but infinite is a number which is unknown. So may be you say hundreds of mega ohms, it is a big number. So you say okay that is good enough. So this is the basic idea which we are following and we continue to follow. Now there is some issue which may appear now. We always thought transistor behaves in a very interesting nice simple way but it does not unfortunately particularly if there is a short channel it will be in reverse. Even with a long channel we would like to now see what is the equivalent circuit of a MOS transistor which I can employ in circuit designs. So I have figured it out there are many other issues which I have not discussed and one of the issue which I start with is I assume threshold was constant okay. In real life this threshold is not really so much constant as I think so and it has been figured out that if I apply a substrate bias negative substrate bias what will happen you can see from here this is source grounded drain is plus VDS for a MOS transistor where plus VGS which is exceeding VT. So if I apply minus bias to source substrate junction so one can see there are already a depletion there even at 0 bias if you apply a reverse bias it will further enhance. On the drain side it already had a larger depletion because of VDS was positive with minus VSB it will be VSB plus VDS so it will be additional reverse bias now available at the drain base of the junction so the depletion layer will be even enhanced there. Now two things which is available one is of course there is a extra depletion charge in the channel is that clear there is an extra depletion charge before VGS there is a extra depletion charge which is available to you. There is another issue which we will look into later since the depletion layer changes what changes in normal diode the depletion layer thickness is related to what capacitance epsilon S by XD so larger the XD capacitance will come down okay. So there is some issue which we will have to take care in circuit design when you say okay if you have a VSB the capacitance also is a function of VSB. Now looking at that part later since the bulk charges in the channel area is increasing we know the expression which we have written for VT which has a term QB by COX, phi MS to phi F QOX by COX minus QB by COX okay. At time the bulk charges were essentially because of the VGS that is what we said EX is very large and whatever depletion is occurring essentially because of VGS but now you have created additional source for depletion charge which means now VT will become higher because already there is a so you have to first remove that to get into a inversion layer is that clear. Now this essentially means that the new VT with additional minus VSB setting there will be VT 0, 0 bias VT which is normally we are considering gamma times now what is this is the difference I am adding this is the original plus how much additional VT contribution will come because of the additional charge available to you. So what is the now the surface potential VSB plus 2 phi F because earlier it was only 2 phi F now there is a minus VSB on that that is plus for reverse so VSB plus 2 phi F is the potential now so psi S is now becoming VSB plus 2 phi F to the power half under root expression we know okay minus without this that means without the VSB so this additional this terms multiplied by Q gamma which essentially is the part of this X-D expression which we wrote there QB expression which we wrote there 1 upon C ox twice K epsilon not Q NA and D means why about AAD means NA for P channel device NT for P channel device so one word one can say this is a small query for those who are very keen about devices is NA should be higher than ND for N channel and P channels NA ND will be equal for P channel N channels or N channel NA's will be different from P channel ND's what is your criteria do you think something about as the numbers which one should have different doping for example I will give hint that NA will not be equal so which should be higher and which should be lower NA higher for N channel compared to ND because we wrote a P channel expression all terms were negative okay so I do not want VG to be very large negative for P channel so actually for radius ND's VT will go down okay if I increase NA that compensation term will be increasing so VT will increase actually positively and all circuit designs preferably are not necessary VTN that is threshold of N channel is kept as much same as P channel but in analog this may not be a criteria in digital CMOS this is general criteria because of the swing to be equal we always put VTN equal to VTP in digital but in analog that is not a compression in many times I will do that so in which case my two devices will have different doping so that I can adjust my VT's independently is that point clear so this VT now has enhanced compared to 0 bias case and that should be taken care because if that is so we will like to see of course this expression will use later I just want to show that means there is a threshold of variation with VSB which is gamma by 2 VSB plus 2 5 to the power just differentiate okay so we see change in threshold voltage with substrate bias obviously here is a minus value plus gamma by 2 VSB plus 2 5 to the power minus half that half will come and minus will appear due to differential so this is one issue which in analog people have to vary now this question may be asked in normal technologies which we use okay you just write down then I will come do not read this just go up to this we will come back to the second issue little few minutes so if I am showing you this in normal I will come back to this figure again in normal CMOS which is what digital inverter is using this is a P channel device this is an N channel device what I see there that the bulk for P channel and bulk for N channel are normally connected to sources sorry normally connected to sources but in most circuits these days because we want to control VT through bias what we do either we leave this separate or at best we ground them exactly now if we ground because that is what control we need so if we ground it now you can see the any potential whenever current path through this N channel there will be potential drop here the center point which is your output point will have a voltage VDS of the lower transistor this voltage here whatever is the VD of the lower transistor is actually VDS of the upper transistor also is that clear that there is a substrate bias between the inside to the ground because the bulk is grounded so even if you are not really putting any VSB or VDB there is a built in substrate bias is created which means the threshold of these two transistor will vary even without doing anything is that clear so now one must worry that in real technologies where I am not actually connecting source and bulk together this issue will be of relevance because in that case only then I know I can control VT and now I start doing okay I just ground it or many times I do not even ground it I actually leave it open put a bias whatever I want there in this cases there will be built in VSB or VDB available which will modify the VT along and this is another issue which one has to worry about in analog design now because this is self bias as we call does automatically itself okay yes actually this VSB is not only on the source side is also on the VDB side depletion layer is on the both side the values which I am really using is the average value is that correct depletion layer is on the both sides so VT on the drain side is not same as VT on the source side okay then general calculation is triangular average okay this is the game we play in area of a triangle half this into this so same concept we use and say okay average take it but essentially equivalently saying it is increasing with self we are appearing there although it was not there why it was not there because always substrate and gate were connected once they are connected there is no of course upper side they still will be there but at least there is 0 change in that so that average will go down so that change will not be so stronger now both changes can actually hurt you exactly and this hurting you means VT will now enhance what is the problem is VT enhances current goes down and all that we are looking at as we say the trans conductance is essentially function of current okay larger the current larger it is trans conductance so then falls if VT increases is that correct of course one advantage you may say power goes down because the current has gone down but then if we shall see later essentially GM goes down and bandits also will go down so essentially what will happen that all that analog was looking for probably may not be attainable just by not doing anything you may actually land in the situation which is not meeting your spec the reason that you did not take care of VT variations in analytical sense many times we do not do this because it becomes you know nonlinear equations keep solving them difficult so we take some average value and substitute that as a constant and use it but in spice it can solve anything in given time and therefore it will always be able to take care of point by point VT variation take average of whatever they wish to it so we do not have to worry too much our self now but earlier this was a big issue for us we never cared that VT is varying too much the reason probably was also the gammas Ben was very small now with the increased openings the gammas are becoming stronger and that has pushed VT variations okay new technologies more problems so it does not because it is a P substrate and substrate so upper is it is always US bias P plus is yeah I agree but there the potential that diode even if it conducts what you are saying is true is upset by this VGS value because now they are showing some bias value equally putting minus there is that and you need a minus value to appear so it will compensate for that as if this bulk will go to higher potential and which essentially will upset the upper voltage VGS value for that okay equally same 0 here 1 here 1 here minus there that is the way the voltage will look it will come back to your issue is very interesting okay so this is one issue which we are not taken in models now we have to take care this second issue of interest is very very very important we say that saturation parameter lambda we said last time that it is lambda dash by L and we describe some lambda dash value which is under root of 2 n substrate or something equally this is not actually I mean we can it is okay but it is not dimensionally correct so we may have to put constants which will give dimensions for that now this essentially we are trying to say once we declare lambda there then we say okay it is constant it does not vary with VDS what we say we have taken care of variations through lambda saturation but we say that itself is constant is that in other derivation of this we say okay there is a lambda there is a slope on the ID VDS but the slope is constant that is our assumption that is if I change the VDS the lambda does not change but in reality that does not occur lambda does change with this now what you why it is called we will see this later there are two parts in lambda in reality one because of that is what we call as channel length modulation which is lambda somewhere actually this lambda dash by L appeared in fact and the second term is called lambda n which essentially is related to mobility we if you see our current expressions for the mass transistor IDS is proportional to mu deriving this all expressions we took mu out in the integral out I when I calculate IDS VDS character I remove mu I took it constant but in reality mu varies with the electric field okay mu varies with many other but at least for us immediate worries of the electric field and says mu varies with the electric field we are applying now larger voltages larger fields because channel length is reducing and voltage is not scaling down so we have fields which are not small enough now long channel this issue was not very strong why channel length of 1 micron 5 micron 3 micron even 0.8 microns fields were 3 volt 3.3 volt now voltage is only 1.2 volt 1.5 volt and the channel length has gone to 65 nanometers 5 nanometers you can see how much fields are suddenly boosted up now these fields will be affecting because mobility is essentially the connected to how much drag it sees when it moves in the solid state or semiconductor essentially the field is higher it will get retarded it will accelerate it will likely to impeach next electron immediately and therefore it will scatter faster and therefore it will reach little late at the other end on an average this is called drag mobility reduces as the field increase now this issue also now therefore lambda M should also be a part of lambda and therefore this new lambda must be now derived. The first one let us see the lambda C part if you see a expression of transistor or other your figure of transistor just a minute I will put it again that side but just you can see from here as I increase Vds which is larger than Vgs minus right now let us say it is not there this is 0 even if it is there does not matter but Vgs minus Vt is much smaller compared to Vds and if you keep it at this point when Vgs minus Vt is Vds we say it is pitched or channel does not exist at the corner drain as you increase Vds further the channel pinch up point shift towards source is that correct but in a transistor if you look at this transistor the actual channel length we say it from source to drain which is channel length L once the pinch up point moves away the effective channel length is not L now because channel is existing only L minus the depletion layer here is that correct total length is L but the depletion layer rest is depletion layer the actual effective channel length is reduced is that correct if this channel length is reduced so I must not take care that this channel length reduction must appear in my expression because actual L is not L but L effective which is L minus Xd is that correct and Xd is now function of Vds which means now even the channel length is a function of Vds is that clear L effective is L minus XdL is a function of Vds larger the Vds larger is Xd therefore smaller is L effective which means if I see the expression W by L and now I replace it by L effective larger the Vds I create L effective goes down means current increases is that correct the slope which you say is visible to you is essentially as Vds increases L dash starts reduce L effective starts reducing so essentially current starts increasing from low value of Vds to higher value of Vds and that is why in our transistor characteristics we did observe on an output characteristics ideas Vds for any Vds initially is linear then we expected theoretically something like this but what we got is this because as Vds increase the effective channel length reduced but that also influences the lambda itself and that is the interesting part this is one effect which is obvious this is called channel length modulation why it is modulation because channel length get modulated by Vds change by Vds so as Vds increases Xd increases root of Vds but it increases L effective is L minus Xd and therefore effectively effect channel length goes down as increase Vds and therefore you keep seeing slopes okay. So this slope so first thing is a saturated so it is no more really saturated now ideally what do we expect to happen we want something happen this side because that will give me what we will see I data idea ratio as we say it is a infinite value kind if that happens I say we are fantastic for a current source if I want R0 I want infinite so I would prefer saturation to a constant current but now this is not a constant current how much it goes away is a very important issue for me is that clear and this is what essentially is related to lambda so we look into of course I divided in a big way but you need not you can also write down because I normally solve all expressions so we observe that lambda C is a function of depletion layer width XdL which is twice case epsilon Q Na psi s plus V now this Vsv dash is nothing but Vsv plus Vds because if there is a Vsv depletion layer is further getting enhanced from the substrate bias side so the net substrate bias we can say is equal in the same Vsv plus Vds if I substitute now in my XdL expression I say psi s plus Vsv plus Vds so larger value of this will appear and obviously larger the Vds or larger the Vdsv even if it is root XdL will enhance okay XdL will enhance I did some calculations further I just put this as a constant I then differentiated I want to see how depletion layer changes Vds from this expression so I differentiated this expression I got K1 this oh sorry oh sorry right now it is d by d Vds so this will become minus half is that clear I am trying to figure out what is the variation or slope of Xd versus Vds because I have figured out that the current which is increasing is essentially we how do we actually put it into expression in our ideas Vds 1 plus lambda Vds we put some lambda parameter now I want to see this lambda which you thought is a concept is itself is a function of Vds then as you increase Vds the slope may change and if slope changes and you are more worried where do you bias your device is that point clear what I am saying let us say for some reason I do not know whether let us say it is something like this that means by saying here or by saying here we have a different R0s which means different gains is that correct so the worry is very very very relevant because I am my ultimate aim is what I want to get it at least the minimum gain specified and minimum bandwidth specified okay I must reach there if it affects me somewhere one of course you can say you change the bias point yes in circuits once you design if you change bias point many other things will change so you may okay you keep somewhere okay here then you see how much time and toleration tolerable things you get if not then of course you will have to modify your bias point itself this is all the issues are actually tackled so I did this differential you can do yourself final expression you can write this can give me after differentiating it I Xdm versus Vds k1 prime this other constant I took care it is size plus Vsb to the power half 1 plus Vds upon size plus Vsb to the power half we know after pinch of increase of Vds increase Xdl so the L effective L mask that is the actual channel length okay minus the depletion layer and then we define the channel length related lambda as 1 upon L effective DXdl by dvds is that not clear so this is a function of Vds lambda is a function of Vds is that point clear since DXd by DXdl by dvds is positive is a value which is varying so this is a different videos will have different this lambda will also vary with I did this calculations for that just note down this L mask please remember when I design a chip I had to give some dimensions for transistors so first today doing distance we call it channel length there is only mask which prints however in real life because of depletion the effective channel length is not same as what I thought as channel length okay now this is function of 1 upon L effective please remember this also is a function of Vds and there is also function so there is some plus minus by some is increasing more some is decreasing and therefore there will be at every Vds lambda C is not really a constant quantity which I assume lambda constant okay many circuits this works without just thinking you put it and you know God is on your side so it works but many a times bad days do come and then you find your circuit is not behaving so what you do the best person a quick tricking one method is at the end of the day what happens that it may take millions years possibly to actually reach to the value okay or sometimes in the first hit okay so there is a probability and an event of event probability is not known please remember if I put a dice 100 times I have no real worries okay some day half you say 50% head and tail but in a time frame there is no problem when this event will occur is not known this can happen now or maybe after any number of years okay so time event is very difficult to predict so the many say oh it has a very low probability agreed one in million but that one in million may occur now then what we do okay so for a worst case designer we must know prior what can happen worst then I say okay I will take care of this is that issue why designers look into all those issues because for them that worst case is what he is designing for heavens may not fall but may fall may not miss may fall and that may may be today and that is where the worries are very strong in designs so is that clear when I teach a course on analog circuit second year I keep telling nothing happens this is how it happens this is how you can derive but when I start designing I realized that my circuit is not performing as I thought as my analysis gave me I thought it should give me gain so much bandwidth so much it did not then I start going back and say what went wrong I actually followed the professor he said this is how you should do analysis is like this but it is not working the working part of release the deeper issues which we that time hardly tell because we thought that at the concept part we should tell but here is not just the concept here is something an issue which is realized things may not work at all okay but I say I am telling God is great most cases it works because you last year thesis you will pick up what values he chose so if he has got it you will also get it this is how it works okay so that is how it works but essentially it is a trick which may work okay so some what is what is the designers expertise is he should have therefore experience if you have some time it chips very well what goes wrong when okay so he takes care of that okay that is why I keep saying a lot of designers have to be experienced design because you must have seen many failures he knows what goes wrong so then he has a thumb rule or as I had as I had as I that's what exactly therefore it is more of a art rather than science because that art is assuming you have enough science in you okay that's why you figured out this is how empirical it is working but to get that empirical relations you must understand why this is occurring like this is what all that I am trying to hit okay so you look at the ideas characteristics once again half beta that I WL effective this is what I said so L effect is L minus XDL which is if I modified this I substitute and I see this lambda C which is something like this is now a function of PDS through XDS XDL and also a function through DSDL by this I did not want to expand all of it though if you wish I can show you the kind of expression which I derived seems to be very funny this is the expression just note down these are nothing great this is ideas is some original expression I now can you think I did some mischief here also that lambda part is really taken care through this L effective part I did not put one plus lambda way but I am taking care through L effective that issue so if I saw this I just put X minus this as this form I get this expression and once you get this expression you don't have to write you write down my final expression I only took time to write down all of it so lambda C is L minus XDL upon this and I hope you are written down I have got both expression every expression I derived XDL I derived DSDL by DI derived I just now substitute if this is that okay just substitute and if I substitute is that okay the lambda C I'll come back to lambda C only you write down the law this is not this anyway we are not going to solve by this way this is only to show how spice will take care of many such issues okay lambda C we said lambda dash by L is that correct so I actually converted into that lambda dash by L kind of expression by substituting this is L effective kind this is my DXDL by DVDS just substituting and you expand this and this is the kind of expression you get it what is this expression this is that lambda dash term which I said lambda dash by L and this lambda dash is a function of ESB function of PDS and therefore lambda is not a constant quantity is that clear to you lambda is not a constant okay so you may go down then I'll show you the second part of lambda so you can see from here lot much expressions appear okay so now this issue is clear that 1 plus lambda video lambda is not a constant though as I say in all our analytical designs we will assume some value and get away but reality must be in your mind that in real circuit sometimes while circuit is not performing partially maybe your R0 is not getting what you are thought okay so what is the solution you use VSB as additional feature for you okay VSB you actually play with VSB then okay adjust that value so that you get R0 of your choice is that clear to you this is what I am saying design additional VSB is in your hand now I may be never did it now we have a control okay I'll play with it okay to get what R0 I was looking for this is the trick which I thought you should know why people actually go and bias it then now there are issues for that do we need constantly bias me may not so there must be some feedback somewhere which says when I want and when I don't want so that removal of VSB also should be possible so that's more complications is that okay all of you the second issue in the lambda was related to lambda M which is as I say mobility dependent we don't go into detail because it's much more interesting from device point of view how mobility varies why it varies you just take it from me that this is the expression which is new zero minus mu VDS upon new zero VD this is called the lambda parameter with mobility variations where new zero is the low field mobility and new VDS is the mobility at the applied bias so if I now assume that lambda C is winning a for a given bias point for a gain VSB I still assume lambda is lambda C plus lambda M is still constant which may not be true but okay and if I use this expression this is the expression which I got earlier to show that's what the model I why I showed you now fully model because in real life model and in the analytical model what is different okay we assume this constant which was not there in beta dash we assume constant which was not okay so when spies does it doesn't mean it you are given some physics to it it actually starts solving and then your value of ideas is not same as what you thought analytically is that but why do you need analytically then because which value to start the simulation so initial guess which I am a non-linear equation if you have guests collect current so there is no possibility of you reaching the solution because it is already divergence okay you already cost fx zero function so in solution it is very essential for a non-linear system to know initial guess and guess very closely correct analytical solutions do give that guess at the end something but where to take some like for example Intel 20 and 4 chip the latest version actually took in the first time they did six months of simulation on that so many transistors so many this hardcore problem was you know a lot of good computer scientists were there to do everything and it took six months to finally get through okay because they wanted full test for that they did now they don't know now they know how much is important how much that much simulation is enough for further designs that so some analytical thinking is an essential part in analog designs okay so if I use this expression as it is this is the expression without VDS and this is the expression with VDS and if I plot for different VGS ideas characteristics at least the lower side of the ideas from the knee side if I extrapolate them down to minus VDS axis this is for N channel device okay for P channel it is the opposite actually where it will come third quadrant this is in the first quadrant this this curve will be in the third quadrant and this will be positive there because that this will be the others please remember it is minus VGS minus ideas for P channel plus ideas plus VDS for N channel so just take it to the third quadrant and you will find that is for P channels so if you see this expression if you see this equation all of them somehow meet at a fixed value of VA is that good the slope is 1 plus lambda VDS videos time you are taking this is so I figured out that if I take this as a VA this is equal to say lambda must be 1 upon VA because then only it will meet at if you say assume lambda is constant and at this point yes I had VDS it may not be so this is called early voltage this is called early voltage so many a times instead of specifying lambda they may specify you early voltage which essentially is giving you lambda indirectly or one upon VA is lambda so many problems when I give our intention and I do otherwise I say okay early voltage is so much so that essentially is giving you the slope characteristics how do you calculate you can see if this is the current and let us say this voltage is very large compared to this let us say this is 50 volt this is 0.5 volt or something so I assume that is smaller so this is 50 volt divided by this much current is the resistance is that correct so what is R0 this divided by the bias current which you put is roughly R0 for it for you is that correct so that is the analytically so how much R0 I am getting I can see directly from this expression itself or this curve itself okay so I repeat VA is called early voltage the word has taken from base PMP or sorry is a bipolar transistor when the base gets punched okay the depletion where from base collector junction goes to a meter junction short circuit equivalent occurs and at that time we say there is no transit time all carriers can go okay so that is the point at which we say points through has occurred let us revisit the VT expression once again we are also interested to know delta VT is this expression and we like to see if VT varies how ideas where is because if you say VGS minus VT and VT varies then I must know what ideas where is with a subset bias because if BSV changes VT ideas will also change with BSV so I want to know relationship between ideas and subset bias because these are all issues analytically I may brush aside but in real life they must be taken care in solutions is that the issues which I am raising are a first order issue there are many second order effects which I am not talking about there are many issues right now but at least the dominant issues was me brought for the designer because this must be understood that why your specs sometimes do not meet the reason you are not taking care of many of such smaller variations you thought smaller but they are no more smaller okay so I want to know relationship between this okay also many books are many times I also this BSV and VBS is interchanged but take it it is a new minus okay sometimes you write both sources bias sometimes you write source to both bias okay if it is so just change the sign because source is grounded so the BSV should be minus but I can assume this grounded and plus yes I can create equivalently so which way I look at the bear and which way I look at the bias is only your choice I say VBS you may say BSV so the bias is same do whichever way you look okay so this sign has to be taken care whenever sometimes in some books you may say right BSV some other books they write VBS and then they do not show you sign the sign has been taken care through opposite polarity here so please take it because this the two or three books which are suggested they all are not agreeing with same nomenclatures so I thought in case some of you will read the book hopefully in that case if you have an issue then you can get okay I did this please take it this is very important this is needed in the immediately for us why I brought this please take it this expression is going to be used in my actual equivalent circuit that's why I thought I should show you immediately so I write ideas is beta VGS 1 plus this so with that half part somewhere I think I missed then I differentiate this and of course then 2 also will go okay just take it I think there is some I quickly I did it this turns constant use check for this so I differentiate this I have already calculated this earlier delta VT by delta VSB which last expression I show you substitute here and I get okay maybe this two minutes beta times VGS minus just take it that way to exist so it is beta times VGS minus VT plus this constant gamma upon 2 VSB plus 2 5 to the power half I think that 2 has been taken care by me somewhere I just don't take it but just think of it this is a constant for a VSB gamma is already only a function of Seox and in doping this is only a function of doping so each is some constant you have and what beta represents what is the it has importance it takes care of what VT variation with substitute bias okay you are worried about now that is substrate by indirectly also appears VT is going to be affected so what we do is this of course we can equal into saying that eta this is of course we will see little letter GN okay this eta is given by this expression and typically this is 0.6 typically eta has a value of typically doesn't mean actually you may have to solve for given values but around 0.6 is the value and we will that this term is GM so this delta ideas by delta VSB what name I can give you it is also GM but with bulk substrates I say GMB trans conductance with the for the subset bias is equal to GM times eta we will put in this this is GM but so we say not only there is one GM going on with you but there is an additional GM is created if there is a subset bias and which is not small 0.6 means if they are in parallel GM sources then it is 1.6 GM equivalently I am going to get equivalent current source so you thought it is smaller but it is now higher that is why I say VSB is now my parameter of control I said look I can now start playing games on it is that clear that is why I showed you first time when I am telling you that why VSB became so relevant both in digital and in analog because now the technologies allow you to do many other things okay okay so this GMB is another parameter of new designs which we must take care if you have a mass amplifier and right now this node is already I start looking at that the input V in is V bias plus V signal so change in delta V in which is signal is V in minus V bias we always define small ID capital DS is equal to small ideas which is the AC current of V in current time varying and this is DC this is how small signal values are expanded delta idea to the AC current okay so if I bias this is my mass view for a amplifier view VI characteristics and let us say I bias at 1 V bias that is on the V inside I fixed the bias VGS whatever I fixed here and then correspondingly I know some V 0 I am going to get because of the transfer okay however if you see delta ideas by delta V in that is delta ideas by AC this is small ideas is small VGS which is nothing but the trans conductance so now I see delta V 0 change in if I there is a small change in bias to this there is a change in V 0 from here to here that delta V 0 is minus GM times R into this is the current I delta ideas into R delta ideas is the AC current R is the voltage drop across this so this is the why minus no that is apart from here it is actually if you say total value VDS minus IDRD is this but DC for AC valuation DC goes away so minus IR is the output AC voltage this occurs because of what the transistor always gives you 180 degree out of phase plants okay out of face to the input 180 minus can be thought as J square J is 90 degree J square means 180 degree so it actually gives you opposite polarity whatever is the input side and that is something one this is what the principle of inverter was in and digital same way here is how only different we call now it is out of phase 180 degree out of phase this is very relevant in all analog designs how much phase you create okay okay so gain function from this delta ideas by delta is a GM so we are substituted here delta V 0 by delta V GS is minus GM or and this is essentially the gain of a amplifier sorry this is RD so please change it to RD wherever I had done it okay however as I said to you in real life RD may not be the one which I am going to use in fact okay because the resistance just for the heck of it for those who think otherwise if you don't note it down then I will just show you why I never like to use actual resistance in silicon okay I can create I will show you what I can create but in some circuits even in analog you are forced to use resistances which are which block of the circuit normally will use this anyone any heard of it the band of reference when I create fixed which bias that time there will be our requirement because you have I want temperature positive temperature coefficient something transistors give negative temperature coefficients so I need compensations so I actually want positive temperature coefficient material R is so I actually are there to compensate okay so think of it R is not completely out of picture but in most circuits will not like to use R for this reason typically semiconductor bar if you use it and this is the current path I ground this I apply VDS or V so V is equal to so current I entered so V by I is R but if I if the show by chosen R can be always written as row L by a this is my length this is my T and this is my W okay so this is called resistivity of the material so row L W into T so that is called R is equal to RS L by W where RS is called sheet resistance or sheet resistivity either of them which is row by T for a given technology generally this available because we are not going to put separately whatever processes we have for making CMOS only those doping will be available to you wells substrate and plus P plus that there is no only available this value is normally given by the word which is called sheet resistance or sheet resistivity is always technology dependent what process you are doing and the highest RS which I can get in a normal technology normal I can create which is ohm per square it is defined as ohm per square 200 ohm per square that's the best I can get of course other materials can give mega ohms or mega ohm per square but silicon process technology for CMOS will not allow you a region which is better than 200 ohm per square if I want a 40k resistor or from this expression how much will be L by W the highest I have 200 ohm per square how much it is 200 this L by W is called aspect ratio is that correct aspect ratio L is 200 times the width length is so much and width is so much any drawing person will tell you that if the aspect ratio that the accuracy in making that itself goes away well I cannot hold on that one micron line for 200 micron is very difficult by drawing also but even if I print otherwise the problem is if let us say W is half a micron for a given technology half micron technology this is 100 microns so in a transistor may require 0.5 by 0.5 micron area and your resistor is requiring 200 into 0.5 area or a resistor abhi itna sab jaga lagainge so transistor dikhenge nahi se resistor hi dikhenge thoda darbhai pata laga ki chip size mein char resistor kaya kuch jagaini so isle one cannot use resistors because it will just take over area okay of course you can build this if you can increase this row RS 2000, 2000, 5000 poly resistors people use sometimes in the ran s runs then there is a special technology additional money if you invest yes R can be reduced I mean length width ratio can be reduced so in most technologies what we will use transistor itself as the resistor you can see from here after ID VDS means current voltage slope of delta V by delta I is a resistor so there is a small resistor here there is a large resistor here so you keep your transistor either in this region or in this region so you either get this resistor or you get this resistor to change this change the W bias because IDS is in your hand W bias so change the size and you get different RS is that correct so in a analog circuit preferably transistors will be used as resistors they will never be used as I mean there is no additional such huge of course one to say some area what do you do anyone nah so how do I do it spiral it or member it okay something like this so you can adjust bit of parameters okay okay so is that issue why RS or member so not in circuit classes second we keep showing RR there okay because it is okay does not matter how do I create but I just want to put the numbers there but I see the first thing we will do is we will get rid of this actual resistor from there now the problem with this most cases when I put some transistor there I must guarantee that that R does not change okay and if that changes then I have more problems and that is where the design start that okay that R is not really the constant I thought okay repair is then how much varies so cannot take care of my design so much very okay this is the issues which designers look for now ideas same expression again three four times to show you some other way of looking the same thing I have that same VCCS ideas kind of amplifier shown I rewrite the expression delta V out which is AC in fact half beta V over square my right now I am leaving alpha minus half another lambda half beta V over V plus delta V in VGS minus VT minus plus V small this square call this okay here I use R so I expand I expand squares then in the terms if they are there V over square and this will go away okay and I get delta V in square plus 2 V over delta V in this V over V over V cancels so that minus half beta R 2 V over delta V into 1 plus just adjust the terms there is nothing big going on I just take out some terms leave some terms came side just take V over V in out so I get 1 plus I am taking this whole expression out so 1 plus delta V in upon 2 V over okay now this expression can be further modified have you written down please note down I repeat what did I do AC is nothing but total minus this is with signal this is without AC signal the subtraction is only the AC signal okay I am now going to get another GM expression which is very relevant that is what designers should look at that is why I have got these expressions for you expand this V over square delta V in square plus 2 V over minus I took sign so this minus V over cancels square cancels for this I take this term out I get this is that okay okay is that okay everyone minus half beta R 2 V over delta V in 1 plus delta V in by 2 V over V same expression just adjust it what is this half V over square half beta V over square is what DC value of ideas without signal that is what V over square we started with so this is ideas to delta V in R by V over plus delta V in by 2 V over this becomes 2 ideas by V over is that clear 2 ideas by V over the remember term is R delta V into this is that okay only reorganizing the terms nothing great I am doing I am just reorganizing because then I am looking for the delta ideas I mean ideas by V over term then so I get 2 ideas by V over is R this delta V in is delta V in 1 plus delta V in by 2 V over now what is the gain I defined AC voltage by AC current or change in output voltage by change in input voltage which from this expression becomes minus 2 ideas by V over times R into 1 delta V in by 2 V over is that clear if you say it is a small signal AC signal delta V in is much smaller than you because what is V over capital VGS minus VT VGS is the bias value works what will be signals millivolts so you can see there as long as that is the condition I am putting what is small signal V in must be very small compared to V over is that correct then it is small signal in that case this term can be neglected so I get minus 2 ideas by V over into R but I know AV I just derived as minus GM times are okay which means the GM is 2 ideas by V over is that correct this is an expression which I will use this is one way of looking at the design using I this is my parameter I want to adjust GM I will adjust GM through 2 ideas by V over ratio is that correct I am going to adjust my GM through ratio neither ideas I can do either and do this but what I am now given you I take the ratio so now I have a larger game to play I changed efficiently both okay some way so that I get a ratio and to adjust to this I will adjust W by else so that this ratio is different but individual is different that ratio is what I am looking for please call ideas by V over designs this is different from your designs I will only is to always design using VGS minus VT now I am introducing a new way say okay let us look design based on ratios of ideas to be used just do not look for you alone okay I show you there are three possibilities which can one of them is this and this is much more powerful tool in actual designs we can always design bias dependent here is a ratio of so GM dependency what because GM buy a little into this kind of game at the end of the day what is my important parameter for game GM so I say okay you want this game so you want this GM so let us go back and look what can I do for this okay so I am looking more from the analog side okay GM control so what should I control as long as I adjust the ratio I mean because then the issue started power will come everything else will come so I see to it that all this adjust to this okay I do not say this should be pen and something I may say 100 and something I may say 5 and something I have a ratio to adjust exactly as long as that ratio adjust I get my GM so this is essentially I want some very new method but this is little better techniques of designing a chip rather than the normal VGS VT minus method which will show you that is also possible initially we may solve using those methods but then I show okay now convert on this your variety of solutions now before I go to the next game function I am not yet talked about that word again but let me be very clear on that if you see a ideas videos characteristics in saturation this is my ideal this is my real though the slope as I say may not be constant but for a one VDS I may say it is one value okay now I define R0 as delta ideas by delta VDS slope of this characteristics R0 is finite in real case because there is a slope and ideas is a function of PDS in such that is what one plus lambda VDS term we derived okay so if I do this there are few things which you should remember and that is why I am showing you all this is that simple characteristics for R0 please remember we will never go in this region which is the linear region why why will never operate our trans amplifier here there is no game there okay there is no games there actually so do not we will always operate in saturation region and please remember there the actual value of input available to you is very very small because it sharply falls B0 VIN so the game is only available in a very small VIN ranges okay is that expression clear R0 is nothing but 1 upon R0 is delta ideas at any VDS this is one VDS value so different VDS this will be different because if you have a characteristics somewhere here this slope may not be parallel exactly okay and therefore they may have different R0s okay is that okay so if I write this expression RDS again as I wrote earlier beta by 2 VGS minus VT 1 plus lambda VDS lambda we have now know what it is so you must take from me now so called channel length and mobility modulation we do in reality lambda is a fudge factor what is fudge factor means it is a fitting function which fits to the curve expression of R0 why do I want the expression I know it may vary so I figured it or how may how it will vary in real life what we will do therefore having found ideas VDS characteristics for different VDS at bias points I will actually fit a curve there okay and get R0 there that is the end of it whether it fits into my physics or not irrespective because that value is available to me I will use that okay therefore it is some kind of a fit function which I am going to use in real life so please remember the theory etcetera is fantastic to understand but in real life we always use this as a fudge factor fit okay now if you know so one can see lambda is somewhere related from this expression to 2 ideas beta is come upon VDS and if I differentiate delta ideas by delta VDS please remember this is the expression which I am going to use where lambda is given by this I just come back and show you the same expression which I derived earlier have you written down R0 is just there is nothing to write only thing is statement I am making is left is a fit function rather than the real physics behind in real life if I differentiate this R0 is coming something like this and if I fit correctly I get the expression ideas lambda 1 minus lambda VDS if I expand if it is roughly equal to I if lambda is smaller lambda square is even smaller so it is ideas lambda so my expression what do I do is R0 is 1 upon ideas lambda so if I am specify lambda or VA I have knowledge of my R0 is that correct how do I get R0 either I will be specify lambda value or I will specify early voltage which is doing the same and then if I know my bias current ideas then I know my R0 this is with all these conditions so in accuracy is partly built up but this is the first trial for the system so that is good enough value for your evaluation so I always start in analytically saying that R0 is ideas upon lambda they I say I have shown you so much physics how much it varies and why it will varies yes our modeling in spice should take care okay but analytically this is a good enough expression is that difference clear to you why I show you both side because you should not say that this is always correct this is not correct but this is good enough for analytical solutions so first guess how much value gains will be let us say if you design with all these inaccuracies your gain gets 9900 in real life may be 8500 but you say it should be more than 8000 so it does not matter whether I reach 9000 or 8500 okay so how much inaccuracy I can build and is still tolerable for me is all that designer should know okay if that happens he says thank you okay so this is the game is that much clear that it is not the value which matters it is the value bound matters and as long as we remain in the bound your design may still work okay sometimes it may call over design sometime may be under under achievement it is okay but it works okay okay so for a designer should note the following this is my as a designer help okay you write down as a designer you must know this okay for R0 R0 evaluation is tentative okay it depends on technology parameters it depends on the operating point it depends on output switch because whether that videos is other end or this side is and how much is signal R0 is therefore showing nonlinear behaviors I will give some hints on that I will show you what I meant by this swings use proper bounds in spice is that clear so that is the marker so what you should do use proper bounds okay there is nothing called correctness I will just show you this part nonlinear how it works okay just let me finish few minutes that is the last of it you have just now said R0 may actually that may be I will draw a fresh figure at different VDS something like this this is my ideas VDS okay so depends on if you are biasing here biasing here or biasing here slopes here slopes here slopes here are not same is that correct even if you bias here and if you are swing is something like this large wings even then you are hitting different R0s okay so there is a nonlinearity built in in your R0 itself and in real life therefore it should be taken care that which value you are using which is sufficiently okay okay sufficiently okay so please take it R0 is not really a constant so his R0 is not a constant quantity so where do you bias how much swings you give that may decide the variation in R0 and therefore the gains will vary every other bandwidth will vary correspondingly see you tomorrow that is Tuesday next.