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Cadence Accelerated VIP Demo

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Published on May 30, 2012

Dramatically boost verification throughput with Cadence Accelerated VIP and the Palladium XP hardware accelerator.

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  1. 420

    What Made CDNLive! EMEA 2012 Such a Great Event?

  2. 421

    Allegro/OrCAD Roadmaps and Techtorials Event

  3. 422

    Cadence PCB Signal and Power Integrity 3-Day Event Featuring Robert Hanson

  4. 423

    AMD - Cadence Palladium XP & In-Circuit Acceleration Success Video

  5. 424

    Global Unichip - Cadence giga-gate/GHz, 28nm design success Video

  6. 425

    Freescale - Cadence Palladium XP Success Video

  7. 426

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  8. 427

    Global Unichip Low Power Success Video

  9. 428

    IBM and Cadence Collaborate to Solve Advanced Node Design Challenges

  10. 429

    Silicon Blue Technologies - Cadence DFM Services Success Video

  11. 430

    Freeescale Semiconductor - Cadence Low-Power Solution for Kinetis SoC

  12. 431

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 3 of 3

  13. 432

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 2 of 3

  14. 433

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 1 of 3

  15. 434

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 1 of 2

  16. 435

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 2 of 2

  17. 436

    CDNLive! EMEA 2012 Keynote: Lip-Bu Tan, CEO, Cadence Design Systems - Highlights

  18. 437

    Improve Verification Productivity using Save, Restore, Reseed

  19. 438

    Cadence Announces New Accelerated Verification IP at CDNLive! EMEA 2012

  20. 439

    Cadence Announces New System and SoC Verification Technologies at CDNLive! EMEA 2012

  21. Cadence Accelerated VIP Demo

  22. 441

    Dr. Eckhard Hennig on the Cadence Academic Network and CDNLive! EMEA

  23. 442

    Dr. Joachim Rodrigues on the Cadence Academic Network and CDNLive! EMEA

  24. 443

    Marcel Preda, Infineon - CDNLive! EMEA 2012 Paper Presentation Summary

  25. 444

    Interview with Best Paper Award Winners at CDNLive! EMEA 2012

  26. 445

    CDNLive! 2012 EMEA Best Paper Awards Ceremony

  27. 446

    The Introduction of In-Circuit Acceleration into the Cadence System Development Suite

  28. 447

    UVM e Basics 20 - Configuration

  29. 448

    UVM e Basics 23 - Objections

  30. 449

    UVM e Basics 21 - Aspect Oriented Programming

  31. 450

    UVM e Basics 19 - Test

  32. 451

    UVM e Basics 15 - Module UVC

  33. 452

    UVM e Basics 24 - Signal Map

  34. 453

    UVM e Basics 22 - Phases

  35. 454

    UVM e Basics 8 - Sequence

  36. 455

    UVM e Basics 16 - Scoreboard

  37. 456

    UVM e Basics 6 - Monitor

  38. 457

    UVM e Basics 18 - Testbench

  39. 458

    UVM e Basics 17 - DUT Functional Coverage

  40. 459

    UVM e Basics 14 - Virtual Sequence Driver - Sequence

  41. 460

    UVM e Basics 13 - Interface UVC Environment

  42. 461

    UVM e Basics 9 - BFM

  43. 462

    UVM e Basics 11 - Agent

  44. 463

    UVM e Basics 7 - Sequence Item

  45. 464

    UVM e Basics 4 - Interface UVC

  46. 465

    UVM e Basics 12 - Agent Types

  47. 466

    UVM e Basics 10 - Sequence Driver

  48. 467

    UVM e Basics 5 - Collector

  49. 468

    UVM e Basics 3 - UVM Environment

  50. 469

    UVM e Basics 1 - Introduction

  51. 470

    UVM e Basics 2 - Example DUT

  52. 471

    UVM SV Basics 15 - Module UVC

  53. 472

    UVM SV Basics 20 - Configuration

  54. 473

    UVM SV Basics 21 - Factory

  55. 474

    UVM SV Basics 14 - Virtual Sequencer-Sequence

  56. 475

    UVM SV Basics 24 - Virtual Interface

  57. 476

    UVM SV Basics 16 - Scoreboard

  58. 477

    UVM SV Basics 22 - Phases

  59. 478

    UVM SV Basics 23 - Objections

  60. 479

    UVM SV Basics 19 - Test

  61. 480

    UVM SV Basics 18 - Testbench

  62. 481

    UVM SV Basics 5 - Collector

  63. 482

    UVM SV Basics 9 - Driver

  64. 483

    UVM SV Basics 13 - Interface UVC Environment

  65. 484

    UVM SV Basics 11 - Agent

  66. 485

    UVM SV Basics 17 - DUT Functional coverage

  67. 486

    UVM SystemVerilog Basics 7 -- Sequence Item

  68. 487

    UVM SV Basics 10 - Sequencer

  69. 488

    Universal Verification Methodology SV Basics 6 - Monitor

  70. 489

    UVM SV Basics 12 - Agent Types

  71. 490

    Universal Verification Methodology SystemVerilog Basics -- Sequence

  72. 491

    UVM SV Basics 1 - UVM Introduction

  73. 492

    UVM SV Basics 4 - Interface UVC

  74. 493

    UVM SV Basics 3 - UVM Environment

  75. 494

    UVM SV Basics 2 - DUT Example

  76. 495

    I want to be a Cadence VIP

  77. 496

    CDNLive! EMEA 2012 - connect. share. inspire.

  78. 497

    Cadence Straight Up

  79. 498

    You too can be a Cadence VIP

  80. 499

    Highlights from DVCon 2012

  81. 500

    Erik Panu on how Cadence VIP helps customers

  82. 501

    Tom Beckley at CDNLive! EMEA 2012

  83. 502

    CDNLive! EMEA 2012 Paper Presentation Preview: Andre Winkelmann, Wolfson Microelectronics

  84. 503

    CDNLive! EMEA 2012 Paper Presentation Preview: Oskar Andersson, Lund University

  85. 504

    CDNLive! EMEA 2012 Paper Presentation Preview: Marleen Boonen, Methods2Business

  86. 505

    CDNLive! EMEA 2012 Paper Presentation Preview: Rainer Mann, GLOBALFOUNDRIES

  87. 506

    CDNLive! EMEA 2012 Paper Presentation Preview: Rolf Nick, FlowCAD

  88. 507

    Joe Hupcey lll previews formal analysis "apps" tutorial at DvCon 2012

  89. 508

    Xilinx and Cadence - Virtual Processing Platform and Zynq-7000

  90. 509

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  91. 510

    Xilinx - Cadence Virtual Processing Platform and Zynq-7000

  92. 511

    ARM TechCon 2011 -- Cadence-Arm Fireside Chat 2011

  93. 512

    All Things Analog - Interview with Triune Systems

  94. 513

    All Things Analog - Interview with GHz Circuits, Inc.

  95. 514

    All Things Analog - Interview with Designer's Guide Consulting, Inc.

  96. 515

    ARM TechCon 2011 -- DDR4, Higher Speeds and Larger SoCs

  97. 516

    ARM TechCon 2011 -- Creation and Usage of SystemC

  98. 517

    ARM Tech Con 2011 -- Early Architectural Planning using Cadence EDI System

  99. 518

    ARM Tech Con 2011 -- Creating an Effective 32/28nm ARM SoC Design Methodology

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