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Cadence Accelerated VIP Demo

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Published on May 30, 2012

Dramatically boost verification throughput with Cadence Accelerated VIP and the Palladium XP hardware accelerator.

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  1. 429

    What Made CDNLive! EMEA 2012 Such a Great Event?

  2. 430

    Allegro/OrCAD Roadmaps and Techtorials Event

  3. 431

    Cadence PCB Signal and Power Integrity 3-Day Event Featuring Robert Hanson

  4. 432

    AMD - Cadence Palladium XP & In-Circuit Acceleration Success Video

  5. 433

    Global Unichip - Cadence giga-gate/GHz, 28nm design success Video

  6. 434

    Freescale - Cadence Palladium XP Success Video

  7. 435

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  8. 436

    Global Unichip Low Power Success Video

  9. 437

    IBM and Cadence Collaborate to Solve Advanced Node Design Challenges

  10. 438

    Silicon Blue Technologies - Cadence DFM Services Success Video

  11. 439

    Freeescale Semiconductor - Cadence Low-Power Solution for Kinetis SoC

  12. 440

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 3 of 3

  13. 441

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 2 of 3

  14. 442

    CDNLive! EMEA 2012 Keynote: Luc Van den hove, imec, Part 1 of 3

  15. 443

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 1 of 2

  16. 444

    CDNLive! EMEA 2012 Keynote: Tom Beckley, Cadence Design Systems- Highlights, Part 2 of 2

  17. 445

    CDNLive! EMEA 2012 Keynote: Lip-Bu Tan, CEO, Cadence Design Systems - Highlights

  18. 446

    Improve Verification Productivity using Save, Restore, Reseed

  19. 447

    Cadence Announces New Accelerated Verification IP at CDNLive! EMEA 2012

  20. 448

    Cadence Announces New System and SoC Verification Technologies at CDNLive! EMEA 2012

  21. Cadence Accelerated VIP Demo

  22. 450

    Dr. Eckhard Hennig on the Cadence Academic Network and CDNLive! EMEA

  23. 451

    Dr. Joachim Rodrigues on the Cadence Academic Network and CDNLive! EMEA

  24. 452

    Marcel Preda, Infineon - CDNLive! EMEA 2012 Paper Presentation Summary

  25. 453

    Interview with Best Paper Award Winners at CDNLive! EMEA 2012

  26. 454

    CDNLive! 2012 EMEA Best Paper Awards Ceremony

  27. 455

    The Introduction of In-Circuit Acceleration into the Cadence System Development Suite

  28. 456

    UVM e Basics 20 - Configuration

  29. 457

    UVM e Basics 23 - Objections

  30. 458

    UVM e Basics 21 - Aspect Oriented Programming

  31. 459

    UVM e Basics 19 - Test

  32. 460

    UVM e Basics 15 - Module UVC

  33. 461

    UVM e Basics 24 - Signal Map

  34. 462

    UVM e Basics 22 - Phases

  35. 463

    UVM e Basics 8 - Sequence

  36. 464

    UVM e Basics 16 - Scoreboard

  37. 465

    UVM e Basics 6 - Monitor

  38. 466

    UVM e Basics 18 - Testbench

  39. 467

    UVM e Basics 17 - DUT Functional Coverage

  40. 468

    UVM e Basics 14 - Virtual Sequence Driver - Sequence

  41. 469

    UVM e Basics 13 - Interface UVC Environment

  42. 470

    UVM e Basics 9 - BFM

  43. 471

    UVM e Basics 11 - Agent

  44. 472

    UVM e Basics 7 - Sequence Item

  45. 473

    UVM e Basics 4 - Interface UVC

  46. 474

    UVM e Basics 12 - Agent Types

  47. 475

    UVM e Basics 10 - Sequence Driver

  48. 476

    UVM e Basics 5 - Collector

  49. 477

    UVM e Basics 3 - UVM Environment

  50. 478

    UVM e Basics 1 - Introduction

  51. 479

    UVM e Basics 2 - Example DUT

  52. 480

    UVM SV Basics 15 - Module UVC

  53. 481

    UVM SV Basics 20 - Configuration

  54. 482

    UVM SV Basics 21 - Factory

  55. 483

    UVM SV Basics 14 - Virtual Sequencer-Sequence

  56. 484

    UVM SV Basics 24 - Virtual Interface

  57. 485

    UVM SV Basics 16 - Scoreboard

  58. 486

    UVM SV Basics 22 - Phases

  59. 487

    UVM SV Basics 23 - Objections

  60. 488

    UVM SV Basics 19 - Test

  61. 489

    UVM SV Basics 18 - Testbench

  62. 490

    UVM SV Basics 5 - Collector

  63. 491

    UVM SV Basics 9 - Driver

  64. 492

    UVM SV Basics 13 - Interface UVC Environment

  65. 493

    UVM SV Basics 11 - Agent

  66. 494

    UVM SV Basics 17 - DUT Functional coverage

  67. 495

    UVM SystemVerilog Basics 7 -- Sequence Item

  68. 496

    UVM SV Basics 10 - Sequencer

  69. 497

    Universal Verification Methodology SV Basics 6 - Monitor

  70. 498

    UVM SV Basics 12 - Agent Types

  71. 499

    Universal Verification Methodology SystemVerilog Basics -- Sequence

  72. 500

    UVM SV Basics 1 - UVM Introduction

  73. 501

    UVM SV Basics 4 - Interface UVC

  74. 502

    UVM SV Basics 3 - UVM Environment

  75. 503

    UVM SV Basics 2 - DUT Example

  76. 504

    I want to be a Cadence VIP

  77. 505

    CDNLive! EMEA 2012 - connect. share. inspire.

  78. 506

    Cadence Straight Up

  79. 507

    You too can be a Cadence VIP

  80. 508

    Highlights from DVCon 2012

  81. 509

    Erik Panu on how Cadence VIP helps customers

  82. 510

    Tom Beckley at CDNLive! EMEA 2012

  83. 511

    CDNLive! EMEA 2012 Paper Presentation Preview: Andre Winkelmann, Wolfson Microelectronics

  84. 512

    CDNLive! EMEA 2012 Paper Presentation Preview: Oskar Andersson, Lund University

  85. 513

    CDNLive! EMEA 2012 Paper Presentation Preview: Marleen Boonen, Methods2Business

  86. 514

    CDNLive! EMEA 2012 Paper Presentation Preview: Rainer Mann, GLOBALFOUNDRIES

  87. 515

    CDNLive! EMEA 2012 Paper Presentation Preview: Rolf Nick, FlowCAD

  88. 516

    Joe Hupcey lll previews formal analysis "apps" tutorial at DvCon 2012

  89. 517

    Xilinx and Cadence - Virtual Processing Platform and Zynq-7000

  90. 518

    Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  91. 519

    Xilinx - Cadence Virtual Processing Platform and Zynq-7000

  92. 520

    ARM TechCon 2011 -- Cadence-Arm Fireside Chat 2011

  93. 521

    All Things Analog - Interview with Triune Systems

  94. 522

    All Things Analog - Interview with GHz Circuits, Inc.

  95. 523

    All Things Analog - Interview with Designer's Guide Consulting, Inc.

  96. 524

    ARM TechCon 2011 -- DDR4, Higher Speeds and Larger SoCs

  97. 525

    ARM TechCon 2011 -- Creation and Usage of SystemC

  98. 526

    ARM Tech Con 2011 -- Early Architectural Planning using Cadence EDI System

  99. 527

    ARM Tech Con 2011 -- Creating an Effective 32/28nm ARM SoC Design Methodology

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