Loading...

58G PAM4 Transceiver Performance

1,516 views

Loading...

Loading...

Transcript

The interactive transcript could not be loaded.

Loading...

Rating is available when the video has been rented.
This feature is not available right now. Please try again later.
Published on Mar 30, 2016

This demonstration showcases the latest in Xilinx SERDES development with the first public display of the Xilinx 58Gb/s PAM4 transceiver. The test chip implements full transmit and receive data paths with pattern generators and checkers. This demonstration shows both the high fidelity of the transmitter via an eye diagram and the strength of the receiver as data is run from another transmit lane, over a backplane and into the receiver to be equalized and received with orders of magnitude better BER than required.

Loading...

to add this to Watch Later

Add to

Loading playlists...