The Schvab FPGA-based Computer Vision Embedded Module

This is a short video presentation of my Master's Thesis project.
Basically it is a SURF features (http://www.vision.ee.ethz.ch/~surf/papers.html) extraction accelerator, which consists of Xilinx XPS IP cores and their Linux drivers. Thanks to a FPGA and overall system architecture, this platform can be easily modified for other CV algorithms.

I have described the FPGA SURF accelerator for the first time in this article:
http://www.ballos.com/tepraconnect_interface/TePRA09/311.pdf
The thesis extended abstract is here:
http://schvab.no-ip.com/sfcvem/MasterThesis_ExtAbstract.pdf
The thesis full text can be downloaded here:
http://schvab.no-ip.com/sfcvem/MasterThesis_pub.pdf

Category:

Science & Technology

Tags:

• FPGA
• SURF
• Linux
• Xilinx
• Computer
• Vision

[koeficientas]

In your thesis and video i see that you implement the features extraction only. Maybe since this time you realize the Haar wavelets computation for descriptor on FPGA? I try do it now on 60 fps vga. The most complex task is to calculate Haars for each interest point. That needs the neighbours values, the higher scale we have the major number of neighbours we need for orientation evaluation.

[jschvab]

@koeficientas Yes, the Haar wavelets consume the most of the time during the software extraction of descriptors. I have in mind a design of a wavelet calculation accelerator that will utilize the 4MB SRAM on the module as a cache, but I have stopped working on this project since I lack motivation to continue - It seems to have a very little possible application area.

[banzie74]

Not quite clear as to what does it achieve ? What CV problem does it solve ?

[jschvab]

@banzie74 It's a SURF algorithm implementation which uses FPGA logic to accelerate the most time consuming parts of algorithm. In the example video, the calculated features are only sent into computer and displayed. I recommend reading either my thesis or at least it's extended abstract...

[okamiisa1]

Good thesis.