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Sec 4-4A Tutorial for Creating a bdf file for FPGAs

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Uploaded by on Apr 21, 2011

Altera Quartus II FPGA Tutorial: Creating a bdf file. Part A in a five part series describing how to use Altera's Quartus II software to implement digital designs in an FPGA using schematic design and VHDL design entry. This material follows Section 4-4 of Professor Kleitz's textbook "Digital Electronics A Practical Approach with VHDL" 9th edition
http://www.amazon.com/William-Kleitz/e/B001IQWPDU/

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  • IT'S THE GUY WHO WROTE MY BOOK!!!! THAT'S AWESOME!!!

  • Thanks a lot!

  • Hello teacher, is good, i am iniciate work with the altera epm7000 famili, possible send my you email for the questions, tankyou.

  • Ah.. I got it. Reason for using v9 is explained in the 2nd video. Actually, it was sort-of explained in this video, but it wasn't clear that versions later than v9 didn't have the functionality referenced in the tutorial.

  • Useful tutorial for beginners, thanks.

    It's interesting that this is with v9 but dated Apr 21 2011. I've just downloaded v11 build 157 (July 2011). Page 4 of 5 in the new project wizard was quite different, I just left all the defaults, so I hope I got it right - guess we'll see soon. I got a whole lot more warnings than Bill did (14). Many of the warnings related to licensing, presumably because I'm using the free version of Quartus. My device is EP2C5T144C8N.

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