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VDU Fractal Demo

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Uploaded by on May 13, 2011

This demo shows a simple Mandelbrot set visualiser I wrote for the UoM's ARM development boards pumping pixels into my VDU (i.e. framebuffer+VGA signal generator) implemented on the on-board FPGA.

The speed is as horrendous as it is mainly due to the boards running an emulator which actually executes the ARM code (for the safety of the board and for convenience of debugging) and so it takes about 12 minutes to render the whole image.

The colours are a little funky as this video was shot before I added a proper colour pallet. http://jhnet.co.uk/misc/fractalVDU.jpg shows a picture using a green-red-yellow pallet.

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Science & Technology

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