MAH PONK (FPGA Pong)

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Uploaded by on Jul 1, 2007

An implementation of PONG in Verilog HDL on an Altera FLEX 6000 series FPGA. The board is hacksawed from some old piece of hardware. The VGA output is RGB, 1 bit per channel, 640x480 @ 75Hz. Analog inputs from a serial ADC connected via SPI. Very messy junkstruction.

The project description page is here: http://sensi.org/~svo/mahponk -- Verilog HDL code is released under modified BSD license, hardware under Creative Commons.

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Uploader Comments (svofski)

  • @svofski Can your source code work on a Xilinx Spartan 3a starter kit?

  • @wanderingherald not without significant modifications. besides, it was my first ever FPGA project and I wouldn't recommend learning from it.

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  • shite

  • FAKE!!!

  • Thank you :)

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