Lecture Series on Computer Architecture by Prof. Anshul Kumar, Department of Computer Science & Engineering ,IIT Delhi. For more details on NPTEL visit http://nptel.iitm.ac.in
I have a question: At time 4:27, I see that under PC grp its decoded into 4 bit(Eg: 1x01, 00xx...) , But when we formed PC grp table in previous lecture we had only 3 signals(Pwu, Pwc, Pscr) Then why is it decoded into 4 bits.I didnt get the logic for that. Pls reply ASAP. Thank you.
Instructions are only processed when the Program Counter decides to, and most likely the program counter won't send the new instruction until the previous one is completely done (unless there is some pipelining or something fancy going on)
I have a doubt, what happens to the next instruction which coming into control unit? since one instruction needs few sequences of microinstruction to be executed and each microinstruction needs a clock cycle.
I have a question: At time 4:27, I see that under PC grp its decoded into 4 bit(Eg: 1x01, 00xx...) , But when we formed PC grp table in previous lecture we had only 3 signals(Pwu, Pwc, Pscr) Then why is it decoded into 4 bits.I didnt get the logic for that. Pls reply ASAP. Thank you.
TheFansOfINDIA 5 months ago
hey ny1 pls send me few more videos of microprocessor and interfacing quickly i need 2 stdy 4 xams........pls make it fast........dis 15th i ve xam
gautamireddy1990 1 year ago
Instructions are only processed when the Program Counter decides to, and most likely the program counter won't send the new instruction until the previous one is completely done (unless there is some pipelining or something fancy going on)
dunkelblau2006 2 years ago
I have a doubt, what happens to the next instruction which coming into control unit? since one instruction needs few sequences of microinstruction to be executed and each microinstruction needs a clock cycle.
aeonnerd 2 years ago