Z80A CPU Adress scan, ZILOG CPU

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Uploaded by on Jun 3, 2011

Address scan of a Z80A CPU (NOP`s)

The address bus of a Z80A CPU is connected to LEDs via bus drivers 2x74LS240.
The system control bus of the CPU is also connected to LED`s via busdriver 1x74LS245.
The clock signal comes from a NE555 timer (set to approx. 2 Hz frequency). The NE555 output is wired to a Schmitt Trigger 74LS14 and the output of the Schmitt Trigger goes to the CPU clock input.
The databus of the CPU is connected to the output of 8 latches (Flip Flops = 1 Bit memory); the input of the 8 latches is HIGH. 1x74LS373
Important: All unconnected inputs of the CPU are lifted HIGH; they are connected to +5 V via 1k Resistors. (also the Reset input)

Schematic will follow shortly on www.roehrenklingklang.de

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Uploader Comments (nullbewahrer)

  • Hello,

    the schematic is online at roehrenklingklang.de now. I`ll mail the high res schematic PDF to anyone interested in. Regards; NULLBEWAHRER

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  • i also need schematic for eprom programmer.

  • Can you email me this schematic in higher resolution?

    email: simor.robot.v.s@hotmail.com

  • i cant find the schematic there!please help me

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