This video shows the UTD robot's 1st and 2nd runs at competition. Unfortunately, 14 hours before the contest our FPGA board died, which was the brain of the robot. We managed to port all the verilog code to a Parallax SX chip which was previously used for wireless start, along with redisigning the weight system from scratch to work without our 13 bit A/D chips (which were designed for use by our FPGA).
Amazingly we managed to get the majority of our functions ported correctly, but with the limited time we couldn't finish the task completely and the robot froze after delivering the 2nd cask. Regardless, the students never gave up in spite of loosing both their "brain" and weight system.
Go UTD! WHOOOOSH!
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