Sign in to YouTube

  1. Faster HW/SW Verification and Bring-up with Hybrid Virtual Platform

  2. CDNLive SV 2014: PMC Improves Visibility and Performance with Spectre APS

  3. CDNLive SV 2014: Avago Speeds Route and Timing Closure with Encounter Digital Implentation System

  4. How Nvidia is Speeding Up Timing Closure of Advanced-Node Application Processors

  5. Lattice Saves Millions, Avoids Respins and Product Delays with Sigrity Tools

  6. MediaTek Gets High-Quality Smart Devices to Market Quickly with Palladium Platform

  7. PMC Gains Faster Analog IP Verification with Virtuoso Platform

  8. Faster Simulation, Faster Builds at Freescale with Palladium XP Platform

  9. Fast Debug of RTL, Speedy Post Analysis

  10. Getting PCB Designs to Market Quickly with OrCAD PCB Design Tools at FTD Automation

  11. Shorter Runtimes and Better QoR for Avago

  12. Meeting PPA Goals on Design of ARM Cortex®-A57 Processor

  13. Analog Devices Raises Productivity with ModGen Tools

  14. STMicro Shortens Turnaround Time with Cadence's Mixed-Signal Solutions

  15. Bluespec Taps Into Rapid Prototyping Platform for Hybrid Prototyping

  16. Saving Time and Money with Configurable Processor in Joint CPU and DSP Development Environment

  17. Global Unichip: 20nm Testchip Tapeout with Cadence and TSMC

  18. NXP Shortens Verification Cycle for Smart Card SoC

  19. Faster Debugging with X-Propagation Simulation and SimVision Debug Capabilities in Incisive Platform

  20. Plan-Driven Low-Power Verification and Debugging at STMicroelectronics

  21. Easy-to-Use, Scalable PCB Design Tools Integrate with Enterprise-Level Systems

  22. Detecting System-Level Corner Cases During Low-Power SoC Verification

  23. Shorten Verification Time with Specman

  24. Fast Bring Up, Verification, and Turnaround Time Help Broadband Start-Up Ramp Up

  25. Verifying the RTL in an Analog Circuit

  26. Analog Devices Automates and Accelerates Layout with Virtuoso Platform

  27. Unified Workflow with Allegro and OrCAD PCB Design Tools

  28. Shorten EMI Testing Time on PCB Designs

  29. Place-and-Route in Under a Day for Allegro Microsystems

  30. EDAis on Why Cadence PCB Tools are Most Popular in Israel

  31. Validating Design Intent and Improving Design Quality at Micron

  32. STMicroelectronics Automates Full Custom Analog Layout Flow Using Constraints

  33. Successful and Fast Rollout of Analog ICs with Cadence Hosted Design Solutions

  34. Implementing the First 2.4GHz X-Gene 64-bit ARM Processor at Applied Micro

  35. Verifying 20nm Designs at STMicroelectronics

  36. Gary Smith on System Verification

  37. ARM and Cadence Partner to Facilitate Mixed-Signal Designs

  38. A Look at Cadence System Development Tools

  39. Increased Trace Depth, Faster Upload and Time to Market for Zenverge

  40. Open-Source UVM Multilanguage Architecture Simplifies Verification IP Reuse

  41. Verifying Freescale's 64-bit Core with Rapid Prototyping Tools

  42. Validating Mobile SoC Architecture at Broadcom

  43. Better PPA for SoCs with Interconnect Workbench and CoreLink System IP

  44. Faster HW/SW Debug, Embedded Software Development and System Validation

  45. Low-Power Mixed-Signal Verification of Freescale Kinetis Products

  46. Fast ADC Tapeout with Cadence Hosted Design Solutions

  47. Fast SoC Verification for S3 Group

  48. TSMC Europe and Cadence discuss mixed-signal trends in Europe

  49. TSMC Europe discusses the importance of 16nm FinFET technology

  50. The Importance of IP at STMicroelectronics

  51. Tapeout of Industry's First Cortex-A-Based 14nm/FinFET Chip with ARM, Samsung and Cadence

  52. 2.2 GHz Performance on 28nm ARM Dual-Core Cortex-A9 Processor

  53. Integrated SPB environment allows successful, on-time product launch

  54. Verifying Dynamic Memory Controller with Cadence VIP

  55. UVM methodology based Verification Environment for Imaging IPs/SoCs

  56. Developing 4G Wireless Designs with Cadence CPF-Driven Low-Power Solution

  57. Teaming up on SoC Integration and Verification: Cadence and Duolog

  58. Developing ASICs for High-End ground and space apps at Saphyrion

  59. Earlier Debug at Methods2Business with Cadence Virtual System Platform

  60. Enhancing Design Productivity at STMicroelectronics with Virtuoso Custom/Analog Flow

  61. Easing Embedded Software Development for Complex SOCs

  62. S3 Group uses Cadence Mixed-Signal Solution for First-Time-Right Silicon

  63. LeCroy and Cadence PCI Express 3.0 Collaboration Video

  64. X-Fab - Cadence Mixed-Signal Solution Success Video

  65. imec - Collaboration with Cadence success video

  66. GLOBALFOUNDRIES - Cadence Pattern Matching and DFM signoff success video

  67. IBM - Cadence Functional Verification Success Video

  68. NVIDIA - Cadence Rapid Prototyping Platform Success Video

  69. Xilinx - Cadence Virtual System Platform Success Video

  70. AMD - Cadence Palladium XP & In-Circuit Acceleration Success Video

  71. Global Unichip - Cadence giga-gate/GHz, 28nm design success Video

  72. Freescale - Cadence Palladium XP Success Video

  73. Biotronik - Cadence Digital Implementation and Signoff Flow Success Video

  74. IBM and Cadence Collaborate to Solve Advanced Node Design Challenges

  75. Silicon Blue Technologies - Cadence DFM Services Success Video

  76. Freeescale Semiconductor - Cadence Low-Power Solution for Kinetis SoC

  77. Xilinx and Cadence - Virtual Processing Platform and Zynq-7000

  78. Xilinx - Cadence Virtual Processing Platform and Zynq-7000

  79. STMicroelectronics - Virtuoso Custom/Analog Success Video

  80. IBM-Cadence Collaboration Optimizes Hardware/Software Integration

  81. Triune Systems - Cadence Unified Digital and Custom/Analog Success Video

  82. Narendra Konda_NVIDIA_Success Video

  83. Renesas Electronics Encounter Digital Implementation System Success Video

  84. austriamicrosystems - Cadence Unified Custom/Analog Flow Success Video

  85. Imperas Software - Cadence System Developement Suite Success Video

  86. Fujitsu - Cadence Functional Verification Success Video

  87. Bosch - Cadence Custom/Analog Success Video

  88. Samsung and Cadence 20nm Collaboration Success Video

  89. Ambarella - Cadence & Samsung Collaboration Video

  90. TSMC and Cadence Address System-Level Complexity with the TSMC ESL Reference Flow 12

  91. Nethra Imaging discusses Cadence Palladium XP Verification Computing Platform.wmv

  92. Nvidia discusses Cadence Palladium XP Verification Computing Platform.wmv

  93. Global Unichip Low Power Success Video

  94. MediaTek Quick to Market with Palladium