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Uploaded by on Jul 26, 2008

its hard to explain lol NOTE cache is built in cpu

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Education

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Standard YouTube License

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Uploader Comments (rambow70)

  • L2 is on CPU die

  • i know that but its a demonstration, i think the vid or message beside it say its really in cpu

  • dont even get me started with l1 l2 and l3 chache XD

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All Comments (14)

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  • Would have been a good video had english been better

  • @RP88888 U R Welcome :)

  • @BENLADEN7th thanks man youve cured me of my headache of tryin to find a clear "english" answer :)

  • @RP88888 There is a register in the register file called PC (Program Counter), it holds the next instruction address, when this address in not found in cache this is called a miss, a miss occurs because the size of the cache is limited, assume that there is a JMP instruction, where the PC will be incremented with a large number, the probability of finding the PC in the cache goes down as the size of the cache decreases and the value used to increment the PC due to a JMP instruction increases.

  • whats a cache miss and why does the cache miss its been drivin me mad :)

  • Love your advanced drawings :)

  • O M G

  • The video demonstration was effective, but the musics became a distraction when the lyrics kicked in. Next time zero lyrics and double check spelling!

  • thank you

  • lol death blooms. love it

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