12 bit liner feedback shift register

I built this pseudo random sequence generator because I wanted to make something with the TTL ICs I have on hand. One day, I was looking for what I could do with shift registers and found this device called a liner feedback shift register. It used a shift register for carrying the data and it also used an XOR gate for feeding back information to the first bit of the shift register.

I used a 74LS164 for the shift register and a 74LS86 for the XOR gates. I built this on a proto board because I didnt want to use up that many parts for a prototype. I first built a four bit linear feedback shift register just to test if it would work or not. I had a couple problems with certain bits getting stuck on the on state and so I changed the IC. This still didnt fix the problem. I remembered that the diode logic gate I made should have a pull down resistor so I added that in. Some of the bits were still not shifting though. All of a sudden, it started working when I moved the wires carrying the data to a different hole on the same row. The board is kind of old so I just thought that the board was shorting on the inside. Later, I added another four bits and it seemed to work fine. Then I added another shift register so I could expand it to twelve bits. The four last bits coming from the second shift register were shifting the data on the rising edge of the clock pulse and not just the falling edge. I added a series resistor and a pull down capacitor and this seemed to fix the problem. Later, I noticed that some bits that were shifted between the shift registers were turning on when they should be off. I assumed it was ringing again so I added another series resistor and a pull down capacitor.

Here is a picture of the entire board (sorry that the top section of the board is kind of blurry): http://www.flickr.com/photos/28711881@N07/3692415197/sizes/l/

Category:

Science & Technology

Tags:

• TTL
• liner
• feedback
• shift
• register
• 12
• bit
• digital
• logic
• pseudo
• random
• sequence
• generator

[Myke1576]

@Myke1576 To avoid getting the same sequence of numbers from start up, seed the storage number with something like the current time in ms. I think that's all you would need for random number generation. It may look like a lot in text but it's really simple. Look up "Linear feedback shift register" on wikipedia for more info.

[Myke1576]

@MsTammna I have never worked with verilog but what you do is take sample bits from a number and feed them back into the LSB via the XOR operation. Every cycle, you shift the numbers to the left with the << operation. For the random number, take some bits from some places (near the LSB or MSB doesn't matter) and convert the binary to decimal. To get a new number, you shift and feed info into the storage number some number of times and read the output after converting the binary to decimal again.

[MsTammna]

myke may i know the verilog code of lfsr ?as i am currently working on project on whcich i have to genrate the pseudo random number ......kindly can u help me