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Published on Apr 3, 2012
Mirit Fromovich, Solutions Engineer in Cadence's Verification IP group, shares some background information on her 2012 CDNLive Silicon Valley paper, "Verifying Cache Coherent Designs, ACE and Interconnect Monitor". In a nutshell, Mirit elaborates on why it's so important for ACE verification to use a structured methodologies like the Universal Verification Methodology ("UVM") combined with automated, metric-driven verification ("MDV") approaches.