Intro to FPGAs for Software Engineers - Part 7 - Binary Counter Project (Part 2)

In this second of two videos (parts 6 and 7), you will walk through boolean logic, conditionals (if statements), basic arithmetic, and edge-triggered combinational logic in the pursuit of creating a simple binary counter. IT REALLY ISN'T AS HARD AS IT SOUNDS. =)

This video moves relatively quickly without being unfollowable and should be perfect for the absolute novice without drifting off into lengthy dialogs about theory. The pace should be good and the content understandable for anyone with a existing software programming background.

Category:

Science & Technology

Tags:

• VHDL
• Verilog
• FPGA
• programming
• digital logic
• ISE WebPack
• Design Suite 12
• Xilinx
• Spartan 3E
• Spartan3E
• tutorial
• walkthrough
• guide
• educational
• instructions
• instructional

[sloanroyal]

Thanks for the great video series. Getting some blinkenlights working is exactly what I needed to understand how all the tools fit together.

[Tbird761]

@sloanroyal Excellent! The video is then apparently a success. :) Let me know if I can help you further. I keep meaning to update and extend the series.

[rezamt2010]

Great for the newbies like me! However can you please let me know your board model ? and how can I get that ?

[Tbird761]

@rezamt2010 Sorry for the delay--I didn't see that you'd commented. The board I made these demos with is a Digilent "Spartan 3E Starter Board", but there is a less expensive one called Nexys2 that might be an even better choice.

You'll have to Google for "digilent" since this comment always errors when I post with a URL.

You can also make your own pretty easily for a fraction of the price, which I'll be making a video about in the future.

[madsand1986]

I realy like the videos.. the are very useful

but i miss something about the logic code why it works like it does

I hope you will make more videos about other projects :)

[Tbird761]

@madsand1986 I'd love to help if I can. Can you be more specific about what isn't clear? I'll do what I can to explain why what is happening at that step is happening.

[srkh28]

Excellent. You communicate the info really well. great stuff.

[rezamt2010]

Hi I've bought a DE2 board. Anyway, thank you for replying back.

Actually I am programmer (C++ / Java) but I am struggling with VHDL. Specially in Synthesis phase and also Modelsim. Do you have any link for Modelsim ?

Thanks,

Reza

[tahmad20]

Thank you

[smacruz]

Thanks! Very useful videos for those who are starting programming FPGAs like myself :)