Upload

Loading icon Loading...

This video is unavailable.

Cadence VP Tom Beckley discusses advanced node custom/analog design

Sign in to YouTube

Sign in with your Google Account (YouTube, Google+, Gmail, Orkut, Picasa, or Chrome) to like Cadence Design Systems's video.

Sign in to YouTube

Sign in with your Google Account (YouTube, Google+, Gmail, Orkut, Picasa, or Chrome) to dislike Cadence Design Systems's video.

Sign in to YouTube

Sign in with your Google Account (YouTube, Google+, Gmail, Orkut, Picasa, or Chrome) to add Cadence Design Systems's video to your playlist.

Published on Oct 31, 2012

Richard Goering interviews Tom Beckley, Senior Vice President of R&D for Custom IC and Simulation at Cadence, about the challenges of 20nm custom/analog design and what's needed to be successful at this advanced process node.

Loading icon Loading...

Loading icon Loading...

Loading icon Loading...

The interactive transcript could not be loaded.

Loading icon Loading...

Loading icon Loading...

Ratings have been disabled for this video.
Rating is available when the video has been rented.
This feature is not available right now. Please try again later.

Loading icon Loading...

Loading...
Working...
to add this to Watch Later

Add to