Loading...
Uploaded by UniversalScan on Jul 29, 2008
Illustrates JTAG scan chain testing on board with 3 CPLD devices from Altera, Xilinx, and Lattice.
Howto & Style
Standard YouTube License
Very nice collegue
Illuminato2 1 year ago
Load more suggestions
Very nice collegue
Illuminato2 1 year ago